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Hiroshi Kawaguchi Vis

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*2009
38EEShunsuke Okumura, Yusuke Iguchi, Shusuke Yoshimoto, Hidehiro Fujiwara, Hiroki Noguchi, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto: A 0.56-V 128kb 10T SRAM using column line assist (CLA) scheme. ISQED 2009: 659-663
37EEHidehiro Fujiwara, Shunsuke Okumura, Yusuke Iguchi, Hiroki Noguchi, Hiroshi Kawaguchi, Masahiko Yoshimoto: A 7T/14T Dependable SRAM and its Array Structure to Avoid Half Selection. VLSI Design 2009: 295-300
36EEHidehiro Fujiwara, Shunsuke Okumura, Yusuke Iguchi, Hiroki Noguchi, Hiroshi Kawaguchi, Masahiko Yoshimoto: A Dependable SRAM with 7T/14T Memory Cells. IEICE Transactions 92-C(4): 423-432 (2009)
35EETakashi Takeuchi, Shinji Mikami, Hyeokjong Lee, Hiroshi Kawaguchi, Chikara Ohta, Masahiko Yoshimoto: A 433-MHz Rail-to-Rail Voltage Amplifier with Carrier Sensing Function for Wireless Sensor Networks. IEICE Transactions 92-C(6): 815-821 (2009)
2008
34EEYuichiro Murachi, Kusuke Mizuno, Junichi Miyakoshi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Tetsuya Kamino, Hiroshi Kawaguchi, Masahiko Yoshimoto: A sub 100 mW H.264/AVC MP@L4.1 integer-pel motion estimation processor VLSI for MBAFF encoding. ISCAS 2008: 848-851
33EEHidehiro Fujiwara, Shunsuke Okumura, Yusuke Iguchi, Hiroki Noguchi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto: Quality of a Bit (QoB): A New Concept in Dependable SRAM. ISQED 2008: 98-102
32EEHidehiro Fujiwara, Koji Nii, Hiroki Noguchi, Junichi Miyakoshi, Yuichiro Murachi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto: Novel Video Memory Reduces 45% of Bitline Power Using Majority Logic and Data-Bit Reordering. IEEE Trans. VLSI Syst. 16(6): 620-627 (2008)
31EETakashi Takeuchi, Yu Otake, Masumi Ichien, Akihiro Gion, Hiroshi Kawaguchi, Chikara Ohta, Masahiko Yoshimoto: Cross-Layer Design for Low-Power Wireless Sensor Node Using Wave Clock. IEICE Transactions 91-B(11): 3480-3488 (2008)
30EEShintaro Izumi, Takashi Takeuchi, Takashi Matsuda, Hiroshi Kawaguchi, Chikara Ohta, Masahiko Yoshimoto: Counter-Based Broadcasting with Hop Count Aware Random Assessment Delay Extension for Wireless Sensor Networks. IEICE Transactions 91-B(11): 3489-3498 (2008)
29EEYuichiro Murachi, Yuki Fukuyama, Ryo Yamamoto, Junichi Miyakoshi, Hiroshi Kawaguchi, Hajime Ishihara, Masayuki Miyama, Yoshio Matsuda, Masahiko Yoshimoto: A VGA 30-fps Realtime Optical-Flow Processor Core for Moving Picture Recognition. IEICE Transactions 91-C(4): 457-464 (2008)
28EEYuichiro Murachi, Junichi Miyakoshi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Fang Yin, Jangchung Lee, Hiroshi Kawaguchi, Masahiko Yoshimoto: A Sub 100 mW H.264 MP@L4.1 Integer-Pel Motion Estimation Processor Core for MBAFF Encoding with Reconfigurable Ring-Connected Systolic Array and Segmentation-Free, Rectangle-Access Search-Window Buffer. IEICE Transactions 91-C(4): 465-478 (2008)
27EEHiroki Noguchi, Yusuke Iguchi, Hidehiro Fujiwara, Shunsuke Okumura, Yasuhiro Morita, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto: A 10T Non-precharge Two-Port SRAM Reducing Readout Power for Video Processing. IEICE Transactions 91-C(4): 543-552 (2008)
2007
26EEKentaro Kawakami, Mitsuhiko Kuroda, Hiroshi Kawaguchi, Masahiko Yoshimoto: Power and Memory Bandwidth Reduction of an H.264/AVC HDTV Decoder LSI with Elastic Pipeline Architecture. ASP-DAC 2007: 292-297
25EEHiroki Noguchi, Yusuke Iguchi, Hidehiro Fujiwara, Yasuhiro Morita, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto: A 10T Non-Precharge Two-Port SRAM for 74% Power Reduction in Video Processing. ISVLSI 2007: 107-112
24EEHiroshi Kawaguchi, Danardono Dwi Antono, Takayasu Sakurai: Closed-Form Expressions for Crosstalk Noise and Worst-Case Delay on Capacitively Coupled Distributed RC Lines. IEICE Transactions 90-A(12): 2669-2681 (2007)
23EEYasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Yusuke Iguchi, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto: Area Comparison between 6T and 8T SRAM Cells in Dual-Vdd Scheme and DVS Scheme. IEICE Transactions 90-A(12): 2695-2702 (2007)
22EETakashi Matsuda, Masumi Ichien, Hiroshi Kawaguchi, Chikara Ohta, Masahiko Yoshimoto: Data Transmission Scheduling Based on RTS/CTS Exchange for Periodic Data Gathering Sensor Networks. IEICE Transactions 90-B(12): 3410-3418 (2007)
21EEYasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Yusuke Iguchi, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto: Area Optimization in 6T and 8T SRAM Cells Considering Vth Variation in Future Processes. IEICE Transactions 90-C(10): 1949-1956 (2007)
20EEFayez Robert Saliba, Hiroshi Kawaguchi, Takayasu Sakurai: A Self-Alignment Row-by-Row Variable-VDD Scheme Reducing 90% of Active-Leakage Power in SRAM's. IEICE Transactions 90-C(4): 743-748 (2007)
2006
19EETakafumi Aonishi, Takashi Matsuda, Shinji Mikami, Hiroshi Kawaguchi, Chikara Ohta, Masahiko Yoshimoto: Impact of Aggregation Efficiency on GIT Routing forWireless Sensor Networks. ICPP Workshops 2006: 151-158
18EEHidehiro Fujiwara, Koji Nii, Junichi Miyakoshi, Yuichiro Murachi, Yasuhiro Morita, Hiroshi Kawaguchi, Masahiko Yoshimoto: A two-port SRAM for real-time video processor saving 53% of bitline power with majority logic and data-bit reordering. ISLPED 2006: 61-66
17EEJunichi Miyakoshi, Yuichiro Murachi, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Hiroshi Kawaguchi, Masahiko Yoshimoto, Tetsuro Matsuno: A Power- and Area-Efficient SRAM Core Architecture for Super-Parallel Video Processing. VLSI-SoC 2006: 192-197
16EEKyeong-Sik Min, Hun-Dae Choi, H.-Y. Choi, Hiroshi Kawaguchi, Takayasu Sakurai: Leakage-suppressed clock-gating circuit with Zigzag Super Cut-off CMOS (ZSCCMOS) for leakage-dominant sub-70-nm and sub-1-V-V/sub DD/ LSIs. IEEE Trans. VLSI Syst. 14(4): 430-435 (2006)
15EEDanardono Dwi Antono, Kenichi Inagaki, Hiroshi Kawaguchi, Takayasu Sakurai: Simple Waveform Model of Inductive Interconnects by Delayed Quadratic Transfer Function with Application to Scaling Trend of Inductive Effects in VLSI's. IEICE Transactions 89-A(12): 3569-3578 (2006)
14EEJunichi Miyakoshi, Yuichiro Murachi, Tetsuro Matsuno, Masaki Hamamoto, Takahiro Iinuma, Tomokazu Ishihara, Hiroshi Kawaguchi, Masayuki Miyama, Masahiko Yoshimoto: A Sub-mW H.264 Baseline-Profile Motion Estimation Processor Core with a VLSI-Oriented Block Partitioning Strategy and SIMD/Systolic-Array Architecture. IEICE Transactions 89-A(12): 3623-3633 (2006)
13EEYasuhiro Morita, Hidehiro Fujiwara, Hiroki Noguchi, Kentaro Kawakami, Junichi Miyakoshi, Shinji Mikami, Koji Nii, Hiroshi Kawaguchi, Masahiko Yoshimoto: A 0.3-V Operating, Vth-Variation-Tolerant SRAM under DVS Environment for Memory-Rich SoC in 90-nm Technology Era and Beyond. IEICE Transactions 89-A(12): 3634-3641 (2006)
12EEKentaro Kawakami, Jun Takemura, Mitsuhiko Kuroda, Hiroshi Kawaguchi, Masahiko Yoshimoto: A 50% Power Reduction in H.264/AVC HDTV Video Decoder LSI by Dynamic Voltage Scaling in Elastic Pipeline. IEICE Transactions 89-A(12): 3642-3651 (2006)
11EEShinji Mikami, Takafumi Aonishi, Hironori Yoshino, Chikara Ohta, Hiroshi Kawaguchi, Masahiko Yoshimoto: Aggregation Efficiency-Aware Greedy Incremental Tree Routing for Wireless Sensor Networks. IEICE Transactions 89-B(10): 2741-2751 (2006)
10EEJunichi Miyakoshi, Yuichiro Murachi, Tomokazu Ishihara, Hiroshi Kawaguchi, Masahiko Yoshimoto: A Power- and Area-Efficient SRAM Core Architecture with Segmentation-Free and Horizontal/Vertical Accessibility for Super-Parallel Video Processing. IEICE Transactions 89-C(11): 1629-1636 (2006)
9EECanh Quang Tran, Hiroshi Kawaguchi, Takayasu Sakurai: Low-Power Low-Leakage FPGA Design Using Zigzag Power Gating, Dual-VTH/VDD and Micro-VDD-Hopping. IEICE Transactions 89-C(3): 280-286 (2006)
8EEDanardono Dwi Antono, Kenichi Inagaki, Hiroshi Kawaguchi, Takayasu Sakurai: Trends of On-Chip Interconnects in Deep Sub-Micron VLSI. IEICE Transactions 89-C(3): 392-394 (2006)
2005
7EECanh Quang Tran, Hiroshi Kawaguchi, Takayasu Sakurai: More than two orders of magnitude leakage current reduction in look-up table for FPGAs. ISCAS (5) 2005: 4701-4704
6EEHiroshi Kawaguchi, Youngsoo Shin, Takayasu Sakurai: /spl mu/ITRON-LP: power-conscious real-time OS based on cooperative voltage scaling for multimedia applications. IEEE Transactions on Multimedia 7(1): 67-74 (2005)
5EEKyeong-Sik Min, Kouichi Kanda, Hiroshi Kawaguchi, Kenichi Inagaki, Fayez Robert Saliba, Hoon-Dae Choi, Hyun-Young Choi, Daejeong Kim, Dong Myong Kim, Takayasu Sakurai: Row-by-Row Dynamic Source-Line Voltage Control (RRDSV) Scheme for Two Orders of Magnitude Leakage Current Reduction of Sub-1-V-VDD SRAM's. IEICE Transactions 88-C(4): 760-767 (2005)
4EEKeisuke Toyama, Satoshi Misaka, Kazuo Aisaka, Toshiyuki Aritsuka, Kunio Uchiyama, Koichiro Ishibashi, Hiroshi Kawaguchi, Takayasu Sakurai: Frequency-voltage cooperative CPU power control: A design rule and its application by feedback prediction. Systems and Computers in Japan 36(6): 39-48 (2005)
2001
3EEHiroshi Kawaguchi, Gang Zhang, Seongsoo Lee, Takayasu Sakurai: An LSI for VDD-hopping and MPEG4 system based on the chip. ISCAS (4) 2001: 918-921
1998
2 Hiroshi Kawaguchi, Takayasu Sakurai: Delay and Noise Formulas for Capacitively Coupled Distributed RC Lines. ASP-DAC 1998: 35-43
1978
1 Kazuhide Sugawara, Hiroshi Kawaguchi, Teruyasu Nishizawa: "E-correctness" of a set of "computation processes". Mathematical Studies of Information Processing 1978: 282-301

Coauthor Index

1Kazuo Aisaka [4]
2Danardono Dwi Antono [8] [15] [24]
3Takafumi Aonishi [11] [19]
4Toshiyuki Aritsuka [4]
5H.-Y. Choi [16]
6Hoon-Dae Choi [5]
7Hun-Dae Choi [16]
8Hyun-Young Choi [5]
9Hidehiro Fujiwara [13] [18] [21] [23] [25] [27] [32] [33] [36] [37] [38]
10Yuki Fukuyama [29]
11Akihiro Gion [31]
12Masaki Hamamoto [14] [17] [28] [34]
13Masumi Ichien [22] [31]
14Yusuke Iguchi [21] [23] [25] [27] [33] [36] [37] [38]
15Takahiro Iinuma [14] [17] [28] [34]
16Kenichi Inagaki [5] [8] [15]
17Koichiro Ishibashi [4]
18Hajime Ishihara [29]
19Tomokazu Ishihara [10] [14] [17] [28] [34]
20Shintaro Izumi [30]
21Tetsuya Kamino [34]
22Kouichi Kanda [5]
23Kentaro Kawakami [12] [13] [26]
24Daejeong Kim [5]
25Dong Myong Kim [5]
26Mitsuhiko Kuroda [12] [26]
27Hyeokjong Lee [35]
28Jangchung Lee [28] [34]
29Seongsoo Lee [3]
30Takashi Matsuda [19] [22] [30]
31Yoshio Matsuda [29]
32Tetsuro Matsuno [14] [17]
33Shinji Mikami [11] [13] [19] [35]
34Kyeong-Sik Min [5] [16]
35Satoshi Misaka [4]
36Junichi Miyakoshi [10] [13] [14] [17] [18] [28] [29] [32] [34]
37Masayuki Miyama [14] [29]
38Kusuke Mizuno [34]
39Yasuhiro Morita [13] [18] [21] [23] [25] [27] [32] [33]
40Yuichiro Murachi [10] [14] [17] [18] [28] [29] [32] [34]
41Koji Nii [13] [18] [21] [23] [25] [27] [32] [38]
42Teruyasu Nishizawa [1]
43Hiroki Noguchi [13] [21] [23] [25] [27] [32] [33] [36] [37] [38]
44Chikara Ohta [11] [19] [22] [30] [31] [35]
45Shunsuke Okumura [27] [33] [36] [37] [38]
46Yu Otake [31]
47Takayasu Sakurai [2] [3] [4] [5] [6] [7] [8] [9] [15] [16] [20] [24]
48Fayez Robert Saliba [5] [20]
49Youngsoo Shin [6]
50Kazuhide Sugawara [1]
51Jun Takemura [12]
52Takashi Takeuchi [30] [31] [35]
53Keisuke Toyama [4]
54Canh Quang Tran [7] [9]
55Kunio Uchiyama [4]
56Ryo Yamamoto [29]
57Fang Yin [28] [34]
58Masahiko Yoshimoto [10] [11] [12] [13] [14] [17] [18] [19] [21] [22] [23] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [35] [36] [37] [38]
59Shusuke Yoshimoto [38]
60Hironori Yoshino [11]
61Gang Zhang [3]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)