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William H. Kao Vis

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*2007
8EEWilliam H. Kao, Xiaopeng Dong: Digital Block Modeling and Substrate Noise Aware Floorplanning for Mixed Signal SOCs. ISCAS 2007: 1935-1938
2003
7EEWilliam H. Kao, Wenkung K. Chu: Noise constraint driven placement for mixed signal designs. ISCAS (4) 2003: 712-715
2001
6EEWenting Hou, Hong Yu, Xianlong Hong, Yici Cai, Weimin Wu, Jun Gu, William H. Kao: A new congestion-driven placement algorithm based on cell inflation. ASP-DAC 2001: 605-608
1999
5EEJunwei Hou, William H. Kao, Abhijit Chatterjee: A novel concurrent fault simulation method for mixed-signal circuits. ISCAS (2) 1999: 448-451
1998
4EEBogdan G. Arsintescu, Edoardo Charbon, Enrico Malavasi, Umakanta Choudhury, William H. Kao: General AC Constraint Transformation for Analog ICs. DAC 1998: 38-43
1997
3 Ramakrishna Voorakaranam, Sudip Chakrabarti, Junwei Hou, Alfred V. Gomes, Sasikumar Cherubal, Abhijit Chatterjee, William H. Kao: Hierarchical Specification-Driven Analog Fault Modeling for Efficient Fault Simulation and Diagnosis. ITC 1997: 903-912
1992
2 Stephen C. Bateman, William H. Kao: Simulation of an Integrated Design and Test Environment for Mixed-Signal Integrated Circuits. ITC 1992: 405-414
1985
1EEWilliam H. Kao, Nader Fathi, Chia-Hao Lee: Algorithms for automatic transistor sizing in CMOS digital circuits. DAC 1985: 781-784

Coauthor Index

1Bogdan G. Arsintescu [4]
2Stephen C. Bateman [2]
3Yici Cai [6]
4Sudip Chakrabarti [3]
5Edoardo Charbon [4]
6Abhijit Chatterjee [3] [5]
7Sasikumar Cherubal [3]
8Umakanta Choudhury [4]
9Wenkung K. Chu [7]
10Xiaopeng Dong [8]
11Nader Fathi [1]
12Alfred V. Gomes [3]
13Jun Gu [6]
14Xianlong Hong [6]
15Junwei Hou [3] [5]
16Wenting Hou [6]
17Chia-Hao Lee [1]
18Enrico Malavasi [4]
19Ramakrishna Voorakaranam [3]
20Weimin Wu [6]
21Hong Yu [6]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)