| * | 2009 |
|---|
| 51 | EE | YongJoon Kim,
Myung-Hoon Yang,
Jaeseok Park,
Eunsei Park,
Sungho Kang:
Grouped Scan Slice Repetition Method for Reducing Test Data Volume and Test Application Time.
IEICE Transactions 92-D(7): 1462-1465 (2009) |
| 2008 |
|---|
| 50 | EE | Sunghoon Chun,
Taejin Kim,
Sungho Kang:
A new low energy BIST using a statistical code.
ASP-DAC 2008: 647-652 |
| 49 | EE | Jongsoo Yim,
Gunbae Kim,
Incheol Nam,
Sangki Son,
Jonghyoung Lim,
Hwacheol Lee,
Sangseok Kang,
Byungheon Kwak,
Jinseok Lee,
Sungho Kang:
A Prevenient Voltage Stress Test Method for High Density Memory.
DELTA 2008: 516-520 |
| 48 | EE | Sunghoon Chun,
Taejin Kim,
YongJoon Kim,
Sungho Kang:
An Efficient Scan Chain Diagnosis Method Using a New Symbolic Simulation.
VTS 2008: 73-78 |
| 47 | EE | Hyunjin Kim,
Hyejeong Hong,
Hong-Sik Kim,
Jin-Ho Ahn,
Sungho Kang:
Total Energy Minimization of Real-Time Tasks in an On-Chip Multiprocessor Using Dynamic Voltage Scaling Efficiency Metric.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(11): 2088-2092 (2008) |
| 46 | EE | Youbean Kim,
Kicheol Kim,
Incheol Kim,
Sungho Kang:
A New Built-in Self Test Scheme for Phase-Locked Loops Using Internal Digital Signals.
IEICE Transactions 91-C(10): 1713-1716 (2008) |
| 45 | EE | Kicheol Kim,
Youbean Kim,
Incheol Kim,
HyeonUk Son,
Sungho Kang:
A Low-Cost BIST Based on Histogram Testing for Analog to Digital Converters.
IEICE Transactions 91-C(4): 670-672 (2008) |
| 44 | EE | Youbean Kim,
Kicheol Kim,
Incheol Kim,
Hyunwook Son,
Sungho Kang:
A New Scan Power Reduction Scheme Using Transition Freezing for Pseudo-Random Logic BIST.
IEICE Transactions 91-D(4): 1185-1188 (2008) |
| 43 | EE | DongSup Song,
Jin-Ho Ahn,
Tae-Jin Kim,
Sungho Kang:
MTR-Fill: A Simulated Annealing-Based X-Filling Technique to Reduce Test Power Dissipation for Scan-Based Designs.
IEICE Transactions 91-D(4): 1197-1200 (2008) |
| 42 | EE | Hong-Sik Kim,
Sungho Kang,
Michael S. Hsiao:
A New Scan Architecture for Both Low Power Testing and Test Volume Compression Under SOC Test Environment.
J. Electronic Testing 24(4): 365-378 (2008) |
| 41 | EE | Myung-Hoon Yang,
YongJoon Kim,
Sunghoon Chun,
Sungho Kang:
An Effective Power Reduction Methodology for Deterministic BIST Using Auxiliary LFSR.
J. Electronic Testing 24(6): 591-595 (2008) |
| 2007 |
|---|
| 40 | EE | Incheol Kim,
Kicheol Kim,
Youbean Kim,
HyeonUk Son,
Sungho Kang:
A New Analog-to-Digital Converter BIST Considering a Transient Zone.
IEICE Transactions 90-C(11): 2161-2163 (2007) |
| 39 | EE | Sunghoon Chun,
YongJoon Kim,
Sungho Kang:
MDSI: Signal Integrity Interconnect Fault Modeling and Testing for SoCs.
J. Electronic Testing 23(4): 357-362 (2007) |
| 2006 |
|---|
| 38 | EE | Jin-Ho Ahn,
Hyunjin Kim,
Byung In Moon,
Sungho Kang:
System on a Chip Implementation of Social Insect Behavior for Adaptive Network Routing.
ICIC (2) 2006: 530-535 |
| 37 | EE | Jin-Ho Ahn,
Sungho Kang:
SoC Test Scheduling Algorithm Using ACO-Based Rectangle Packing.
ICIC (2) 2006: 655-660 |
| 36 | EE | Hyuntae Park,
Byung In Moon,
Sungho Kang:
Improved Reinforcement Computing to Implement AntNet-Based Routing Using General NPs for Ubiquitous Environments.
ICUCT 2006: 242-251 |
| 35 | EE | Sunghoon Chun,
YongJoon Kim,
Jung-Been Im,
Sungho Kang:
MICRO: a new hybrid test data compression/decompression scheme.
IEEE Trans. VLSI Syst. 14(6): 649-654 (2006) |
| 34 | EE | Hong-Sik Kim,
Sungho Kang:
Increasing encoding efficiency of LFSR reseeding-based test compression.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(5): 913-917 (2006) |
| 33 | EE | DongSup Song,
Sungho Kang:
A Clustered RIN BIST Based on Signal Probabilities of Deterministic Test Sets.
IEICE Transactions 89-D(1): 354-357 (2006) |
| 32 | EE | Sunghoon Chun,
Sangwook Kim,
Hong-Sik Kim,
Sungho Kang:
An Efficient Dictionary Organization for Maximum Diagnosis.
J. Electronic Testing 22(1): 37-48 (2006) |
| 2005 |
|---|
| 31 | EE | DongSup Song,
Sungho Kang:
Increasing Embedding Probabilities of RPRPs in RIN Based BIST.
Asia-Pacific Computer Systems Architecture Conference 2005: 600-613 |
| 30 | EE | Jin-Ho Ahn,
Byung In Moon,
Sungho Kang:
A Practical Test Scheduling Using Network-Based TAM in Network on Chip Architecture.
Asia-Pacific Computer Systems Architecture Conference 2005: 614-624 |
| 29 | EE | Youbean Kim,
Myung-Hoon Yang,
Yong Lee,
Sungho Kang:
A New Low Power Test Pattern Generator using a Transition Monitoring Window based on BIST Architecture.
Asian Test Symposium 2005: 230-235 |
| 28 | EE | Kicheol Kim,
DongSub Song,
Incheol Kim,
Sungho Kang:
A New Low Power Test Pattern Generator for BIST Architecture.
IEICE Transactions 88-C(10): 2037-2038 (2005) |
| 27 | EE | Junseok Han,
DongSup Song,
Hagbae Kim,
Youngyong Kim,
Sungho Kang:
An Effective Built-In Self-Test for Chargepump PLL.
IEICE Transactions 88-C(8): 1731-1733 (2005) |
| 2004 |
|---|
| 26 | EE | Jung-Been Im,
Sunghoon Chun,
Geunbae Kim,
Jin-Ho Ahn,
Sungho Kang:
RAIN (RAndom Insertion) Scheduling Algorithm for SoC Test.
Asian Test Symposium 2004: 242-247 |
| 25 | EE | Jae Seuk Oh,
Sung-il Bae,
Jin-Ho Ahn,
Sungho Kang:
Route Reinforcement for Efficient QoS Routing Based on Ant Algorithm.
ICOIN 2004: 342-349 |
| 24 | EE | Byung In Moon,
Hongil Yoon,
Ilgun Yun,
Sungho Kang:
An In-Order SMT Architecture with Static Resource Partitioning for Consumer Applications.
PDCAT 2004: 539-544 |
| 23 | | YongJoon Kim,
Hyun-Don Kim,
Sungho Kang:
A new maximal diagnosis algorithm for interconnect test.
IEEE Trans. VLSI Syst. 12(5): 532-537 (2004) |
| 2003 |
|---|
| 22 | EE | YongJoon Kim,
DongSub Song,
YongSeung Shin,
Sunghoon Chun,
Sungho Kang:
A New Maximal Diagnosis Algorithm for Bus-structured Systems.
ITC 2003: 349-357 |
| 21 | EE | Hong-Sik Kim,
YongJoon Kim,
Sungho Kang:
Test-decompression mechanism using a variable-length multiple-polynomial LFSR.
IEEE Trans. VLSI Syst. 11(4): 687-690 (2003) |
| 20 | EE | Sungho Kang,
Stephen A. Szygenda:
Accurate Logic Simulation by Overcoming the Unknown Value Propagation Problem.
Simulation 79(2): 59-68 (2003) |
| 2002 |
|---|
| 19 | EE | Sung-il Bae,
Daesik Seo,
Gilyoung Kang,
Sungho Kang:
A New Survival Architecture for Network Processors.
AISA 2002: 1-10 |
| 18 | EE | Sangmin Bae,
DongSup Song,
Jihye Kim,
Sungho Kang:
An Efficient On-Line Monitoring BIST for Remote Service System.
AISA 2002: 205-214 |
| 17 | EE | Sungchul Yoon,
Sangwook Kim,
Jae Seuk Oh,
Sungho Kang:
A New DSP Architecture for Correcting Errors Using Viterbi Algorithm.
AISA 2002: 95-102 |
| 16 | EE | Hong-Sik Kim,
Sungho Kang:
DPSC SRAM Transparent Test Algorithm.
Asian Test Symposium 2002: 145-150 |
| 2001 |
|---|
| 15 | | Hong-Sik Kim,
Jin-kyue Lee,
Sungho Kang:
A Heuristic for Multiple Weight Set Generation.
ICCD 2001: 513-514 |
| 14 | | Hong-Sik Kim,
Jin-kyue Lee,
Sungho Kang:
A new multiple weight set calculation algorithm.
ITC 2001: 878-884 |
| 13 | EE | Song Chong,
Sangho Lee,
Sungho Kang:
A simple, scalable, and stable explicit rate allocation algorithm for MAX-MIN flow control with minimum rate guarantee.
IEEE/ACM Trans. Netw. 9(3): 322-335 (2001) |
| 1999 |
|---|
| 12 | EE | Jongchul Shin,
Hyunjin Kim,
Sungho Kang:
At-Speed Boundary-Scan Interconnect Testing in a Board with Multiple System Clocks.
DATE 1999: 473- |
| 11 | EE | Hangkyu Lee,
Sungho Kang:
A New Weight Set Generation Algorithm for Weighted Random Pattern Generation.
ICCD 1999: 160-165 |
| 10 | EE | Hyunjin Kim,
Jongchul Shin,
Sungho Kang:
An Efficient Interconnect Test Using BIST Module in a Boundary-Scan Environment.
ICCD 1999: 328-329 |
| 1997 |
|---|
| 9 | | Yong Seok Kang,
Jong Cheol Lee,
Sungho Kang:
Built-in Self Test for Contect Addressable Memories.
ICCD 1997: 48-53 |
| 1996 |
|---|
| 8 | EE | Jae-Wook Lee,
Sungho Kang:
Efficient Simulation Model Generation Using Automatic Programming Techniques.
Winter Simulation Conference 1996: 708-713 |
| 1995 |
|---|
| 7 | | Youngmin Hur,
Stephen A. Szygenda,
E. Scott Fehr,
Granville E. Ott,
Sungho Kang:
Massively Parallel Array Processor for Logic, Fault, and Design Error Simulation.
HPCA 1995: 340-347 |
| 1994 |
|---|
| 6 | | Sungho Kang,
Wai-On Law,
Bill Underwood:
Path-Delay Fault Simulation for a Standard Scan Design Methodology.
ICCD 1994: 359-362 |
| 5 | | Bill Underwood,
Wai-On Law,
Sungho Kang,
Haluk Konuk:
Fastpath: A Path-Delay Test Generator for Standard Scan Designs.
ITC 1994: 154-163 |
| 4 | EE | Sungho Kang,
Stephen A. Szygenda:
Design Validation: Comparing Theoretical and Empirical Results of Design Error Modeling.
IEEE Design & Test of Computers 11(1): 18-26 (1994) |
| 3 | EE | Sungho Kang,
Stephen A. Szygenda:
The simulation automation system (SAS); concepts, implementation, and results.
IEEE Trans. VLSI Syst. 2(1): 89-99 (1994) |
| 1993 |
|---|
| 2 | | Sungho Kang,
Stephen A. Szygenda:
Automatic VHDL Model Generation System.
CHDL 1993: 353-360 |
| 1992 |
|---|
| 1 | | Sungho Kang,
Stephen A. Szygenda:
Modeling and Simulation of Design Errors.
ICCD 1992: 443-446 |
