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Timothy Kam

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2006
16EESatrajit Chatterjee, Alan Mishchenko, Robert K. Brayton, Xinning Wang, Timothy Kam: Reducing Structural Bias in Technology Mapping. IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 2894-2903 (2006)
2005
15 Satrajit Chatterjee, Alan Mishchenko, Robert K. Brayton, Xinning Wang, Timothy Kam: Reducing structural bias in technology mapping. ICCAD 2005: 519-526
2003
14EEAlan Mishchenko, Xinning Wang, Timothy Kam: A new enhanced constructive decomposition and mapping algorithm. DAC 2003: 143-148
2002
13EESumit Gupta, Nick Savoiu, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau, Timothy Kam, Michael Kishinevsky, Shai Rotem: Coordinated transformations for high-level synthesis of high performance microprocessor blocks. DAC 2002: 898-903
1999
12EEYatin Vasant Hoskote, Timothy Kam, Pei-Hsin Ho, Xudong Zhao: Coverage Estimation for Symbolic Model Checking. DAC 1999: 300-305
1998
11EEPei-Hsin Ho, Adrian J. Isles, Timothy Kam: Formal verification of pipeline control using controlled token nets and abstract interpretation. ICCAD 1998: 529-536
1997
10EETimothy Kam, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Theory and algorithms for state minimization of nondeterministic FSMs. IEEE Trans. on CAD of Integrated Circuits and Systems 16(11): 1311-1322 (1997)
9EETimothy Kam, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Implicit computation of compatible sets for state minimization of ISFSMs. IEEE Trans. on CAD of Integrated Circuits and Systems 16(7): 657-676 (1997)
8EETiziano Villa, Timothy Kam, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Explicit and implicit algorithms for binate covering problems. IEEE Trans. on CAD of Integrated Circuits and Systems 16(7): 677-691 (1997)
1996
7 Yirng-An Chen, Edmund M. Clarke, Pei-Hsin Ho, Yatin Vasant Hoskote, Timothy Kam, Manpreet Khaira, John W. O'Leary, Xudong Zhao: Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking. FMCAD 1996: 19-33
1995
6EETimothy Kam, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: Implicit state minimization of non-deterministic FSMs. ICCD 1995: 250-257
5EETimothy Kam, P. A. Subrahmanyam: Comparing layouts with HDL models: a formal verification technique. IEEE Trans. on CAD of Integrated Circuits and Systems 14(4): 503-509 (1995)
1994
4EEAdnan Aziz, Felice Balarin, Szu-Tsung Cheng, Ramin Hojati, Timothy Kam, Sriram C. Krishnan, Rajeev K. Ranjan, Thomas R. Shiple, Vigyan Singhal, Serdar Tasiran, Huey-Yih Wang, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: HSIS: A BDD-Based Environment for Formal Verification. DAC 1994: 454-459
3EETimothy Kam, Tiziano Villa, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli: A Fully Implicit Algorithm for Exact State Minimization. DAC 1994: 684-690
1992
2 Timothy Kam, P. A. Subrahmanyam: Comparing Layouts with HDL Models: A Formal Verification Technique. ICCD 1992: 588-591
1990
1 Arvind Srinivasan, Timothy Kam, Sharad Malik, Robert K. Brayton: Algorithms for Discrete Function Manipulation. ICCAD 1990: 92-95

Coauthor Index

1Adnan Aziz [4]
2Felice Balarin [4]
3Robert K. Brayton [1] [3] [4] [6] [8] [9] [10] [15] [16]
4Satrajit Chatterjee [15] [16]
5Yirng-An Chen [7]
6Szu-Tsung Cheng [4]
7Edmund M. Clarke [7]
8Nikil D. Dutt (Nikil Dutt) [13]
9Rajesh K. Gupta (Rajesh Gupta) [13]
10Sumit Gupta [13]
11Pei-Hsin Ho [7] [11] [12]
12Ramin Hojati [4]
13Yatin Vasant Hoskote [7] [12]
14Adrian J. Isles [11]
15Manpreet Khaira [7]
16Michael Kishinevsky [13]
17Sriram C. Krishnan [4]
18Sharad Malik [1]
19Alan Mishchenko [14] [15] [16]
20Alexandru Nicolau (Alex Nicolau) [13]
21John W. O'Leary [7]
22Rajeev K. Ranjan [4]
23Shai Rotem [13]
24Alberto L. Sangiovanni-Vincentelli [3] [4] [6] [8] [9] [10]
25Nicolae Savoiu (Nick Savoiu) [13]
26Thomas R. Shiple [4]
27Vigyan Singhal [4]
28Arvind Srinivasan [1]
29P. A. Subrahmanyam [2] [5]
30Serdar Tasiran [4]
31Tiziano Villa [3] [6] [8] [9] [10]
32Huey-Yih Wang [4]
33Xinning Wang [14] [15] [16]
34Xudong Zhao [7] [12]

Colors in the list of coauthors

Copyright © Thu Jun 5 07:42:39 2008 by Michael Ley (ley@uni-trier.de)