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Andrew B. Kahng Vis

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*2009
277EEKwangok Jeong, Andrew B. Kahng: Timing analysis and optimization implications of bimodal CD distribution in double patterning lithography. ASP-DAC 2009: 486-491
276EEAndrew B. Kahng, Bin Li, Li-Shiuan Peh, Kambiz Samadi: ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration. DATE 2009: 423-428
275EEKwangok Jeong, Andrew B. Kahng, Hailong Yao: Revisiting the linear programming framework for leakage power vs. performance optimization. ISQED 2009: 127-134
274EEAndrew B. Kahng, Chul-Hong Park, Puneet Sharma, Qinke Wang: Lens aberration aware placement for timing yield. ACM Trans. Design Autom. Electr. Syst. 14(1): (2009)
2008
273EELuca P. Carloni, Andrew B. Kahng, Swamy Muddu, Alessandro Pinto, Kambiz Samadi, Puneet Sharma: Interconnect modeling for improved system-level design optimization. ASP-DAC 2008: 258-264
272EEPuneet Gupta, Andrew B. Kahng, Youngmin Kim, Saumil Shah, Dennis Sylvester: Investigation of diffusion rounding for post-lithography analysis. ASP-DAC 2008: 480-485
271EEPuneet Gupta, Andrew B. Kahng: Bounded-lifetime integrated circuits. DAC 2008: 347-348
270EEKwangok Jeong, Andrew B. Kahng, Chul-Hong Park, Hailong Yao: Dose map and placement co-optimization for timing yield enhancement and leakage power reduction. DAC 2008: 516-521
269EEJuan C. Rey, N. S. Nagaraj, Andrew B. Kahng, Fabian Klass, Rob Aitken, Cliff Hou, Luigi Capodieci, Vivek Singh: DFM in practice: hit or hype? DAC 2008: 898-899
268EEAndrew B. Kahng, Chul-Hong Park, Xu Xu, Hailong Yao: Layout decomposition for double patterning lithography. ICCAD 2008: 465-472
267EEAndrew B. Kahng: How to get real mad. ISPD 2008: 69
266EEKwangok Jeong, Andrew B. Kahng, Kambiz Samadi: Quantified Impacts of Guardband Reduction on Design Process Outcomes. ISQED 2008: 790-797
265EEAndrew B. Kahng, Kambiz Samadi: CMP Fill Synthesis: A Survey of Recent Studies. IEEE Trans. on CAD of Integrated Circuits and Systems 27(1): 3-19 (2008)
264EEAndrew B. Kahng, Sudhakar Muddu, Puneet Sharma: Defocus-Aware Leakage Estimation and Control. IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 230-240 (2008)
263EEAndrew B. Kahng, Puneet Sharma, Rasit Onur Topaloglu: Chip Optimization Through STI-Stress-Aware Placement Perturbations and Fill Insertion. IEEE Trans. on CAD of Integrated Circuits and Systems 27(7): 1241-1252 (2008)
262EEAndrew B. Kahng, Chul-Hong Park, Xu Xu: Fast Dual-Graph-Based Hotspot Filtering. IEEE Trans. on CAD of Integrated Circuits and Systems 27(9): 1635-1642 (2008)
2007
261EEBao Liu, Andrew B. Kahng, Xu Xu, Jiang Hu, Ganesh Venkataraman: A Global Minimum Clock Distribution Network Augmentation Algorithm for Guaranteed Clock Skew Yield. ASP-DAC 2007: 24-31
260EEPuneet Gupta, Andrew B. Kahng, Youngmin Kim, Saumil Shah, Dennis Sylvester: Line-End Shortening is Not Always a Failure. DAC 2007: 270-271
259EEAndrew B. Kahng: Design challenges at 65nm and beyond. DATE 2007: 1466-1467
258EEAndrew B. Kahng, Puneet Sharma, Rasit Onur Topaloglu: Exploiting STI stress for performance. ICCAD 2007: 83-90
257EEAndrew B. Kahng, Sung-Mo Kang, Wei Li, Bao Liu: Analytical thermal placement for VLSI lifetime improvement and minimum performance variation. ICCD 2007: 71-77
256EEAndrew B. Kahng, Swamy Muddu, Puneet Sharma: Detailed placement for leakage reduction using systematic through-pitch variation. ISLPED 2007: 110-115
255EEAndrew B. Kahng, Rasit Onur Topaloglu: A DOE Set for Normalization-Based Extraction of Fill Impact on Capacitances. ISQED 2007: 467-474
254EEAndrew B. Kahng, Sherief Reda, Puneet Sharma: On-Line Adjustable Buffering for Runtime Power Reduction. ISQED 2007: 550-555
253EECharles Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky: Bright-Field AAPSM Conflict Detection and Correction CoRR abs/0710.4661: (2007)
252EEAndrew B. Kahng, Ira Chayut, John M. Cohn, Toshihiro Hattori, Jeong-Taek Kong, Pierre G. Paulin, Rich Tobias: Roundtable: Design and CAD Challenges for Leading-Edge Multimedia Designs. IEEE Design & Test of Computers 24(1): 83-93 (2007)
251EEAndrew B. Kahng, Bao Liu, Qinke Wang: Stochastic Power/Ground Supply Voltage Prediction and Optimization Via Analytical Placement. IEEE Trans. VLSI Syst. 15(8): 904-912 (2007)
250EECharles Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky: Fast and Efficient Bright-Field AAPSM Conflict Detection and Correction. IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 115-126 (2007)
249EEAndrew B. Kahng, Bao Liu, Xu Xu: Statistical Timing Analysis in the Presence of Signal-Integrity Effects. IEEE Trans. on CAD of Integrated Circuits and Systems 26(10): 1873-1877 (2007)
248EEPuneet Gupta, Andrew B. Kahng, Chul-Hong Park: Detailed Placement for Enhanced Control of Resist and Etch CDs. IEEE Trans. on CAD of Integrated Circuits and Systems 26(12): 2144-2157 (2007)
247EEAndrew B. Kahng, Ion I. Mandoiu, Xu Xu, Alexander Zelikovsky: Enhanced Design Flow and Optimizations for Multiproject Wafers. IEEE Trans. on CAD of Integrated Circuits and Systems 26(2): 301-311 (2007)
246EELei He, Andrew B. Kahng, King Ho Tam, Jinjun Xiong: Simultaneous Buffer Insertion and Wire Sizing Considering Systematic CMP Variation and Random Leff Variation. IEEE Trans. on CAD of Integrated Circuits and Systems 26(5): 845-857 (2007)
245EEPuneet Gupta, Andrew B. Kahng, Youngmin Kim, Dennis Sylvester: Self-Compensating Design for Reduction of Timing and Leakage Sensitivity to Systematic Pattern-Dependent Variation. IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1614-1624 (2007)
2006
244EEAndrew B. Kahng, Bao Liu, Xu Xu: Statistical gate delay calculation with crosstalk alignment consideration. ACM Great Lakes Symposium on VLSI 2006: 223-228
243EEAndrew B. Kahng: CAD challenges for leading-edge multimedia designs. DAC 2006: 372
242EECharles J. Alpert, Andrew B. Kahng, Cliff C. N. Sze, Qinke Wang: Timing-driven Steiner trees are (practically) free. DAC 2006: 389-392
241EESaumil Shah, Puneet Gupta, Andrew B. Kahng: Standard cell library optimization for leakage reduction. DAC 2006: 983-986
240EEAndrew B. Kahng, Chul-Hong Park, Puneet Sharma, Qinke Wang: Lens aberration aware timing-driven placement. DATE 2006: 890-895
239EEAndrew B. Kahng, Puneet Sharma, Alexander Zelikovsky: Fill for shallow trench isolation CMP. ICCAD 2006: 661-668
238EERasit Onur Topaloglu, Andrew B. Kahng: Interconnect Matching Design Rule Inferring and Optimization through Correlation Extraction. ICCD 2006
237EEAndrew B. Kahng, Bao Liu, Sheldon X.-D. Tan: Efficient decoupling capacitor planning via convex programming methods. ISPD 2006: 102-107
236EEAndrew B. Kahng, Qinke Wang: A faster implementation of APlace. ISPD 2006: 218-220
235EEAndrew B. Kahng, Bao Liu, Xu Xu: Constructing Current-Based Gate Models Based on Existing Timing Library. ISQED 2006: 37-42
234EEAndrew B. Kahng, Bao Liu, Sheldon X.-D. Tan: SMM: Scalable Analysis of Power Delivery Networks by Stochastic Moment Matching. ISQED 2006: 638-643
233EEAndrew B. Kahng, Kambiz Samadi, Puneet Sharma: Study of Floating Fill Impact on Interconnect Capacitance. ISQED 2006: 691-696
232EEAndrew B. Kahng, Swamy Muddu, Puneet Sharma: Impact of Gate-Length Biasing on Threshold-Voltage Selection. ISQED 2006: 747-754
231EEAndrew B. Kahng, Sherief Reda: A tale of two nets: studies of wirelength progression in physical design. SLIP 2006: 17-24
230EEAndrew B. Kahng, Rasit Onur Topaloglu: Generation of design guarantees for interconnect matching. SLIP 2006: 29-34
229EEAndrew B. Kahng, Bao Liu, Xu Xu: Statistical crosstalk aggressor alignment aware interconnect delay calculation. SLIP 2006: 91-97
228EEPuneet Gupta, Andrew B. Kahng: Efficient Design and Analysis of Robust Power Distribution Meshes. VLSI Design 2006: 337-342
227EEPuneet Gupta, Andrew B. Kahng, Chul-Hong Park, Kambiz Samadi, Xu Xu: Wafer Topography-Aware Optical Proximity Correction. IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 2747-2756 (2006)
226EEAndrew B. Kahng, Sherief Reda: Zero-Change Netlist Transformations: A New Technique for Placement Benchmarking. IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 2806-2819 (2006)
225EEAndrew B. Kahng, Ion I. Mandoiu, Sherief Reda, Xu Xu, Alexander Zelikovsky: Computer-Aided Optimization of DNA Array Design and Manufacturing. IEEE Trans. on CAD of Integrated Circuits and Systems 25(2): 305-320 (2006)
224EEAndrew B. Kahng, Sherief Reda: New and improved BIST diagnosis methods from combinatorial Group testing theory. IEEE Trans. on CAD of Integrated Circuits and Systems 25(3): 533-543 (2006)
223EEGi-Joon Nam, Sherief Reda, Charles J. Alpert, Paul Villarrubia, Andrew B. Kahng: A Fast Hierarchical Quadratic Placement Algorithm. IEEE Trans. on CAD of Integrated Circuits and Systems 25(4): 678-691 (2006)
222EEAndrew B. Kahng, Sherief Reda: Wirelength minimization for min-cut placements via placement feedback. IEEE Trans. on CAD of Integrated Circuits and Systems 25(7): 1301-1312 (2006)
221EEPuneet Gupta, Andrew B. Kahng, Puneet Sharma, Dennis Sylvester: Gate-length biasing for runtime-leakage control. IEEE Trans. on CAD of Integrated Circuits and Systems 25(8): 1475-1485 (2006)
2005
220 William H. Joyner Jr., Grant Martin, Andrew B. Kahng: Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005 ACM 2005
219EEPuneet Gupta, Andrew B. Kahng, Chul-Hong Park: Detailed placement for improved depth of focus and CD control. ASP-DAC 2005: 343-348
218EEChung-Kuan Cheng, Steve Lin, Andrew B. Kahng, Keh-Jeng Chang, Vijay Pitchumani, Toshiyuki Shibuya, Roberto Suaya, Zhiping Yu, Fook-Luen Heng, Don MacMillen: Panel I: who is responsible for the design for manufacturability issues in the era of nano-technologies? ASP-DAC 2005
217EEPuneet Gupta, Andrew B. Kahng, Youngmin Kim, Dennis Sylvester: Advanced Timing Analysis Based on Post-OPC Extraction of Critical Dimensions. DAC 2005: 365-368
216EEYongseok Cheon, Pei-Hsin Ho, Andrew B. Kahng, Sherief Reda, Qinke Wang: Power-aware placement. DAC 2005: 795-800
215EECharles Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu, Alexander Zelikovsky: Bright-Field AAPSM Conflict Detection and Correction. DATE 2005: 908-913
214 Charles Chiang, Andrew B. Kahng, Subarna Sinha, Xu Xu: Fast and efficient phase conflict detection and correction in standard-cell layouts. ICCAD 2005: 149-156
213 Andrew B. Kahng, Sherief Reda: Intrinsic shortest path length: a new, accurate a priori wirelength estimator. ICCAD 2005: 173-180
212 Andrew B. Kahng, Sherief Reda, Qinke Wang: Architecture and details of a high quality, large-scale analytical placer. ICCAD 2005: 891-898
211EEAndrew B. Kahng, Bao Liu, Qinke Wang: Supply Voltage Degradation Aware Analytical Placement. ICCD 2005: 437-443
210EEAndrew B. Kahng, Swamy Muddu, Puneet Sharma: Defocus-aware leakage estimation and control. ISLPED 2005: 263-268
209EECharles J. Alpert, Andrew B. Kahng, Gi-Joon Nam, Sherief Reda, Paul Villarrubia: A semi-persistent clustering technique for VLSI circuit placement. ISPD 2005: 200-207
208EEAndrew B. Kahng, Sherief Reda: Evaluation of placer suboptimality via zero-change netlist transformations. ISPD 2005: 208-215
207EEAndrew B. Kahng, Sherief Reda, Qinke Wang: APlace: a general analytic placement framework. ISPD 2005: 233-235
206EELei He, Andrew B. Kahng, King Ho Tam, Jinjun Xiong: Simultaneous buffer insertion and wire sizing considering systematic CMP variation and random leff variation. ISPD 2005: 78-85
205EEPuneet Gupta, Andrew B. Kahng, Dennis Sylvester, Jie Yang: Performance Driven OPC for Mask Cost Reduction. ISQED 2005: 270-275
204EEPuneet Gupta, Andrew B. Kahng, Puneet Sharma: A Practical Transistor-Level Dual Threshold Voltage Assignment Methodology. ISQED 2005: 421-426
203EEPuneet Gupta, Andrew B. Kahng, Stefanus Mantik: Routing-aware scan chain ordering. ACM Trans. Design Autom. Electr. Syst. 10(3): 546-560 (2005)
202EEChristoph Albrecht, Andrew B. Kahng, Ion I. Mandoiu, Alexander Zelikovsky: Multicommodity Flow Algorithms for Buffered Global Routing CoRR abs/cs/0508045: (2005)
201EEAndrew B. Kahng, Grant Martin: DAC Highlights. IEEE Design & Test of Computers 22(3): 197-199 (2005)
200EEHongyu Chen, Chung-Kuan Cheng, Andrew B. Kahng, Ion I. Mandoiu, Qinke Wang, Bo Yao: The Y architecture for on-chip interconnect: analysis and methodology. IEEE Trans. on CAD of Integrated Circuits and Systems 24(4): 588-599 (2005)
199EEAndrew B. Kahng, Qinke Wang: Implementation and extensibility of an analytic placer. IEEE Trans. on CAD of Integrated Circuits and Systems 24(5): 734-747 (2005)
198EEPuneet Gupta, Andrew B. Kahng, Ion I. Mandoiu, Puneet Sharma: Layout-aware scan chain synthesis for improved path delay fault coverage. IEEE Trans. on CAD of Integrated Circuits and Systems 24(7): 1104-1114 (2005)
197EEYu Chen, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky, Yuhong Zheng: Compressible area fill synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 24(8): 1169-1187 (2005)
2004
196 Sharad Malik, Limor Fix, Andrew B. Kahng: Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004 ACM 2004
195EEAndrew B. Kahng, Igor L. Markov, Sherief Reda: On legalization of row-based placements. ACM Great Lakes Symposium on VLSI 2004: 214-219
194EEAndrew B. Kahng, Sherief Reda: Combinatorial group testing methods for the BIST diagnosis problem. ASP-DAC 2004: 113-116
193EEHongyu Chen, Chung-Kuan Cheng, Andrew B. Kahng, Makoto Mori, Qinke Wang: Optimal planning for mesh-based power distribution. ASP-DAC 2004: 444-449
192EELuigi Capodieci, Puneet Gupta, Andrew B. Kahng, Dennis Sylvester, Jie Yang: Toward a methodology for manufacturability-driven design rule exploration. DAC 2004: 311-316
191EEPuneet Gupta, Andrew B. Kahng, Puneet Sharma, Dennis Sylvester: Selective gate-length biasing for cost-effective runtime leakage control. DAC 2004: 327-330
190EEAndrew B. Kahng, Sherief Reda: Placement feedback: a concept and method for better min-cut placements. DAC 2004: 357-362
189EEDominic A. Antonelli, Danny Z. Chen, Timothy J. Dysart, Xiaobo Sharon Hu, Andrew B. Kahng, Peter M. Kogge, Richard C. Murphy, Michael T. Niemier: Quantum-Dot Cellular Automata (QCA) circuit partitioning: problem modeling and solutions. DAC 2004: 363-368
188EEAndrew B. Kahng, Igor L. Markov, Sherief Reda: Boosting: Min-Cut Placement with Improved Signal Delay. DATE 2004: 1098-1103
187EEAndrew B. Kahng, Qinke Wang: An analytic placer for mixed-size placement and timing-driven placement. ICCAD 2004: 565-572
186EEAndrew B. Kahng, Qinke Wang: Implementation and extensibility of an analytic placer. ISPD 2004: 18-25
185EEAndrew B. Kahng, Ion I. Mandoiu, Qinke Wang, Xu Xu, Alexander Zelikovsky: Multi-project reticle floorplanning and wafer dicing. ISPD 2004: 70-77
184EEAndrew B. Kahng: Manufacturability . ISQED 2004: 8
183EEPuneet Gupta, Andrew B. Kahng, Youngmin Kim, Dennis Sylvester: Investigation of performance metrics for interconnect stack architectures. SLIP 2004: 23-29
182EEPuneet Gupta, Andrew B. Kahng: Wire Swizzling to Reduce Delay Uncertainty Due to Capacitive Coupling. VLSI Design 2004: 431-436
181EEDon Edenfeld, Andrew B. Kahng, Mike Rodgers, Yervant Zorian: 2003 Technology Roadmap for Semiconductors. IEEE Computer 37(1): 47-56 (2004)
180EEDwight D. Hill, Andrew B. Kahng: Guest Editors' Introduction: RTL to GDSII - From Foilware to Standard Practice. IEEE Design & Test of Computers 21(1): 9-12 (2004)
179EEAndrew B. Kahng, Bao Liu, Ion I. Mandoiu: Nontree routing for reliability and yield improvement [IC layout]. IEEE Trans. on CAD of Integrated Circuits and Systems 23(1): 148-156 (2004)
178EEAndrew E. Caldwell, Hyun-Jin Choi, Andrew B. Kahng, Stefanus Mantik, Miodrag Potkonjak, Gang Qu, Jennifer L. Wong: Effective iterative techniques for fingerprinting design IP. IEEE Trans. on CAD of Integrated Circuits and Systems 23(2): 208-215 (2004)
177EEAndrew B. Kahng, Xu Xu: Local unidirectional bias for cutsize-delay tradeoff in performance-driven bipartitioning. IEEE Trans. on CAD of Integrated Circuits and Systems 23(4): 464-471 (2004)
176EEAndrew B. Kahng, Ion I. Mandoiu, Pavel A. Pevzner, Sherief Reda, Alexander Zelikovsky: Scalable Heuristics for Design of DNA Probe Arrays. Journal of Computational Biology 11(2/3): 429-447 (2004)
175EEAndrew B. Kahng, Sherief Reda: Match twice and stitch: a new TSP tour construction heuristic. Oper. Res. Lett. 32(6): 499-509 (2004)
2003
174EEPuneet Gupta, Andrew B. Kahng, Dennis Sylvester, Jie Yang: A cost-driven lithographic correction methodology based on off-the-shelf sizing tools. DAC 2003: 16-21
173EEYu Chen, Puneet Gupta, Andrew B. Kahng: Performance-impact limited area fill synthesis. DAC 2003: 22-27
172EEAndrew B. Kahng, Shekhar Borkar, John M. Cohn, Antun Domic, Patrick Groeneveld, Louis Scheffer, Jean-Pierre Schoellkopf: Nanometer design: place your bets. DAC 2003: 546-547
171EEHongyu Chen, Chung-Kuan Cheng, Nan-Chi Chou, Andrew B. Kahng, John F. MacDonald, Peter Suaris, Bo Yao, Zhengyong Zhu: An algebraic multigrid solver for analytical placement with layout based clustering. DAC 2003: 794-799
170EEParthasarathi Dasgupta, Andrew B. Kahng, Swamy Muddu: A Novel Metric for Interconnect Architecture Performance. DATE 2003: 10448-10455
169EEYu Chen, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky, Yuhong Zheng: Area Fill Generation With Inherent Data Volume Reduction. DATE 2003: 10868-10875
168EEHongyu Chen, Chung-Kuan Cheng, Andrew B. Kahng, Ion I. Mandoiu, Qinke Wang, Bo Yao: The Y-Architecture for On-Chip Interconnect: Analysis and Methodology. ICCAD 2003: 13-20
167EEAndrew B. Kahng, Ion I. Mandoiu, Sherief Reda, Xu Xu, Alexander Zelikovsky: Evaluation of Placement Techniques for DNA Probe Array Layout. ICCAD 2003: 262-269
166EEPuneet Gupta, Andrew B. Kahng: Manufacturing-Aware Physical Design. ICCAD 2003: 681-688
165EEPuneet Gupta, Andrew B. Kahng, Ion I. Mandoiu, Puneet Sharma: Layout-Aware Scan Chain Synthesis for Improved Path Delay Fault Coverage. ICCAD 2003: 754-759
164EEAndrew B. Kahng, Ion I. Mandoiu, Sherief Reda, Xu Xu, Alexander Zelikovsky: Design Flow Enhancements for DNA Arrays. ICCD 2003: 116-
163EEAndrew B. Kahng: Research directions for coevolution of rules and routers. ISPD 2003: 122-125
162EEAndrew B. Kahng, Xu Xu: Local unidirectional bias for smooth cutsize-delay tradeoff in performance-driven bipartitioning. ISPD 2003: 81-86
161EEAndrew B. Kahng, Igor L. Markov: Impact of Interoperability on CAD-IP Reuse: An Academic Viewpoint. ISQED 2003: 208-213
160EEPuneet Gupta, Andrew B. Kahng: Quantifying Error in Dynamic Power Estimation of CMOS Circuits. ISQED 2003: 273-278
159EEPuneet Gupta, Andrew B. Kahng, Stefanus Mantik: A Proposal for Routing-Based Timing-Driven Scan Chain Ordering. ISQED 2003: 339-343
158EEAndrew B. Kahng, Bao Liu: Q-Tree: A New Iterative Improvement Approach for Buffered Interconnect Optimization. ISVLSI 2003: 183-188
157EEAndrew B. Kahng, Ion I. Mandoiu, Pavel A. Pevzner, Sherief Reda, Alexander Zelikovsky: Engineering a scalable placement heuristic for DNA probe arrays. RECOMB 2003: 148-156
156EEAndrew B. Kahng, Xu Xu: Accurate pseudo-constructive wirelength and congestion estimation. SLIP 2003: 61-68
155EEHongyu Chen, Chung-Kuan Cheng, Andrew B. Kahng, Ion I. Mandoiu, Qinke Wang: Estimation of wirelength reduction for lambda-geometry vs. manhattan placement and routing. SLIP 2003: 71-76
154 Andrew B. Kahng: Error Tolerance. IEEE Design & Test of Computers 20(1): 86-87 (2003)
153 Andrew B. Kahng: Bringing down NRE. IEEE Design & Test of Computers 20(3): 110-111 (2003)
152 Andrew B. Kahng: How much variability can designers tolerate? IEEE Design & Test of Computers 20(6): 96-97 (2003)
151EEYu Cao, Chenming Hu, Xuejue Huang, Andrew B. Kahng, Igor L. Markov, Michael Oliver, Dirk Stroobandt, Dennis Sylvester: Improved a priori interconnect predictions and technology extrapolation in the GTX system. IEEE Trans. VLSI Syst. 11(1): 3-14 (2003)
150EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Hierarchical whitespace allocation in top-down placement. IEEE Trans. on CAD of Integrated Circuits and Systems 22(11): 1550-1556 (2003)
149EECharles J. Alpert, Andrew B. Kahng, Bao Liu, Ion I. Mandoiu, Alexander Zelikovsky: Minimum buffered routing with bounded capacitive load for slew rate and reliability control. IEEE Trans. on CAD of Integrated Circuits and Systems 22(3): 241-253 (2003)
148EEChristoph Albrecht, Andrew B. Kahng, Bao Liu, Ion I. Mandoiu, Alexander Zelikovsky: On the skew-bounded minimum-buffer routing tree problem. IEEE Trans. on CAD of Integrated Circuits and Systems 22(7): 937-945 (2003)
2002
147EEAndrew B. Kahng, Ronald Collett, Patrick Groeneveld, Lavi Lev, Nancy Nettleton, Paul K. Rodman, Lambert van den Hoven: Tools or users: which is the bigger bottleneck? DAC 2002: 76-77
146EEAndrew B. Kahng, Bao Liu, Ion I. Mandoiu: Non-tree routing for reliability and yield improvement. ICCAD 2002: 260-266
145EEAndrew B. Kahng: A roadmap and vision for physical design. ISPD 2002: 112-117
144EEYu Chen, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky: Closing the smoothness and uniformity gap in area fill synthesis. ISPD 2002: 137-142
143EEAndrew B. Kahng, Stefanus Mantik, Igor L. Markov: Min-max placement for large-scale timing optimization. ISPD 2002: 143-148
142EEAndrew B. Kahng, Gary Smith: A New Design Cost Model for the 2001 ITRS (invited). ISQED 2002: 190-193
141EEAndrew B. Kahng, Stefanus Mantik: Measurement of Inherent Noise in EDA Tools. ISQED 2002: 206-212
140 C. Bandela, Yu Chen, Andrew B. Kahng, Ion I. Mandoiu, Alexander Zelikovsky: Auctions with Buyer Preferences. Information Systems: The e-Business Challenge 2002: 223-238
139EEChristoph Albrecht, Andrew B. Kahng, Ion I. Mandoiu, Alexander Zelikovsky: Floorplan Evaluation with Timing-Driven Global Wireplanning, Pin Assignment and Buffer/Wire Sizing. VLSI Design 2002: 580-
138EEAndrew B. Kahng, Ion I. Mandoiu, Pavel A. Pevzner, Sherief Reda, Alexander Zelikovsky: Border Length Minimization in DNA Array Design. WABI 2002: 435-448
137EEAlan Allan, Don Edenfeld, William H. Joyner Jr., Andrew B. Kahng, Mike Rodgers, Yervant Zorian: 2001 Technology Roadmap for Semiconductors. IEEE Computer 35(1): 42-53 (2002)
136EEAndrew B. Kahng: Variability. IEEE Design & Test of Computers 19(3): 120, 116 (2002)
135 Andrew B. Kahng: The Road Ahead: The significance of packaging. IEEE Design & Test of Computers 19(6): 104-105 (2002)
134EEChung-Kuan Cheng, Andrew B. Kahng, Bao Liu, Dirk Stroobandt: Toward better wireload models in the presence of obstacles. IEEE Trans. VLSI Syst. 10(2): 177-189 (2002)
133EEYu Chen, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky: Area fill synthesis for uniform layout density. IEEE Trans. on CAD of Integrated Circuits and Systems 21(10): 1132-1147 (2002)
132EEFeodor F. Dragan, Andrew B. Kahng, Ion I. Mandoiu, Sudhakar Muddu, Alexander Zelikovsky: Provably good global buffering by generalized multiterminalmulticommodity flow approximation. IEEE Trans. on CAD of Integrated Circuits and Systems 21(3): 263-274 (2002)
131EEJoshua N. Cooper, Robert B. Ellis, Andrew B. Kahng: Asymmetric Binary Covering Codes. J. Comb. Theory, Ser. A 100(2): 232-249 (2002)
2001
130EEFeodor F. Dragan, Andrew B. Kahng, Ion I. Mandoiu, Sudhakar Muddu, Alexander Zelikovsky: Provably good global buffering by multi-terminal multicommodity flow approximation. ASP-DAC 2001: 120-125
129EEAndrew B. Kahng, Shailesh Vaya, Alexander Zelikovsky: New graph bipartizations for double-exposure, bright field alternating phase-shift mask layout. ASP-DAC 2001: 133-138
128EEYu Chen, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky: Hierarchical dummy fill for process uniformity. ASP-DAC 2001: 139-144
127EEHidetoshi Onodera, Andrew B. Kahng, Wayne Wei-Ming Dai, Sani R. Nassif, Juho Kim, Akira Tanabe, Toshihiro Hattori: Beyond the red brick wall (panel): challenges and solutions in 50nm physical design. ASP-DAC 2001: 267-268
126EEAndrew B. Kahng: Design technology productivity in the DSM era (invited talk). ASP-DAC 2001: 443-448
125EEChung-Kuan Cheng, Andrew B. Kahng, Bao Liu, Dirk Stroobandt: Toward better wireload models in the presence of obstacles. ASP-DAC 2001: 527-532
124EEAndrew B. Kahng, Bing J. Sheu, Nancy Nettleton, John M. Cohn, Shekhar Borkar, Louis Scheffer, Ed Cheng, Sang Wang: Panel: Is Nanometer Design Under Control? DAC 2001: 591-592
123EECharles J. Alpert, Andrew B. Kahng, Bao Liu, Ion I. Mandoiu, Alexander Zelikovsky: Minimum-Buffered Routing of Non-Critical Nets for Slew Rate and Reliability Control. ICCAD 2001: 408-
122EECharles J. Alpert, Milos Hrkic, Jiang Hu, Andrew B. Kahng, John Lillis, Bao Liu, Stephen T. Quay, Sachin S. Sapatnekar, A. J. Sullivan, Paul Villarrubia: Buffered Steiner trees for difficult instances. ISPD 2001: 4-9
121EEAndrew B. Kahng, Sudhakar Muddu, Niranjan Pol, Devendra Vidhani: Noise Model for Multiple Segmented Coupled RC Interconnects. ISQED 2001: 145-150
120EEAndrew B. Kahng, Stefanus Mantik: A System for Automatic Recording and Prediction of Design Quality Metrics. ISQED 2001: 81-86
119EEAndrew B. Kahng, Ronald Collett, Ton. H. van de Kraats: Design Metrics to Achieve Design Quality. ISQED 2001: 9
118EEKenneth D. Boese, Andrew B. Kahng, Stefanus Mantik: On the relevance of wire load models. SLIP 2001: 91-98
117EEChung-Kuan Cheng, Andrew B. Kahng, Bao Liu: Interconnect implications of growth-based structural models for VLSI circuits. SLIP 2001: 99-106
116EEFeodor F. Dragan, Andrew B. Kahng, Ion I. Mandoiu, Sudhakar Muddu, Alexander Zelikovsky: Practical Approximation Algorithms for Separable Packing Linear Programs. WADS 2001: 325-337
115 William H. Joyner Jr., Andrew B. Kahng: Guest Editor's Introduction: Roadmaps and Visions for Design and Test. IEEE Design & Test of Computers 18(6): 4-5 (2001)
114EEAndrew B. Kahng, John Lach, William H. Mangione-Smith, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe: Constraint-based watermarking techniques for design IP protection. IEEE Trans. on CAD of Integrated Circuits and Systems 20(10): 1236-1252 (2001)
113EEAndrew B. Kahng, Stefanus Mantik, Dirk Stroobandt: Toward accurate models of achievable routing. IEEE Trans. on CAD of Integrated Circuits and Systems 20(5): 648-659 (2001)
2000
112EEYu Chen, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky: Monte-Carlo algorithms for layout density control. ASP-DAC 2000: 523-528
111EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Improved algorithms for hypergraph bipartitioning. ASP-DAC 2000: 661-666
110EEJennifer Smith, Tom Quan, Andrew B. Kahng: EDA meets.COM (panel session): how E-services will change the EDA business model. DAC 2000: 253
109EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Can recursive bisection alone produce routable placements? DAC 2000: 477-482
108EEYu Chen, Andrew B. Kahng, Gabriel Robins, Alexander Zelikovsky: Practical iterated fill synthesis for CMP uniformity. DAC 2000: 671-674
107EEAndrew E. Caldwell, Yu Cao, Andrew B. Kahng, Farinaz Koushanfar, Hua Lu, Igor L. Markov, Michael Oliver, Dirk Stroobandt, Dennis Sylvester: GTX: the MARCO GSRC technology extrapolation system. DAC 2000: 693-698
106EEStephen Fenstermaker, David George, Andrew B. Kahng, Stefanus Mantik, Bart Thielges: METRICS: a system architecture for design process optimization. DAC 2000: 705-710
105EEAndrew B. Kahng, Sudhakar Muddu, Egino Sarto: On switch factor based analysis of coupled RC interconnects. DAC 2000: 79-84
104EEMarcelo O. Johann, Andrew E. Caldwell, Ricardo Augusto da Luz Reis, Andrew B. Kahng: Admissibility Proofs for the LCS* Algorithm. IBERAMIA-SBIA 2000: 236-244
103 Feodor F. Dragan, Andrew B. Kahng, Ion I. Mandoiu, Sudhakar Muddu, Alexander Zelikovsky: Provably Good Global Buffering Using an Available Buffer Block Plan. ICCAD 2000: 104-109
102 Andrew B. Kahng, Stefanus Mantik: On Mismatches between Incremental Optimizers and Instance Perturbations in Physical Design Tools. ICCAD 2000: 17-21
101 Yu Cao, Chenming Hu, Xuejue Huang, Andrew B. Kahng, Sudhakar Muddu, Dirk Stroobandt, Dennis Sylvester: Effects of Global Interconnect Optimizations on Performance Estimation of Deep Submicron Design. ICCAD 2000: 56-61
100EEAndrew B. Kahng: Classical floorplanning harmful? ISPD 2000: 207-213
99EEAndrew B. Kahng, Stefanus Mantik, Dirk Stroobandt: Requirements for models of achievable routing. ISPD 2000: 4-11
98EEAndrew B. Kahng, Dirk Stroobandt: Wiring layer assignments with consistent stage delays. SLIP 2000: 115-122
97EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Design and Implementation of Move-Based Heuristics for VLSI Hypergraph Partitioning. ACM Journal of Experimental Algorithmics 5: 5 (2000)
96EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Optimal partitioners and end-case placers for standard-cell layout. IEEE Trans. on CAD of Integrated Circuits and Systems 19(11): 1304-1313 (2000)
95EEPiotr Berman, Andrew B. Kahng, Devendra Vidhani, Huijuan Wang, Alexander Zelikovsky: Optimal phase conflict removal for layout of dark field alternatingphase shifting masks. IEEE Trans. on CAD of Integrated Circuits and Systems 19(2): 175-187 (2000)
94EECharles J. Alpert, Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Hypergraph partitioning with fixed vertices [VLSI CAD]. IEEE Trans. on CAD of Integrated Circuits and Systems 19(2): 267-272 (2000)
1999
93EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Design and Implementation of the Fiduccia-Mattheyses Heuristic for VLSI Netlist Partitioning. ALENEX 1999: 177-193
92EEAndrew B. Kahng, Gabriel Robins, Anish Singh, Alexander Zelikovsky: New Multilevel and Hierarchical Algorithms for Layout Density Control. ASP-DAC 1999: 221-224
91EERoss Baldick, Andrew B. Kahng, Andrew A. Kennings, Igor L. Markov: Function Smoothing with Applications to VLSI Layout. ASP-DAC 1999: 225-
90EEAndrew B. Kahng, Paul Tucker, Alexander Zelikovsky: Optimization of Linear Placements for Wirelength Minimization with Free Sites. ASP-DAC 1999: 241-244
89EEAndrew E. Caldwell, Andrew B. Kahng, Andrew A. Kennings, Igor L. Markov: Hypergraph Partitioning for VLSI CAD: Methodology for Heuristic Development, Experimentation and Reporting. DAC 1999: 349-354
88EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Hypergraph Partitioning with Fixed Vertices. DAC 1999: 355-359
87EEAndrew B. Kahng, Y. C. Pati, Warren Grobman, Robert Pack, Lance A. Glasser: Subwavelength Lithography: How Will It Affect Your Design Flow? (Panel). DAC 1999: 798
86EEAndrew B. Kahng, Y. C. Pati: Subwavelength Lithography and Its Potential Impact on Design and EDA. DAC 1999: 799-804
85EEAndrew E. Caldwell, Hyun-Jin Choi, Andrew B. Kahng, Stefanus Mantik, Miodrag Potkonjak, Gang Qu, Jennifer L. Wong: Effective Iterative Techniques for Fingerprinting Design IP. DAC 1999: 843-848
84EEYu Chen, Andrew B. Kahng, Gang Qu, Alexander Zelikovsky: The associative-skew clock routing problem. ICCAD 1999: 168-172
83EEAndrew B. Kahng, Darko Kirovski, Stefanus Mantik, Miodrag Potkonjak, Jennifer L. Wong: Copy detection for intellectual property protection of VLSI designs. ICCAD 1999: 600-605
82EEAndrew B. Kahng, Y. C. Pati: Subwavelength optical lithography: challenges and impact on physical design. ISPD 1999: 112-119
81EEPiotr Berman, Andrew B. Kahng, Devendra Vidhani, Huijuan Wang, Alexander Zelikovsky: Optimal phase conflict removal for layout of dark field alternating phase shifting masks. ISPD 1999: 121-126
80EECharles J. Alpert, Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Partitioning with terminals: a "new" problem and new benchmarks. ISPD 1999: 151-157
79EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Optimal partitioners and end-case placers for standard-cell layout. ISPD 1999: 90-96
78 Andrew B. Kahng: Mini-Tutorial: IC Layout and Manufacturability: Critical Links and Design Flow Implications. VLSI Design 1999: 100-105
77 Andrew B. Kahng, Gabriel Robins, Anish Singh, Alexander Zelikovsky: New and Exact Filling Algorithms for Layout Density Control. VLSI Design 1999: 106-110
76 Andrew B. Kahng, Sudhakar Muddu, Egino Sarto: Interconnect Optimization Strategies for High-Performance VLSI Designs. VLSI Design 1999: 464-469
75EEAndrew B. Kahng, Sudhakar Muddu: Improved Effective Capacitance Computations for Use in Logic and Layout Optimization. VLSI Design 1999: 578-583
74EEPiotr Berman, Andrew B. Kahng, Devendra Vidhani, Alexander Zelikovsky: The T-join Problem in Sparse Graphs: Applications to Phase Assignment Problem in VLSI Mask Layout. WADS 1999: 25-36
73EECharles J. Alpert, Andrew B. Kahng, So-Zen Yao: Spectral Partitioning with Multiple Eigenvectors. Discrete Applied Mathematics 90(1-3): 3-26 (1999)
72EEAndrew B. Kahng, Gabriel Robins, Anish Singh, Alexander Zelikovsky: Filling algorithms and analyses for layout density control. IEEE Trans. on CAD of Integrated Circuits and Systems 18(4): 445-462 (1999)
71EEAndrew E. Caldwell, Andrew B. Kahng, Stefanus Mantik, Igor L. Markov, Alexander Zelikovsky: On wirelength estimations for row-based placement. IEEE Trans. on CAD of Integrated Circuits and Systems 18(9): 1265-1278 (1999)
1998
70EEAndrew B. Kahng, John Lach, William H. Mangione-Smith, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe: Watermarking Techniques for Intellectual Property Protection. DAC 1998: 776-781
69EEAndrew B. Kahng, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe: Robust IP Watermarking Methodologies for Physical Design. DAC 1998: 782-787
68EEAndrew B. Kahng, Sudhakar Muddu, Egino Sarto, Rahul Sharma: Interconnect Tuning Strategies for High-Performance Ics. DATE 1998: 471-478
67EEAndrew B. Kahng, Sudhakar Muddu: New efficient algorithms for computing effective capacitance. ISPD 1998: 147-151
66EEAndrew B. Kahng: Futures for partitioning in physical design (tutorial). ISPD 1998: 190-193
65EEAndrew E. Caldwell, Andrew B. Kahng, Stefanus Mantik, Igor L. Markov, Alexander Zelikovsky: On wirelength estimations for row-based placement. ISPD 1998: 4-11
64EEAndrew B. Kahng, Gabriel Robins, Anish Singh, Huijuan Wang, Alexander Zelikovsky: Filling and slotting: analysis and algorithms. ISPD 1998: 95-102
63EEJason Cong, Andrew B. Kahng, Cheng-Kok Koh, Chung-Wen Albert Tsao: Bounded-skew clock and Steiner routing. ACM Trans. Design Autom. Electr. Syst. 3(3): 341-388 (1998)
62EEAndrew B. Kahng, Majid Sarrafzadeh: Guest Editorial. IEEE Trans. on CAD of Integrated Circuits and Systems 17(1): 1-2 (1998)
61EEJason Cong, Andrew B. Kahng, Kwok-Shing Leung: Efficient algorithms for the minimum shortest path Steiner arborescence problem with applications to VLSI physical design. IEEE Trans. on CAD of Integrated Circuits and Systems 17(1): 24-39 (1998)
60EECharles J. Alpert, Tony F. Chan, Andrew B. Kahng, Igor L. Markov, Pep Mulet: Faster minimization of linear wirelength for global placement. IEEE Trans. on CAD of Integrated Circuits and Systems 17(1): 3-13 (1998)
59EECharles J. Alpert, Jen-Hsin Huang, Andrew B. Kahng: Multilevel circuit partitioning. IEEE Trans. on CAD of Integrated Circuits and Systems 17(8): 655-667 (1998)
58EEAndrew B. Kahng, Gabriel Robins, Elizabeth A. Walkup: How to test a tree. Networks 32(3): 189-197 (1998)
1997
57EECharles J. Alpert, Jen-Hsin Huang, Andrew B. Kahng: Multilevel Circuit Partitioning. DAC 1997: 530-533
56EEAndrew B. Kahng, Chung-Wen Albert Tsao: More Practical Bounded-Skew Clock Routing. DAC 1997: 594-599
55EEJason Cong, Lei He, Andrew B. Kahng, David Noice, Nagesh Shirali, Steve H.-C. Yen: Analysis and Justification of a Simple, Practical 2 1/2-D Capacitance Extraction Methodology. DAC 1997: 627-632
54EEDennis J.-H. Huang, Andrew B. Kahng: Partitioning-based standard-cell global placement with an exact objective. ISPD 1997: 18-25
53EECharles J. Alpert, Tony F. Chan, Dennis J.-H. Huang, Andrew B. Kahng, Igor L. Markov, Pep Mulet, Kenneth Yan: Faster minimization of linear wirelength for global placement. ISPD 1997: 4-11
52EEJason Cong, Andrew B. Kahng, Kwok-Shing Leung: Efficient heuristics for the minimum shortest path Steiner arborescence problem with applications to VLSI physical design. ISPD 1997: 88-95
51EEAndrew B. Kahng, Sudhakar Muddu: Analysis of RC interconnections under ramp input. ACM Trans. Design Autom. Electr. Syst. 2(2): 168-192 (1997)
50 Y. Uny Cao, Alex S. Fukunaga, Andrew B. Kahng: Cooperative Mobile Robotics: Antecedents and Directions. Auton. Robots 4(1): 7-27 (1997)
49EELars W. Hagen, Dennis J.-H. Huang, Andrew B. Kahng: On implementation choices for iterative improvement partitioning algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 16(10): 1199-1205 (1997)
48EEAndrew B. Kahng, Sudhakar Muddu: An analytical delay model for RLC interconnects. IEEE Trans. on CAD of Integrated Circuits and Systems 16(12): 1507-1514 (1997)
47EELars W. Hagen, Andrew B. Kahng: Combining problem reduction and adaptive multistart: a new technique for superior iterative partitioning. IEEE Trans. on CAD of Integrated Circuits and Systems 16(7): 709-717 (1997)
46 Inki Hong, Andrew B. Kahng, Byung Ro Moon: Improved Large-Step Markov Chain Variants for the Symmetric TSP. J. Heuristics 3(1): 63-81 (1997)
45EEAndrew B. Kahng, Chung-Wen Albert Tsao: Practical Bounded-Skew Clock Routing. VLSI Signal Processing 16(2-3): 199-215 (1997)
1996
44EEAndrew B. Kahng, Sudhakar Muddu: Analysis of RC Interconnections Under Ramp Input. DAC 1996: 533-538
43EEAndrew B. Kahng, Kei Masuko, Sudhakar Muddu: Analytical delay models for VLSI interconnects under ramp input. ICCAD 1996: 30-36
42EECharles J. Alpert, Andrew B. Kahng: A general framework for vertex orderings with applications to circuit clustering. IEEE Trans. VLSI Syst. 4(2): 240-246 (1996)
41EEAndrew B. Kahng, Chung-Wen Albert Tsao: Planar-DME: a single-layer zero-skew clock tree router. IEEE Trans. on CAD of Integrated Circuits and Systems 15(1): 8-19 (1996)
1995
40EELars W. Hagen, Dennis J.-H. Huang, Andrew B. Kahng: Quantified Suboptimality of VLSI Layout Heuristics. DAC 1995: 216-221
39EEDennis J.-H. Huang, Andrew B. Kahng, Chung-Wen Albert Tsao: On the Bounded-Skew Clock and Steiner Routing Problems. DAC 1995: 508-513
38EELars W. Hagen, Dennis J.-H. Huang, Andrew B. Kahng: On implementation choices for iterative improvement partitioning algorithms. EURO-DAC 1995: 144-149
37EEDennis J.-H. Huang, Andrew B. Kahng: Multi-way System Partitioning into a Single Type or Multiple Types of FPGAs. FPGA 1995: 140-145
36EEJason Cong, Andrew B. Kahng, Cheng-Kok Koh, Chung-Wen Albert Tsao: Bounded-skew clock and Steiner routing under Elmore delay. ICCAD 1995: 66-71
35 Andrew B. Kahng, Byung Ro Moon: Toward More Powerful Recombinations. ICGA 1995: 96-103
34EECharles J. Alpert, Andrew B. Kahng: Multiway partitioning via geometric embeddings, orderings, and dynamic programming. IEEE Trans. on CAD of Integrated Circuits and Systems 14(11): 1342-1358 (1995)
33EEKenneth D. Boese, Andrew B. Kahng, Bernard A. McCoy, Gabriel Robins: Near-optimal critical sink routing tree constructions. IEEE Trans. on CAD of Integrated Circuits and Systems 14(12): 1417-1436 (1995)
32EECharles J. Alpert, T. C. Hu, Dennis J.-H. Huang, Andrew B. Kahng, David R. Karger: Prim-Dijkstra tradeoffs for improved performance-driven routing tree design. IEEE Trans. on CAD of Integrated Circuits and Systems 14(7): 890-896 (1995)
31EET. C. Hu, Andrew B. Kahng, Chung-Wen Albert Tsao: Old Bachelor Acceptance: A New Class of Non-Monotone Threshold Accepting Methods. INFORMS Journal on Computing 7(4): 417-425 (1995)
1994
30EEKenneth D. Boese, Andrew B. Kahng, Bernard A. McCoy, Gabriel Robins: Rectilinear Steiner Trees with Minimum Elmore Delay. DAC 1994: 381-386
29EEAndrew B. Kahng, Sudhakar Muddu: Delay Analysis of VLSI Interconnections Using the Diffusion Equation Model. DAC 1994: 563-569
28EECharles J. Alpert, Andrew B. Kahng: Multi-Way Partitioning Via Spacefilling curves and Dynamic Programming. DAC 1994: 652-657
27EESudhakar Muddu, Andrew B. Kahng: Optimal equivalent circuits for interconnect delay calculations using moments. EURO-DAC 1994: 164-169
26EEChung-Wen Albert Tsao, Andrew B. Kahng: Planar-DME: improved planar zero-skew clock routing with minimum pathlength delay. EURO-DAC 1994: 440-445
25EEAndrew B. Kahng, Chung-Wen Albert Tsao: Low-cost single-layer clock trees with exact zero Elmore delay skew. ICCAD 1994: 213-218
24EECharles J. Alpert, Andrew B. Kahng: A general framework for vertex orderings, with applications to netlist clustering. ICCAD 1994: 63-67
23EELars W. Hagen, Andrew B. Kahng, Fadi J. Kurdahi, Champaka Ramachandran: On the intrinsic Rent parameter and spectra-based partitioning methodologies. IEEE Trans. on CAD of Integrated Circuits and Systems 13(1): 27-37 (1994)
1993
22EEKenneth D. Boese, Andrew B. Kahng, Gabriel Robins: High-Performance Routing Trees With Identified Critical Sinks. DAC 1993: 182-187
21EECharles J. Alpert, Andrew B. Kahng: Geometric Embeddings for Faster and Better Multi-Way Netlist Partitioning. DAC 1993: 743-748
20 Kenneth D. Boese, Andrew B. Kahng, Bernard A. McCoy, Gabriel Robins: Fidelity and Near-Optimality of Elmore-Based Routing Constructions. ICCD 1993: 81-84
19 Charles J. Alpert, Jason Cong, Andrew B. Kahng, Gabriel Robins, Majid Sarrafzadeh: Minimum Density Interconneciton Trees. ISCAS 1993: 1865-1868
18 Charles J. Alpert, T. C. Hu, Jen-Hsin Huang, Andrew B. Kahng: A Direct Combination of the Prim and Dijkstra Constructions for Improved Performance-driven Global Routing. ISCAS 1993: 1869-1872
17 Kenneth D. Boese, Andrew B. Kahng: Simulated annealing of neural networks: The 'cooling' strategy reconsidered. ISCAS 1993: 2572-2575
16EEJason Cong, Andrew B. Kahng, Gabriel Robins: Matching-based methods for high-performance clock routing. IEEE Trans. on CAD of Integrated Circuits and Systems 12(8): 1157-1169 (1993)
1992
15EEJason Cong, Lars W. Hagen, Andrew B. Kahng: Net Partitions Yield Better Module Partitions. DAC 1992: 47-52
14EELars W. Hagen, Andrew B. Kahng: A new approach to effective circuit clustering. ICCAD 1992: 422-427
13 Jason Cong, Yuzheng Ding, Andrew B. Kahng, Peter Trajmar, Kuang-Chien Chen: An Improved Graph-Based FPGA Techology Mapping Algorithm For Delay Optimization. ICCD 1992: 154-158
12EEKuang-Chien Chen, Jason Cong, Yuzheng Ding, Andrew B. Kahng, Peter Trajmar: DAG-Map: Graph-Based FPGA Technology Mapping for Delay Optimization. IEEE Design & Test of Computers 9(3): 7-20 (1992)
11EEAndrew B. Kahng, Gabriel Robins: On the performance bounds for a class of rectilinear Steiner tree heuristics in arbitrary dimension. IEEE Trans. on CAD of Integrated Circuits and Systems 11(11): 1462-1465 (1992)
10EEJason Cong, Andrew B. Kahng, Gabriel Robins, Majid Sarrafzadeh, Chak-Kuen Wong: Provably good performance-driven global routing. IEEE Trans. on CAD of Integrated Circuits and Systems 11(6): 739-752 (1992)
9EEAndrew B. Kahng, Gabriel Robins: A new class of iterative Steiner tree heuristics with good performance. IEEE Trans. on CAD of Integrated Circuits and Systems 11(7): 893-902 (1992)
8EELars W. Hagen, Andrew B. Kahng: New spectral methods for ratio cut partitioning and clustering. IEEE Trans. on CAD of Integrated Circuits and Systems 11(9): 1074-1085 (1992)
1991
7EEAndrew B. Kahng, Jason Cong, Gabriel Robins: High-Performance Clock Routing Based on Recursive Geometric Aatching. DAC 1991: 322-327
6 Lars W. Hagen, Andrew B. Kahng: Fast Spectral Methods for Ratio Cut Partitioning and Clustering. ICCAD 1991: 10-13
5 Andrew B. Kahng: An Effective Analog Approach to Steiner Routing. ICCD 1991: 166-169
4 Jason Cong, Andrew B. Kahng, Gabriel Robins, Majid Sarrafzadeh, C. K. Wong: Performance-Driven Global Routing for Cell Based ICs. ICCD 1991: 170-173
3EEAndrew B. Kahng, Gabriel Robins: Optimal algorithms for extracting spatial regularity in images. Pattern Recognition Letters 12(12): 757-764 (1991)
1990
2 Andrew B. Kahng, Gabriel Robins: A New Class of Steiner Trees Heuristics with Good Performance: The Iterated 1-Steiner-Approach. ICCAD 1990: 428-431
1989
1EEAndrew B. Kahng: Fast Hypergraph Partition. DAC 1989: 762-766

Coauthor Index

1Robert C. Aitken (Rob Aitken) [269]
2Christoph Albrecht [139] [148] [202]
3Alan Allan [137]
4Charles J. Alpert [18] [19] [21] [24] [28] [32] [34] [42] [53] [57] [59] [60] [73] [80] [94] [122] [123] [149] [209] [223] [242]
5Dominic A. Antonelli [189]
6Ross Baldick [91]
7C. Bandela [140]
8Piotr Berman [74] [81] [95]
9Kenneth D. Boese [17] [20] [22] [30] [33] [118]
10Shekhar Y. Borkar (Shekhar Borkar) [124] [172]
11Andrew E. Caldwell [65] [71] [79] [80] [85] [88] [89] [93] [94] [96] [97] [104] [107] [109] [111] [150] [178]
12Y. Uny Cao [50]
13Yu Cao [101] [107] [151]
14Luigi Capodieci [192] [269]
15Luca P. Carloni [273]
16Tony F. Chan [53] [60]
17Keh-Jeng Chang [218]
18Ira Chayut [252]
19Danny Z. Chen [189]
20Hongyu Chen [155] [168] [171] [193] [200]
21Kuang-Chien Chen [12] [13]
22Yu Chen [84] [108] [112] [128] [133] [140] [144] [169] [173] [197]
23Chung-Kuan Cheng [117] [125] [134] [155] [168] [171] [193] [200] [218]
24Ed Cheng [124]
25Yongseok Cheon [216]
26Charles Chiang [214] [215] [250] [253]
27Hyun-Jin Choi [85] [178]
28Nan-Chi Chou [171]
29John M. Cohn [124] [172] [252]
30Ronald Collett [119] [147]
31Jason Cong [4] [7] [10] [12] [13] [15] [16] [19] [36] [52] [55] [61] [63]
32Joshua N. Cooper [131]
33Wayne Wei-Ming Dai [127]
34Parthasarathi Dasgupta (P. S. Dasgupta) [170]
35Yuzheng Ding [12] [13]
36Antun Domic [172]
37Feodor F. Dragan [103] [116] [130] [132]
38Timothy J. Dysart [189]
39Don Edenfeld [137] [181]
40Robert B. Ellis [131]
41Stephen Fenstermaker [106]
42Limor Fix [196]
43Alex S. Fukunaga (Alex Fukunaga) [50]
44David George [106]
45Lance A. Glasser [87]
46Warren Grobman [87]
47Patrick Groeneveld [147] [172]
48Puneet Gupta [159] [160] [165] [166] [173] [174] [182] [183] [191] [192] [198] [203] [204] [205] [217] [219] [221] [227] [228] [241] [245] [248] [260] [271] [272]
49Lars W. Hagen [6] [8] [14] [15] [23] [38] [40] [47] [49]
50Toshihiro Hattori [127] [252]
51Lei He [55] [206] [246]
52Fook-Luen Heng [218]
53Dwight D. Hill [180]
54Pei-Hsin Ho [216]
55Inki Hong [46]
56Cliff Hou [269]
57Lambert van den Hoven [147]
58Milos Hrkic [122]
59Chenming Hu [101] [151]
60Jiang Hu [122] [261]
61T. C. Hu [18] [31] [32]
62Xiaobo Sharon Hu (Xiaobo Hu) [189]
63Dennis J.-H. Huang (Jen-Hsin Huang) [18] [32] [37] [38] [39] [40] [49] [53] [54] [57] [59]
64Xuejue Huang [101] [151]
65Kwangok Jeong [266] [270] [275] [277]
66Marcelo de Oliveira Johann (Marcelo O. Johann) [104]
67William H. Joyner Jr. [115] [137] [220]
68Sung-Mo Kang [257]
69David R. Karger [32]
70Andrew A. Kennings [89] [91]
71Juho Kim [127]
72Youngmin Kim [183] [217] [245] [260] [272]
73Darko Kirovski [83]
74Fabian Klass [269]
75Peter M. Kogge [189]
76Cheng-Kok Koh [36] [63]
77Jeong-Taek Kong [252]
78Farinaz Koushanfar [107]
79Ton. H. van de Kraats [119]
80Fadi J. Kurdahi [23]
81John Lach [70] [114]
82Kwok-Shing Leung [52] [61]
83Lavi Lev [147]
84Bin Li [276]
85Wei Li [257]
86John Lillis [122]
87Steve Lin [218]
88Bao Liu [117] [122] [123] [125] [134] [146] [148] [149] [158] [179] [211] [229] [234] [235] [237] [244] [249] [251] [257] [261]
89Hua Lu [107]
90John F. MacDonald [171]
91Don MacMillen [218]
92Sharad Malik [196]
93Ion I. Mandoiu [103] [116] [123] [130] [132] [138] [139] [140] [146] [148] [149] [155] [157] [164] [165] [167] [168] [176] [179] [185] [198] [200] [202] [225] [247]
94William H. Mangione-Smith [70] [114]
95Stefanus Mantik [65] [69] [70] [71] [83] [85] [99] [102] [106] [113] [114] [118] [120] [141] [143] [159] [178] [203]
96Igor L. Markov [53] [60] [65] [69] [70] [71] [79] [80] [88] [89] [91] [93] [94] [96] [97] [107] [109] [111] [114] [143] [150] [151] [161] [188] [195]
97Grant Martin [201] [220]
98Kei Masuko [43]
99Bernard A. McCoy [20] [30] [33]
100Byung Ro Moon [35] [46]
101Makoto Mori [193]
102Sudhakar Muddu [27] [29] [43] [44] [48] [51] [67] [68] [75] [76] [101] [103] [105] [116] [121] [130] [132] [264]
103Swamy Muddu [170] [210] [232] [256] [273]
104Pep Mulet [53] [60]
105Richard C. Murphy [189]
106N. S. Nagaraj [269]
107Gi-Joon Nam [209] [223]
108Sani R. Nassif [127]
109Nancy Nettleton [124] [147]
110Michael T. Niemier [189]
111David Noice [55]
112Michael Oliver [107] [151]
113Hidetoshi Onodera [127]
114Robert Pack [87]
115Chul-Hong Park [219] [227] [240] [248] [262] [268] [270] [274]
116Y. C. Pati [82] [86] [87]
117Pierre G. Paulin [252]
118Li-Shiuan Peh [276]
119Pavel A. Pevzner [138] [157] [176]
120Alessandro Pinto [273]
121Vijay Pitchumani [218]
122Niranjan Pol [121]
123Miodrag Potkonjak [69] [70] [83] [85] [114] [178]
124Gang Qu [84] [85] [178]
125Tom Quan [110]
126Stephen T. Quay [122]
127Champaka Ramachandran [23]
128Sherief Reda [138] [157] [164] [167] [175] [176] [188] [190] [194] [195] [207] [208] [209] [212] [213] [216] [222] [223] [224] [225] [226] [231] [254]
129Ricardo Augusto da Luz Reis (Ricardo A. L. Reis, Ricardo Reis) [104]
130Juan C. Rey [269]
131Gabriel Robins [2] [3] [4] [7] [9] [10] [11] [16] [19] [20] [22] [30] [33] [58] [64] [72] [77] [92] [108] [112] [128] [133] [144] [169] [197]
132Mike Rodgers [137] [181]
133Paul K. Rodman [147]
134Kambiz Samadi [227] [233] [265] [266] [273] [276]
135Sachin S. Sapatnekar [122]
136Majid Sarrafzadeh [4] [10] [19] [62]
137Egino Sarto [68] [76] [105]
138Louis Scheffer [124] [172]
139Jean-Pierre Schoellkopf [172]
140Saumil Shah [241] [260] [272]
141Puneet Sharma [165] [191] [198] [204] [210] [221] [232] [233] [239] [240] [254] [256] [258] [263] [264] [273] [274]
142Rahul Sharma [68]
143Bing J. Sheu [124]
144Toshiyuki Shibuya [218]
145Nagesh Shirali [55]
146Anish Singh [64] [72] [77] [92]
147Vivek Singh [269]
148Subarna Sinha [214] [215] [250] [253]
149Gary Smith [142]
150Jennifer Smith [110]
151Dirk Stroobandt [98] [99] [101] [107] [113] [125] [134] [151]
152Peter Suaris (Peter Ramyalal Suaris) [171]
153Roberto Suaya [218]
154A. J. Sullivan [122]
155Dennis Sylvester [101] [107] [151] [174] [183] [191] [192] [205] [217] [221] [245] [260] [272]
156Cliff C. N. Sze (Chin Ngai Sze, Cliff N. Sze) [242]
157King Ho Tam [206] [246]
158Sheldon X.-D. Tan (Xiang-Dong Tan) [234] [237]
159Akira Tanabe [127]
160Bart Thielges [106]
161Rich Tobias [252]
162Rasit Onur Topaloglu [230] [238] [255] [258] [263]
163Peter Trajmar [12] [13]
164Chung-Wen Albert Tsao [25] [26] [31] [36] [39] [41] [45] [56] [63]
165Paul Tucker [69] [70] [90] [114]
166Shailesh Vaya [129]
167Ganesh Venkataraman [261]
168Devendra Vidhani [74] [81] [95] [121]
169Paul G. Villarrubia (Paul Villarrubia) [122] [209] [223]
170Elizabeth A. Walkup [58]
171Huijuan Wang [64] [69] [70] [81] [95] [114]
172Qinke Wang [155] [168] [185] [186] [187] [193] [199] [200] [207] [211] [212] [216] [236] [240] [242] [251] [274]
173Sang Wang [124]
174Gregory Wolfe [69] [70] [114]
175Chak-Kuen Wong (C. K. Wong) [4] [10]
176Jennifer L. Wong [83] [85] [178]
177Jinjun Xiong [206] [246]
178Xu Xu [156] [162] [164] [167] [177] [185] [214] [215] [225] [227] [229] [235] [244] [247] [249] [250] [253] [261] [262] [268]
179Kenneth Yan [53]
180Jie Yang [174] [192] [205]
181Bo Yao [168] [171] [200]
182Hailong Yao [268] [270] [275]
183So-Zen Yao [73]
184Steve H.-C. Yen [55]
185Zhiping Yu [218]
186Alexander Zelikovsky [64] [65] [71] [72] [74] [77] [81] [84] [90] [92] [95] [103] [108] [112] [116] [123] [128] [129] [130] [132] [133] [138] [139] [140] [144] [148] [149] [157] [164] [167] [169] [176] [185] [197] [202] [215] [225] [239] [247] [250] [253]
187Yuhong Zheng [169] [197]
188Zhengyong Zhu [171]
189Yervant Zorian [137] [181]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)