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Hong Jeong Vis

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*2008
22 Sungchan Park, Intae Na, Hong Jeong: A Memory-efficient Parallel Architecture for Motion Estimation with Subpixel Resolution. IPCV 2008: 465-471
21 Sungchan Park, Chao Chen, Hong Jeong: Stereo Matching using FBP: A Memory Efficient Parallel Architecture. IPCV 2008: 550-556
20EESungchan Park, Hong Jeong: Trellis Based Real-Time Depth Perception Chip Using Interline Constraint. New Directions in Intelligent Interactive Multimedia 2008: 565-575
2007
19EEYoungmin Ha, Hong Jeong: An Automatic Method for Extracting and Classifying Defect in Optical Photomask Images. MUE 2007: 710-716
18EESungchan Park, Hong Jeong: Real-time Stereo Vision FPGA Chip with Low Error Rate. MUE 2007: 751-756
17EESungchan Park, Chao Chen, Hong Jeong: VLSI Architecture for MRF Based Stereo Matching. SAMOS 2007: 55-64
16EEYong Kim, Hong Jeong: A Systolic FPGA Architecture of Two-Level Dynamic Programming for Connected Speech Recognition. IEICE Transactions 90-D(2): 562-568 (2007)
2006
15EEYu Shiu, Hong Jeong, C. C. Jay Kuo: Similar Segment Detection for Music Structure Analysis via Viterbi Algorithm. ICME 2006: 789-792
14EESungchan Park, Hong Jeong: A High-Speed Parallel Architecture for Stereo Matching. ISVC (1) 2006: 334-342
13EEYong Kim, Hong Jeong: Two-Level Dynamic Programming Hardware Implementation for Real Time Processing. KES (1) 2006: 1090-1097
2005
12 Hong Jeong, Yong Kim: A Parallel FPGA Architecture for Blind Separation of Speech Signals. Artificial Intelligence and Applications 2005: 509-514
11 Hong Jeong, Yong Kim: A Systolic Architecture and FPGA Implementation of Blind Source Separation. IC-AI 2005: 963-969
10EEYong Kim, Hong Jeong: A FPGA Architecture of Blind Source Separation and Real Time Implementation. IWINAC (2) 2005: 347-356
9EEYong Kim, Hong Jeong: A Parallel Array Architecture of MIMO Feedback Network and Real Time Implementation. KES (1) 2005: 996-1003
2004
8EEHong Jeong, Sungchan Park: Generalized Trellis Stereo Matching with Systolic Array. ISPA 2004: 263-267
2003
7EEHong Jeong, Yong Kim: A Systolic Architecture of VLSI Implementation of Dynamic Time Warping for Speech Recognition. SIP 2003: 109-114
2002
6EEHong Jeong, Yuns Oh, J. H. Park, B. S. Koo, Sang Wook Lee: Vision-based adaptive and recursive tracking of unpaved roads. Pattern Recognition Letters 23(1-3): 73-82 (2002)
2001
5 Hong Jeong, Yuns Oh: A Parallel Real Time Implementation of Stereo Matching. IPDPS 2001: 10
2000
4EEHong Jeong, Yuns Oh: Parallel Trellis Based Stereo Matching Using Constraints. Biologically Motivated Computer Vision 2000: 227-237
3 Hong Jeong, J. H. Park, H. Y. Ryu, J. B. Kwon, Yuns Oh: VLSI Implementation of SAR Data Correlator. PDPTA 2000
1996
2EECha-Gyun Jeong, Hong Jeong: Automatic phone segmentation and labeling of continuous speech. Speech Communication 20(3-4): 291-311 (1996)
1992
1EEHong Jeong, C. I. Kim: Adaptive Determination of Filter Scales for Edge Detection. IEEE Trans. Pattern Anal. Mach. Intell. 14(5): 579-585 (1992)

Coauthor Index

1Chao Chen [17] [21]
2Youngmin Ha [19]
3Cha-Gyun Jeong [2]
4C. I. Kim [1]
5Yong Kim [7] [9] [10] [11] [12] [13] [16]
6B. S. Koo [6]
7C. C. Jay Kuo [15]
8J. B. Kwon [3]
9Sang Wook Lee [6]
10Intae Na [22]
11Yuns Oh [3] [4] [5] [6]
12J. H. Park [3] [6]
13Sungchan Park [8] [14] [17] [18] [20] [21] [22]
14H. Y. Ryu [3]
15Yu Shiu [15]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)