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Chein-Wei Jen Vis

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*2007
44EEPi-Chen Hsiao, Tay-Jyi Lin, Chih-Wei Liu, Chein-Wei Jen: Latency-Tolerant Virtual Cluster Architecture for VLIW DSP. ISCAS 2007: 3506-3509
2006
43EEShih-Hao Ou, Tay-Jyi Lin, Chao-Wei Huang, Yu-Ting Kuo, Chie-Min Chao, Chih-Wei Liu, Chein-Wei Jen: A 52mW 1200MIPS compact DSP for multi-core media SoC. ASP-DAC 2006: 118-119
42EEDavid Chih-Wei Chang, I-Tao Liao, Jenq Kuen Lee, Wen-Feng Chen, Shau-Yin Tseng, Chein-Wei Jen: PAC DSP Core and Application Processors. ICME 2006: 289-292
41EEYu-Ting Kuo, Tay-Jyi Lin, Yi Cho, Chih-Wei Liu, Chein-Wei Jen: Programmable FIR filter with adder-based computing engine. ISCAS 2006
2005
40EETay-Jyi Lin, Chie-Min Chao, Chia-Hsien Liu, Pi-Chen Hsiao, Shin-Kai Chen, Li-Chun Lin, Chih-Wei Liu, Chein-Wei Jen: A unified processor architecture for RISC & VLIW DSP. ACM Great Lakes Symposium on VLSI 2005: 50-55
39EEYu-Ting Kuo, Tay-Jyi Lin, Chih-Wei Liu, Chein-Wei Jen: Architecture for area-efficient 2-D transform in H.264/AVC. ICME 2005: 1126-1129
38EEWei-Sheng Huang, Tay-Jyi Lin, Shih-Hao Ou, Chih-Wei Liu, Chein-Wei Jen: Pipelining technique for energy-aware datapaths. ISCAS (2) 2005: 1218-1221
37EEChia-Hsien Liu, Tay-Jyi Lin, Chie-Min Chao, Pi-Chen Hsiao, Li-Chun Lin, Shin-Kai Chen, Chao-Wei Huang, Chih-Wei Liu, Chein-Wei Jen: Hierarchical instruction encoding for VLIW digital signal processors. ISCAS (4) 2005: 3503-3506
36EEKun-Bin Lee, Jih-Yiing Lin, Chein-Wei Jen: A multisymbol context-based arithmetic coding architecture for MPEG-4 shape coding. IEEE Trans. Circuits Syst. Video Techn. 15(2): 283-295 (2005)
35EEHun-Chen Chen, Jiun-In Guo, Tian-Sheuan Chang, Chein-Wei Jen: A memory-efficient realization of cyclic convolution and its application to discrete cosine transform. IEEE Trans. Circuits Syst. Video Techn. 15(3): 445-453 (2005)
34EEKun-Bin Lee, Tzu-Chieh Lin, Chein-Wei Jen: An Efficient Quality-Aware Memory Controller for Multimedia Platform SoC. IEEE Trans. Circuits Syst. Video Techn. 15(5): 620-633 (2005)
33EEHun-Chen Chen, Tian-Sheuan Chang, Jiun-In Guo, Chein-Wei Jen: The Long Length DHT Design with a New Hardware Efficient Distributed Arithmetic Approach and Cyclic Preserving Partitioning. IEICE Transactions 88-C(5): 1061-1069 (2005)
2004
32EETay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chein-Wei Jen: A compact DSP core with static floating-point unit & its microcode generation. ACM Great Lakes Symposium on VLSI 2004: 57-60
31EEKun-Bin Lee, Nelson Yen-Chung Chang, Hao-Yun Chin, Hui-Cheng Hsu, Chein-Wei Jen: A bandwidth and memory efficient MPEG-4 shape encoder. ASP-DAC 2004: 525-526
30 Nelson Yen-Chung Chang, Kun-Bin Lee, Chein-Wei Jen: Trace-path analysis and performance estimation for multimedia application in embedded system. ISCAS (2) 2004: 129-132
29 Kun-Bin Lee, Hao-Yun Chin, Hui-Cheng Hsu, Chein-Wei Jen: QME: an efficient subsampling-based block matching algorithm for motion estimation. ISCAS (2) 2004: 305-308
28 Kun-Bin Lee, Jih-Yiing Lin, Chein-Wei Jen: A fast dual symbol context-based arithmetic coding for MPEG-4 shape coding. ISCAS (2) 2004: 317-320
27 Kun-Bin Lee, Hui-Cheng Hsu, Chein-Wei Jen: A cost-effective MPEG-4 shape-adaptive DCT with auto-aligned transpose memory organization. ISCAS (2) 2004: 777-780
26 Hung-Yueh Lin, Tay-Jyi Lin, Chie-Min Chao, Yen-Chin Liao, Chih-Wei Liu, Chein-Wei Jen: Static floating-point unit with implicit exponent tracking for embedded DSP. ISCAS (2) 2004: 821-824
2003
25EETay-Jyi Lin, Chin-Chi Chang, Chen-Chia Lee, Chein-Wei Jen: An Efficient VLIW DSP Architecture for Baseband Processing. ICCD 2003: 307-312
24EEHun-Chen Chen, Jiun-In Guo, Chein-Wei Jen: A memory efficient realization of cyclic convolution and its application to discrete cosine transform. ISCAS (4) 2003: 33-36
23EETay-Jyi Lin, Tsung-Hsun Yang, Chein-Wei Jen: Area-effective FIR filter design for multiplier-less implementation. ISCAS (5) 2003: 173-176
22EEWen-Chang Yeh, Chein-Wei Jen: Generalized Earliest-First Fast Addition Algorithm. IEEE Trans. Computers 52(10): 1233-1242 (2003)
21EEYuan-Chung Lee, Chein-Wei Jen: Edge-preserving texture filtering for real-time rendering. The Visual Computer 19(1): 10-22 (2003)
2002
20EEHun-Chen Chen, Jiun-In Guo, Chein-Wei Jen: A new group distributed arithmetic design for the one dimensional discrete Fourier transform. ISCAS (1) 2002: 421-424
19EETay-Jyi Lin, Chein-Wei Jen: CASCADE - configurable and scalable DSP environment. ISCAS (4) 2002: 870-873
18EEYun-Tai Hsiao, Hung-Der Lin, Kun-Bin Lee, Chein-Wei Jen: High-speed memory-saving architecture for the embedded block coding in JPEG2000. ISCAS (5) 2002: 133-136
17 Jen-Chieh Tuan, Tian-Sheuan Chang, Chein-Wei Jen: On the data reuse and memory bandwidth analysis for full-search block-matching VLSI architecture. IEEE Trans. Circuits Syst. Video Techn. 12(1): 61-72 (2002)
16EEBor-Sung Liang, Yuan-Chung Lee, Wen-Chang Yeh, Chein-Wei Jen: Index rendering: hardware-efficient architecture for 3-D graphics in multimedia system. IEEE Transactions on Multimedia 4(3): 343-360 (2002)
2001
15EEYuan-Chung Lee, Chein-Wei Jen: Arbitrarily scalable edge-preserving interpolation for 3-D graphics and video resizing. ISCAS (2) 2001: 317-320
14EETay-Jyi Lin, Chein-Wei Jen: An efficient 2-D DWT architecture via resource cycling. ISCAS (4) 2001: 914-917
13EEIlion Yi-Liang Hsiao, Ding-Hao Wang, Chein-Wei Jen: Power modeling and low-power design of content addressable memories. ISCAS (4) 2001: 926-929
12EEYuan-Chung Lee, Chein-Wei Jen: Improved quadratic normal vector interpolation for realistic shading. The Visual Computer 17(6): 337-352 (2001)
2000
11EEYuan-Chung Lee, Chein-Wei Jen: On-Line Polygon Refining Using a Low Computation Subdivision Algorithm. GMP 2000: 209-219
10 Tian-Sheuan Chang, Chin-Sheng Kung, Chein-Wei Jen: A simple processor core design for DCT/IDCT. IEEE Trans. Circuits Syst. Video Techn. 10(3): 439-447 (2000)
9EEWen-Chang Yeh, Chein-Wei Jen: High-Speed Booth Encoded Parallel Multiplier Design. IEEE Trans. Computers 49(7): 692-701 (2000)
1998
8EEJen-Chien Tuan, Chein-Wei Jen: An Architecture of Full-Search Block Matching for Minimum Memory Bandwidth Requirement. Great Lakes Symposium on VLSI 1998: 152-156
1996
7EEJinn-Wang Yeh, Wen-Jiunn Cheng, Chein-Wei Jen: VASS - A VLSI array system synthesizer. VLSI Signal Processing 12(2): 135-158 (1996)
1994
6 Jiun-In Guo, Chi-Min Liu, Chein-Wei Jen: A General Approach to Design VLSI Arrays for the Multi-dimensional Discrete Hartley Transform. ISCAS 1994: 235-238
1993
5 Jiun-In Guo, Chi-Min Liu, Chein-Wei Jen: A CORDIC-based VLSI Array for Computing 2-D Discrete Hartley Transform. ISCAS 1993: 1571-1574
4 Yu-Sheng Lin, Jiun-In Guo, C. Bernard Shung, Chein-Wei Jen: A Multi-phase Shared Bus Structure for the Fast Fourier Transform. ISCAS 1993: 1575-1578
3 Jiann-Jenn Wang, Chein-Wei Jen: A High Throughput Systolic Design for QR Algorithm. ISCAS 1993: 1742-1745
1992
2 Chein-Wei Jen, Ding-Ming Kwai: Data Flow Representation of Iterative Algorithms for Systolic Arrays. IEEE Trans. Computers 41(3): 351-355 (1992)
1986
1 Sun-Yuan Kung, Chih-Wei Jim Chang, Chein-Wei Jen: Real-Time Configuration for Fault-Tolerant VLSI Array Processors. IEEE Real-Time Systems Symposium 1986: 46-54

Coauthor Index

1Chih-Wei Jim Chang [1]
2Chin-Chi Chang [25]
3David Chih-Wei Chang [42]
4Nelson Yen-Chung Chang [30] [31]
5Tian-Sheuan Chang [10] [17] [33] [35]
6Chie-Min Chao [26] [32] [37] [40] [43]
7Hun-Chen Chen [20] [24] [33] [35]
8Shin-Kai Chen [37] [40]
9Wen-Feng Chen [42]
10Wen-Jiunn Cheng [7]
11Hao-Yun Chin [29] [31]
12Yi Cho [41]
13Jiun-In Guo [4] [5] [6] [20] [24] [33] [35]
14Ilion Yi-Liang Hsiao [13]
15Pi-Chen Hsiao [37] [40] [44]
16Yun-Tai Hsiao [18]
17Hui-Cheng Hsu [27] [29] [31]
18Chao-Wei Huang [37] [43]
19Wei-Sheng Huang [38]
20Chin-Sheng Kung [10]
21Sun-Yuan Kung [1]
22Yu-Ting Kuo [39] [41] [43]
23Ding-Ming Kwai [2]
24Chen-Chia Lee [25]
25Jenq Kuen Lee [42]
26Kun-Bin Lee [18] [27] [28] [29] [30] [31] [34] [36]
27Yuan-Chung Lee [11] [12] [15] [16] [21]
28Bor-Sung Liang [16]
29I-Tao Liao [42]
30Yen-Chin Liao [26]
31Hung-Der Lin [18]
32Hung-Yueh Lin [26] [32]
33Jih-Yiing Lin [28] [36]
34Li-Chun Lin [37] [40]
35Tay-Jyi Lin [14] [19] [23] [25] [26] [32] [37] [38] [39] [40] [41] [43] [44]
36Tzu-Chieh Lin [34]
37Yu-Sheng Lin [4]
38Chi-Min Liu [5] [6]
39Chia-Hsien Liu [37] [40]
40Chih-Wei Liu [26] [32] [37] [38] [39] [40] [41] [43] [44]
41Shih-Hao Ou [38] [43]
42C. Bernard Shung [4]
43Shau-Yin Tseng [42]
44Jen-Chieh Tuan [17]
45Jen-Chien Tuan [8]
46Ding-Hao Wang [13]
47Jiann-Jenn Wang [3]
48Tsung-Hsun Yang [23]
49Jinn-Wang Yeh [7]
50Wen-Chang Yeh [9] [16] [22]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)