Atsushi Iwata

2007
34	EE	Nobuharu Kami, Jun Suzuki, Yoichi Hidaka, Takashi Yoshikawa, Atsushi Iwata: Multilayer In-service Reconfiguration for Network Computing Systems. NCA 2007: 324-331
33	EE	Daisuke Kosaka, Makoto Nagata, Yoshitaka Murasaka, Atsushi Iwata: Chip-Level Substrate Coupling Analysis with Reference Structures for Verification. IEICE Transactions 90-A(12): 2651-2660 (2007)
32	EE	Daisuke Kosaka, Makoto Nagata, Yoshitaka Murasaka, Atsushi Iwata: Evaluation of Isolation Structures against High-Frequency Substrate Coupling in Analog/Mixed-Signal Integrated Circuits. IEICE Transactions 90-A(2): 380-387 (2007)
31	EE	Atsushi Iwata, Takeshi Yoshida, Mamoru Sasaki: Low-Voltage and Low-Noise CMOS Analog Circuits Using Scaled Devices. IEICE Transactions 90-C(6): 1149-1155 (2007)
2006
30	EE	Kan'ya Sasaki, Seiji Kameda, Atsushi Iwata: Stereo Matching Algorithm Using a Weighted Average of Costs Aggregated by Various Window Sizes. ACCV (2) 2006: 771-780
29	EE	Atsushi Iwata: Carrier-Grade Ethernet Technologies for Next Generation Wide Area Ethernet. IEICE Transactions 89-B(3): 651-660 (2006)
28	EE	Masaki Umayabashi, Yoichi Hidaka, Nobuyuki Enomoto, Daisaku Ogasahara, Kazuo Takagi, Atsushi Iwata, Akira Arutaki: Improving Ethernet Reliability and Stability Using Global Open Ethernet Technology. IEICE Transactions 89-B(3): 675-682 (2006)
27	EE	Kan'ya Sasaki, Takashi Morie, Atsushi Iwata: A VLSI Spiking Feedback Neural Network with Negative Thresholding and Its Application to Associative Memory. IEICE Transactions 89-C(11): 1637-1644 (2006)
26	EE	Takeshi Yoshida, Yoshihiro Masui, Takayuki Mashimo, Mamoru Sasaki, Atsushi Iwata: A 1 V Low-Noise CMOS Amplifier Using Autozeroing and Chopper Stabilization Technique. IEICE Transactions 89-C(6): 769-774 (2006)
25	EE	Osamu Nomura, Takashi Morie, Keisuke Korekado, Teppei Nakano, Masakazu Matsugu, Atsushi Iwata: An Image-Filtering LSI Processor Architecture for Face/Object Recognition Using a Sorted Projection-Field Model Based on a Merged/Mixed Analog-Digital Architecture. IEICE Transactions 89-C(6): 781-791 (2006)
2005
24	EE	Osamu Nomura, Takashi Morie, Masakazu Matsugu, Atsushi Iwata: A Convolutional Neural Network VLSI Architecture Using Sorting Model for Reducing Multiply-and-Accumulation Operations. ICNC (3) 2005: 1006-1014
23	EE	Takeshi Yoshida, Miho Akagi, Mamoru Sasaki, Atsushi Iwata: A 1V supply successive approximation ADC with rail-to-rail input voltage range. ISCAS (1) 2005: 192-195
22	EE	Mitsuru Shiozaki, Toru Mukai, Masahiro Ono, Mamoru Sasaki, Atsushi Iwata: A 2.7 Gcps and 7-Multiplexing CDMA Serial Communication Chip Using Two-Step Synchronization Technique. IEICE Transactions 88-C(6): 1233-1240 (2005)
2004
21	EE	Osamu Nomura, Takashi Morie, Keisuke Korekado, Masakazu Matsugu, Atsushi Iwata: A Convolutional Neural Network VLSI Architecture Using Thresholding and Weight Decomposition. KES 2004: 995-1001
20	EE	Norihito Fujita, Yuichi Ishikawa, Atsushi Iwata, Rauf Izmailov: Coarse-grain replica management strategies for dynamic replication of Web contents. Computer Networks 45(1): 19-34 (2004)
19	EE	Atsushi Iwata, Yoichi Hidaka, Masaki Umayabashi, Nobuyuki Enomoto, Akira Arutaki: Global open ethernet (GOE) system and its performance evaluation. IEEE Journal on Selected Areas in Communications 22(8): 1432-1442 (2004)
18	EE	Tsutomu Yoshimura, Atsushi Iwata: An analysis of interference in synchronous systems. IEICE Electronic Express 1(15): 465-471 (2004)
17	EE	Keisuke Korekado, Takashi Morie, Osamu Nomura, Hiroshi Ando, Teppei Nakano, Masakazu Matsugu, Atsushi Iwata: A VLSI convolutional neural network for image recognition using merged/mixed analog-digital architecture. Journal of Intelligent and Fuzzy Systems 15(3-4): 173-179 (2004)
2003
16	EE	Keisuke Korekado, Takashi Morie, Osamu Nomura, Hiroshi Ando, Teppei Nakano, Masakazu Matsugu, Atsushi Iwata: A Convolutional Neural Network VLSI for Image Recognition Using Merged/Mixed Analog-Digital Architecture. KES 2003: 169-176
2002
15	EE	Teppei Nakano, Takashi Morie, Makoto Nagata, Atsushi Iwata: A cellular-automaton-type image extraction algorithm and its implementation using an FPGA. APCCAS (2) 2002: 197-200
14	EE	Makoto Nagata, Youichi Nishimori, Takashi Morie, Atsushi Iwata, Yoshitaka Murasaka: Substrate Noise Analysis with Compact Digital Noise Injection and Substrate Models. ASP-DAC 2002: 71-76
13	EE	Makoto Nagata, Yoshitaka Murasaka, Youichi Nishimori, Takashi Morie, Atsushi Iwata: Substrate Noise Analysis with Compact Digital Noise Injection and Substrate Models. VLSI Design 2002: 71-76
2001
12	EE	Makoto Nagata, Takafumi Ohmoto, Jin Nagai, Takashi Morie, Atsushi Iwata: Test circuits for substrate noise evaluation in CMOS digital ICs. ASP-DAC 2001: 13-14
11	EE	Yoshitaka Murasaka, Makoto Nagata, Takafumi Ohmoto, Takashi Morie, Atsushi Iwata: Chip-Level Substrate Noise Analysis with Network Reduction by Fundamental Matrix Computation. ISQED 2001: 482-487
10	EE	Takashi Morie, Tomohiro Matsuura, Makoto Nagata, Atsushi Iwata: An Efficient Clustering Algorithm Using Stochastic Association Model and Its Implementation Using Nanostructures. NIPS 2001: 1115-1122
2000
9	EE	Noriaki Takeda, Mitsuru Homma, Makoto Nagata, Takashi Morie, Atsushi Iwata: A smart imager for the vision processing front-END. ASP-DAC 2000: 19-20
8	EE	Kenichi Murakoshi, Takashi Morie, Makoto Nagata, Atsushi Iwata: An arbitrary chaos generator core curcuit using PWM/PPM signals. ASP-DAC 2000: 23-24
7	EE	Makoto Nagata, Atsushi Iwata: Substrate crosstalk analysis in mixed signal CMOS integrated circuits: embedded tutorial. ASP-DAC 2000: 623-630
6	EE	Makoto Nagata, Jin Nagai, Takashi Morie, Atsushi Iwata: Measurements and analyses of substrate noise waveform inmixed-signal IC environment. IEEE Trans. on CAD of Integrated Circuits and Systems 19(6): 671-678 (2000)
5		Rauf Izmailov, Atsushi Iwata, Bhaskar Sengupta: ATM Routing Algorithms for Multimedia Traffic in Private ATM Networks. J. Heuristics 6(1): 21-38 (2000)
1999
4		Atsushi Iwata, Makoto Nagata, Hiroyuki Nakamoto, Noriaki Takeda, Mitsuru Homma, Hiroto Higashi, Takashi Morie: A Feature Associative Processor for Image Recognition Based on A-D merged Architecture. VLSI 1999: 77-88
1998
3		Souta Sakabayashi, Takashi Morie, Makoto Nagata, Atsushi Iwata: Nonlinear Function Generators and Chaotic Signal Generators Based on Pulse-Phase Modulation. ICONIP 1998: 582-585
2		Hiroshi Ando, Takashi Morie, Makoto Nagata, Atsushi Iwata: Oscillator Networks for Image Segmentation and Their Circuits Using Pulse Modulation Method. ICONIP 1998: 586-589
1995
1		Atsushi Iwata, N. Mori, Chinatsu Ikeda, Hiroshi Suzuki, Maximilian Ott: ATM Connection and Traffic Management Schemes for Multimedia Internetworking. Commun. ACM 38(2): 72-89 (1995)

Coauthor Index

1	Miho Akagi	[23]
2	Hiroshi Ando	[2] [16] [17]
3	Akira Arutaki	[19] [28]
4	Nobuyuki Enomoto	[19] [28]
5	Norihito Fujita	[20]
6	Yoichi Hidaka	[19] [28] [34]
7	Hiroto Higashi	[4]
8	Mitsuru Homma	[4] [9]
9	Chinatsu Ikeda	[1]
10	Yuichi Ishikawa	[20]
11	Rauf Izmailov	[5] [20]
12	Seiji Kameda	[30]
13	Nobuharu Kami	[34]
14	Keisuke Korekado	[16] [17] [21] [25]
15	Daisuke Kosaka	[32] [33]
16	Takayuki Mashimo	[26]
17	Yoshihiro Masui	[26]
18	Masakazu Matsugu	[16] [17] [21] [24] [25]
19	Tomohiro Matsuura	[10]
20	N. Mori	[1]
21	Takashi Morie	[2] [3] [4] [6] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [21] [24] [25] [27]
22	Toru Mukai	[22]
23	Kenichi Murakoshi	[8]
24	Yoshitaka Murasaka	[11] [13] [14] [32] [33]
25	Jin Nagai	[6] [12]
26	Makoto Nagata	[2] [3] [4] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [32] [33]
27	Hiroyuki Nakamoto	[4]
28	Teppei Nakano	[15] [16] [17] [25]
29	Youichi Nishimori	[13] [14]
30	Osamu Nomura	[16] [17] [21] [24] [25]
31	Daisaku Ogasahara	[28]
32	Takafumi Ohmoto	[11] [12]
33	Masahiro Ono	[22]
34	Maximilian Ott	[1]
35	Souta Sakabayashi	[3]
36	Kan'ya Sasaki	[27] [30]
37	Mamoru Sasaki	[22] [23] [26] [31]
38	Bhaskar Sengupta	[5]
39	Mitsuru Shiozaki	[22]
40	Hiroshi Suzuki	[1]
41	Jun Suzuki	[34]
42	Kazuo Takagi	[28]
43	Noriaki Takeda	[4] [9]
44	Masaki Umayabashi	[19] [28]
45	Takeshi Yoshida	[23] [26] [31]
46	Takashi Yoshikawa	[34]
47	Tsutomu Yoshimura	[18]

Colors in the list of coauthors