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Sorin A. Huss Vis

Sorin Alexander Huss

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*2009
43EEAbdulhadi Shoufan, Thorsten Wink, H. Gregor Molter, Sorin A. Huss, Falko Strenzke: A Novel Processor Architecture for McEliece Cryptosystem and FPGA Platforms. ASAP 2009: 98-105
42EEFelix Madlener, H. Gregor Molter, Sorin A. Huss: SC-DEVS: An efficient SystemC extension for the DEVS model of computation. DATE 2009: 1518-1523
41EEAdeel Israr, Abdulhadi Shoufan, Sorin A. Huss: An efficient reliability evaluation approach for system-level design of embedded systems. ISQED 2009: 339-344
40EESorin Alexander Huss: Embedded systems for IT security applications: properties and design considerations. SIN 2009: 138-142
39EEOsman Ugus, Dirk Westhoff, Ralf Laue, Abdulhadi Shoufan, Sorin A. Huss: Optimized Implementation of Elliptic Curve Based Additive Homomorphic Encryption for Wireless Sensor Networks CoRR abs/0903.3900: (2009)
2008
38EEAdeel Israr, Sorin A. Huss: Specification and Design Considerations for Reliable Embedded Systems. DATE 2008: 1111-1116
37EERalf Laue, H. Gregor Molter, Felix Rieder, Sorin A. Huss, Kartik Saxena: A Novel Multiple Core Co-processor Architecture for Efficient Server-Based Public Key Cryptographic Applications. ISVLSI 2008: 87-92
36 Abdulhadi Shoufan, Sorin A. Huss: Schlüsselverwaltung im Sicheren Multicast. Sicherheit 2008: 179-191
35EERalf Laue, Sorin A. Huss: Parallel Memory Architecture for Elliptic Curve Cryptography over GF(p) Aimed at Efficient FPGA Implementation. Signal Processing Systems 51(1): 39-55 (2008)
2007
34EEAbdulhadi Shoufan, Ralf Laue, Sorin A. Huss: High-Flexibility Rekeying Processor for Key Management in Secure Multicast. AINA Workshops (1) 2007: 822-829
33EEJuergen Weber, Andreas C. Lemke, Andreas Lehmler, Mario Anton, Sorin A. Huss: Mixed-Level Modeling Using Configurable MOS Transistor Models. FDL 2007: 6-11
32EERalf Laue, Oliver Kelm, Sebastian Schipp, Abdulhadi Shoufan, Sorin A. Huss: Compact AES-based Architecture for Symmetric Encryption, Hash Function, and Random Number Generation. FPL 2007: 480-484
31EEAbdulhadi Shoufan, Ralf Laue, Sorin A. Huss: Reliable Performance Evaluation of Rekeying Algorithms in Secure Multicast. WOWMOM 2007: 1-8
2006
30EESorin A. Huss: Analog circuit synthesis: a search for the Holy Grail? ISCAS 2006
29EEKaiping Zeng, Sorin A. Huss: Architecture refinements by code refactoring of behavioral VHDL-AMS models. ISCAS 2006
28EEKaiping Zeng, Sorin A. Huss: Structure Synthesis of Analog and Mixed-Signal Circuits using Partition Techniques. ISQED 2006: 225-230
27 Andreas Kühn, Felix Madlener, Sorin A. Huss: Resource Management for Dynamic Reconfigurable Hardware Structures. ReCoSoC 2006: 111-116
2005
26EEArshad Jhumka, Stephan Klaus, Sorin A. Huss: A Dependability-Driven System-Level Design Approach for Embedded Systems. DATE 2005: 372-377
25 Stephan Hermanns, Sorin A. Huss: Synchronisierungsprobleme von Schaltwerken in Wave Pipelining Architektur und ihre Auswirkungen auf die Wahl der Schaltungstechnik. GI Jahrestagung (1) 2005: 449
24EEAbdulhadi Shoufan, Sorin A. Huss, Murtuza Cutleriwala: A Novel Batch Rekeying Processor Architecture for Secure Multicast Key Management. HiPEAC 2005: 169-183
23EEKaiping Zeng, Sorin A. Huss: RAMS: A VHDL-AMS Code Refactoring Tool Supporting High Level Analog Synthesis. ISVLSI 2005: 266-267
22EEMichael Jung, Ralf Laue, Sorin A. Huss: A Case Study on Partial Evaluation in Embedded Software Design. SEUS 2005: 16-21
21EEW. W. Bachmann, Sorin A. Huss: Efficient algorithms for multilevel power estimation of VLSI circuits. IEEE Trans. VLSI Syst. 13(2): 238-254 (2005)
2004
20EEP. Hastono, Stephan Klaus, Sorin A. Huss: Real-Time Operating System Services for Realistic SystemC Simulation Models of Embedded Systems. FDL 2004: 380-392
19EESong Yuan, Sorin A. Huss: Audio watermarking algorithm for real-time speech integrity and authentication. MM&Sec 2004: 220-226
18EEAndreas Kühn, Sorin A. Huss: Dynamically Reconfigurable Hardware for Object-Oriented Processing. PARELEC 2004: 181-186
17EEMichael Jung, Sorin A. Huss: Fast Points-to Analysis for Languages with Structured Types. SCOPES 2004: 107-121
16EEJens Bieger, Sorin A. Huss, Michael Jung, Stephan Klaus, Thomas Steininger: Rapid Prototyping for Configurable System-on-a-Chip Platforms: A Simulation Based Approach. VLSI Design 2004: 577-
15EEM. Ernst, B. Henhapl, S. Klupsch, Sorin A. Huss: FPGA based hardware acceleration for elliptic curve public key cryptosystems. Journal of Systems and Software 70(3): 299-313 (2004)
14EEJens Bieger, Sorin A. Huss: Konzepte zur Beherrschung der Entwurfskomplexität eingebetteter Systeme. it - Information Technology 46(2): 59-66 (2004)
2003
13EEStephan Klaus, Sorin A. Huss: A Novel Specification Model for IP-based Design. DSD 2003: 190-196
2001
12EEM. Ernst, S. Klupsch, O. Hauck, Sorin A. Huss: Rapid Prototyping for Hardware Accelerated Elliptic Curve Public-Key Cryptosystems. IEEE International Workshop on Rapid System Prototyping 2001: 24-31
2000
11EEO. Hauck, A. Katoch, Sorin A. Huss: VLSI System Design Using Asynchronous Wave Pipelines: A 0.35?m CMOS 1.5 GHz Elliptic Curve Public Key Cryptosystem Chip. ASYNC 2000: 188-
1999
10EEO. Hauck, M. Garg, Sorin A. Huss: Two-Phase Asynchronous Wave-Pipelines and Their Application to a 2D-DCT. ASYNC 1999: 219-
9EEO. Hauck, M. Garg, Sorin A. Huss: Efficient and Safe Asynchronous Wave-Pipeline Architectures for Datapath and Control Unit Applications. Great Lakes Symposium on VLSI 1999: 38-41
8 Wolfgang Boßung, Sorin A. Huss, Stephan Klaus, Lars Wehmeyer: Functional Specification of Distributed Digital Image Processing Systems by Process Interface Descriptions. PDPTA 1999: 2975-2981
7EEWolfgang Boßung, Sorin Alexander Huss, Stephan Klaus: High-Level Embedded System Specifications Based on Process Activation Conditions. VLSI Signal Processing 21(3): 277-291 (1999)
1998
6EER. Rosenberger, Sorin A. Huss: A Systems Theoretic Approach to Behavioural Modeling and Simulation of Analog Functional Blocks. DATE 1998: 721-728
1995
5 Uwe F. Baake, Sorin A. Huss: Logic Reduction in Timed Asynchronous Circuits. ISCAS 1995: 1223-1226
4EEMichael Goedecke, Sorin A. Huss, Kai Morich: Automatic Parallelization of the Visual Data-Flow Language Cantata for Efficient Characterization of Analog Circuit Behavior. VL 1995: 69-76
1994
3EEMatthias Deegener, Sorin A. Huss: Software/hardware Co-Design in the MuSE environment. CODES 1994: 195-202
2 Uwe F. Baake, Sorin A. Huss: Scheduling of Signal Transition Graphs under Timing Constraints. ISCAS 1994: 205-208
1993
1 Uwe F. Baake, Sorin A. Huss: Object-oriented representation, analysis, and scheduling of signal transition graphs. ISCAS 1993: 2737-2740

Coauthor Index

1Mario Anton [33]
2Uwe F. Baake [1] [2] [5]
3W. W. Bachmann [21]
4Jens Bieger [14] [16]
5Wolfgang Boßung [7] [8]
6Murtuza Cutleriwala [24]
7Matthias Deegener [3]
8M. Ernst [12] [15]
9M. Garg [9] [10]
10Michael Goedecke [4]
11P. Hastono [20]
12O. Hauck [9] [10] [11] [12]
13B. Henhapl [15]
14Stephan Hermanns [25]
15Adeel Israr [38] [41]
16Arshad Jhumka [26]
17Michael Jung [16] [17] [22]
18A. Katoch [11]
19Oliver Kelm [32]
20Stephan Klaus [7] [8] [13] [16] [20] [26]
21S. Klupsch [12] [15]
22Andreas Kühn [18] [27]
23Ralf Laue [22] [31] [32] [34] [35] [37] [39]
24Andreas Lehmler [33]
25Andreas C. Lemke [33]
26Felix Madlener [27] [42]
27H. Gregor Molter [37] [42] [43]
28Kai Morich [4]
29Felix Rieder [37]
30R. Rosenberger [6]
31Kartik Saxena [37]
32Sebastian Schipp [32]
33Abdulhadi Shoufan [24] [31] [32] [34] [36] [39] [41] [43]
34Thomas Steininger [16]
35Falko Strenzke [43]
36Osman Ugus [39]
37Juergen Weber [33]
38Lars Wehmeyer [8]
39Dirk Westhoff [39]
40Thorsten Wink [43]
41Song Yuan [19]
42Kaiping Zeng [23] [28] [29]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)