dblp.uni-trier.dewww.uni-trier.de

Raymond R. Hoare Vis

Raymond Hoare

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo
Home Page

*2008
34EEYing Yu, Raymond R. Hoare, Alex K. Jones: A CAM-based intrusion detection system for single-packet attack detection. IPDPS 2008: 1-8
33EEAlex K. Jones, Swapna R. Dontharaju, Shen Chih Tung, Leonid Mats, Peter J. Hawrylak, Raymond R. Hoare, James T. Cain, Marlin H. Mickle: Radio frequency identification prototyping. ACM Trans. Design Autom. Electr. Syst. 13(2): (2008)
32EERaymond R. Hoare, Zhu Ding, Alex K. Jones: A two-stage hardware scheduler combining greedy and optimal scheduling. J. Parallel Distrib. Comput. 68(11): 1437-1451 (2008)
2007
31EEAlex K. Jones, Raymond R. Hoare, Joseph St. Onge, Joshua M. Lucas, Shuyi Shao, Rami G. Melhem: Linking Compilation and Visualization for Massively Parallel Programs. IPDPS 2007: 1-8
30EEAlex K. Jones, Raymond Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle: An automated, FPGA-based reconfigurable, low-power RFID tag. Microprocessors and Microsystems 31(2): 116-134 (2007)
2006
29EEAlex K. Jones, Raymond R. Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle: An automated, reconfigurable, low-power RFID tag. DAC 2006: 131-136
28EEAlex K. Jones, Raymond R. Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle: A Field Programmable RFID Tag and Associated Design Flow. FCCM 2006: 165-174
27EERaymond R. Hoare, Ivan S. Kourtev, Alex K. Jones: Technology Mapping for Field Programmable Gate Arrays using Content-Addressable Memory (CAM). FCCM 2006: 299-300
26EEGayatri Mehta, Raymond R. Hoare, Justin Stander, Alex K. Jones: A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture. FCCM 2006: 309-310
25EEGayatri Mehta, Raymond R. Hoare, Justin Stander, Alex K. Jones: Design space exploration for low-power reconfigurable fabrics. IPDPS 2006
24EEJ. W. Schuster, K. Gupta, Raymond R. Hoare: Speech silicon AM: an FPGA-based acoustic modeling pipeline for hidden Markov model based speech recognition. IPDPS 2006
23EEYing Yu, Raymond R. Hoare, Alex K. Jones, Ralph Sprang: A hybrid encoding scheme for efficient single-cycle range matching in content addressable memory. ISCAS 2006
22EERaymond R. Hoare, Zhu Ding, Alex K. Jones: Interconnect routing and scheduling - A near-optimal real-time hardware scheduler for large cardinality crossbar switches. SC 2006: 94
21EEZhu Ding, Raymond R. Hoare, Alex K. Jones, Rami G. Melhem: Interconnect routing and scheduling - Level-wise scheduling algorithm for fat tree interconnection networks. SC 2006: 96
20EEAlex K. Jones, Raymond Hoare, Dara Kusic, Gayatri Mehta, Joshua Fazekas, John Foster: Reducing power while increasing performance with supercisc. ACM Trans. Embedded Comput. Syst. 5(3): 658-686 (2006)
19EEAlex K. Jones, Swapna R. Dontharaju, Shen Chih Tung, Peter J. Hawrylak, Leonid Mats, Raymond R. Hoare, James T. Cain, Marlin H. Mickle: Passive active radio frequency identification tags. IJRFITA 1(1): 52-73 (2006)
18EEGayatri Mehta, Justin Stander, Joshua M. Lucas, Raymond R. Hoare, Brady Hunsaker, Alex K. Jones: A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture. J. Low Power Electronics 2(2): 148-164 (2006)
17EEJoshua M. Lucas, Raymond Hoare, Ivan S. Kourtev, Alex K. Jones: Technology mapping for Field Programmable Gate Arrays using Content-Addressable Memory (CAM). Microprocessors and Microsystems 30(7): 445-456 (2006)
2005
16EEJoshua M. Lucas, Raymond Hoare, Alex K. Jones: Optimizing Technology Mapping for FPGAs Using CAMs. FCCM 2005: 293-294
15EEAlex K. Jones, Raymond Hoare, Dara Kusic, Joshua Fazekas, John Foster: An FPGA-based VLIW processor with custom hardware execution. FPGA 2005: 107-117
14EEDara Kusic, Raymond Hoare, Alex K. Jones, Joshua Fazekas, John Foster: Extracting Speedup From C-Code With Poor Instruction-Level Parallelism. IPDPS 2005
13EEZhu Ding, Raymond R. Hoare, Alex K. Jones, Dan Li, Shou-Kuo Shao, Shen-Chien Tung, Jiang Zheng, Rami G. Melhem: Switch Design to Enable Predictive Multiplexed Switching in Multiprocessor Networks. IPDPS 2005
12EEKevin J. Barker, Alan F. Benner, Raymond R. Hoare, Adolfy Hoisie, Alex K. Jones, Darren J. Kerbyson, Dan Li, Rami G. Melhem, Ramakrishnan Rajamony, Eugen Schenfeld, Shuyi Shao, Craig B. Stunkel, Peter Walker: On the Feasibility of Optical Circuit Switching for High Performance Computing Systems. SC 2005: 16
11EERaymond R. Hoare, Zhu Ding, Shen Chih Tung, Rami G. Melhem, Alex K. Jones: A framework for the design, synthesis and cycle-accurate simulation of multiprocessor networks. J. Parallel Distrib. Comput. 65(10): 1237-1252 (2005)
2004
10EERaymond Hoare, Shen Chih Tung, Katrina Werger: An 88-Way Multiprocessor within an FPGA with Customizable Instructions. IPDPS 2004
2003
9EEIvan S. Kourtev, Raymond R. Hoare, Steven P. Levitan, Tom Cain, Bruce R. Childers, Donald M. Chiarulli, David L. Landis: Short Courses in System-on-a-Chip (SoC) Design. MSE 2003: 126-127
8EERaymond Hoare, Shen Chih Tung: Combining Mentor Graphics? HDL Designer FPGA Flow with a Reconfigurable System on a Programmable Chip, Educational Opportunity or Insanity? MSE 2003: 128-130
2002
7 Raymond R. Hoare, D. Swope, S. Bailey: A Width Expansion of MMX/SIMD Processing Architecture on an FPGA. IASTED PDCS 2002: 562-566
6EEDavid Reed, Raymond Hoare: An SoC Solution for Massive Parallel Processing. IPDPS 2002
2001
5 T. A. Johnson, Raymond R. Hoare: Cyclical Cascade Chains: A Dynamic Barrier Synchronization Mechanism for Multiprocessor Systems. IPDPS 2001: 193
2000
4EERaymond Hoare: ClusterNet: An Object-Oriented Cluster Network. IPDPS Workshops 2000: 28-38
1998
3EERaymond Hoare, Henry G. Dietz: A Case for Aggregate Networks. IPPS/SPDP 1998: 162-166
1997
2EESoohong P. Kim, Raymond Hoare, Henry G. Dietz: VLIW Across Multiple Superscalar Processors on a Single Chip. IEEE PACT 1997: 166-
1996
1 Henry G. Dietz, Raymond Hoare, Timothy Mattox: A Fine-Grain Parallel Architecture Based on Barrier Synchronization. ICPP, Vol. 1 1996: 247-250

Coauthor Index

1S. Bailey [7]
2Kevin J. Barker [12]
3Alan F. Benner [12]
4James T. Cain [19] [28] [29] [30] [33]
5Tom Cain [9]
6Donald M. Chiarulli [9]
7Bruce R. Childers [9]
8Henry G. Dietz (Hank G. Dietz) [1] [2] [3]
9Zhu Ding [11] [13] [21] [22] [32]
10Swapna R. Dontharaju [19] [28] [29] [30] [33]
11Joshua Fazekas [14] [15] [20] [28] [29] [30]
12John Foster [14] [15] [20]
13K. Gupta [24]
14Peter J. Hawrylak [19] [33]
15Adolfy Hoisie [12]
16Brady Hunsaker [18]
17T. A. Johnson [5]
18Alex K. Jones [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [25] [26] [27] [28] [29] [30] [31] [32] [33] [34]
19Darren J. Kerbyson [12]
20Soohong P. Kim [2]
21Ivan S. Kourtev [9] [17] [27]
22Dara Kusic [14] [15] [20]
23David L. Landis [9]
24Steven P. Levitan [9]
25Dan Li [12] [13]
26Joshua M. Lucas [16] [17] [18] [31]
27Leonid Mats [19] [33]
28Timothy Mattox [1]
29Gayatri Mehta [18] [20] [25] [26]
30Rami G. Melhem [11] [12] [13] [21] [31]
31Marlin H. Mickle [19] [28] [29] [30] [33]
32Joseph St. Onge [31]
33Ramakrishnan Rajamony [12]
34David Reed [6]
35Eugen Schenfeld [12]
36J. W. Schuster [24]
37Shou-Kuo Shao [13]
38Shuyi Shao [12] [31]
39Ralph Sprang [23] [28] [29] [30]
40Justin Stander [18] [25] [26]
41Craig B. Stunkel [12]
42D. Swope [7]
43Shen Chih Tung [8] [10] [11] [19] [28] [29] [30] [33]
44Shen-Chien Tung [13]
45Peter Walker [12]
46Katrina Werger [10]
47Ying Yu [23] [34]
48Jiang Zheng [13]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)