| 2007 |
| 13 | EE | Ralf Wimmer,
Marc Herbstritt,
Bernd Becker:
Optimization techniques for BDD-based bisimulation computation.
ACM Great Lakes Symposium on VLSI 2007: 405-410 |
| 12 | | Marc Herbstritt,
Bernd Becker,
Erika Ábrahám,
Christian Herde:
On Variable Selection in SAT-LP-based Bounded Model Checking of Linear Hybrid Automata.
DDECS 2007: 391-396 |
| 11 | EE | Marc Herbstritt,
Bernd Becker:
On Combining 01X-Logic and QBF.
EUROCAST 2007: 531-538 |
| 10 | EE | Erika Ábrahám,
Marc Herbstritt,
Bernd Becker,
Martin Steffen:
Bounded Model Checking with Parametric Data Structures.
Electr. Notes Theor. Comput. Sci. 174(3): 3-16 (2007) |
| 2006 |
| 9 | EE | Ralf Wimmer,
Marc Herbstritt,
Holger Hermanns,
Kelley Strampp,
Bernd Becker:
Sigref- A Symbolic Bisimulation Tool Box.
ATVA 2006: 477-492 |
| 8 | | Ralf Wimmer,
Marc Herbstritt,
Bernd Becker:
Minimization of Large State Spaces using Symbolic Branching Bisimulation.
DDECS 2006: 9-14 |
| 7 | EE | Marc Herbstritt,
Bernd Becker,
Christoph Scholl:
Advanced SAT-Techniques for Bounded Model Checking of Blackbox Designs.
MTV 2006: 37-44 |
| 6 | EE | Eckard Böde,
Marc Herbstritt,
Holger Hermanns,
Sven Johr,
Thomas Peikenkamp,
Reza Pulungan,
Ralf Wimmer,
Bernd Becker:
Compositional Performability Evaluation for STATEMATE.
QEST 2006: 167-178 |
| 2005 |
| 5 | EE | Marc Herbstritt,
Bernd Becker:
On SAT-based Bounded Invariant Checking of Blackbox Designs.
MTV 2005: 23-28 |
| 2004 |
| 4 | EE | Marc Herbstritt,
Thomas Kmieciak,
Bernd Becker:
On the Impact of Structural Circuit Partitioning on SAT-Based Combinational Circuit Verification.
MTV 2004: 50-55 |
| 2003 |
| 3 | EE | Marc Herbstritt,
Bernd Becker:
Conflict-Based Selection of Branching Rules.
SAT 2003: 441-451 |
| 2001 |
| 2 | EE | Christoph Scholl,
Marc Herbstritt,
Bernd Becker:
Exploiting don't cares to minimize *BMDs.
ISCAS (5) 2001: 191-194 |
| 1999 |
| 1 | EE | Rolf Drechsler,
Marc Herbstritt,
Bernd Becker:
Grouping heuristics for word-level decision diagrams.
ISCAS (1) 1999: 411-414 |