Ou He

2008
2	EE	Jiayi Liu, Sheqin Dong, Xianlong Hong, Yibo Wang, Ou He, Satoshi Goto: Symmetry constraint based on mismatch analysis for analog layout in SOI technology. ASP-DAC 2008: 772-775
2007
1	EE	Ou He, Sheqin Dong, Jinian Bian, Yuchun Ma, Xianlong Hong: An effective buffer planning algorithm for IP based fixed-outline SOC placement. ACM Great Lakes Symposium on VLSI 2007: 564-569

Coauthor Index

1	Jinian Bian	[1]
2	Sheqin Dong	[1] [2]
3	Satoshi Goto	[2]
4	Xianlong Hong	[1] [2]
5	Jiayi Liu	[2]
6	Yuchun Ma	[1]
7	Yibo Wang	[2]