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Lei He Vis

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*2009
176EEYiyu Shi, Wei Yao, Jinjun Xiong, Lei He: Incremental and on-demand random walk for iterative power distribution network analysis. ASP-DAC 2009: 185-190
175EEYiyu Shi, Jinjun Xiong, Howard Chen, Lei He: Stochastic current prediction enabled frequency actuator for runtime resonance noise reduction. ASP-DAC 2009: 373-378
174EELerong Cheng, Puneet Gupta, Lei He: Accounting for non-linear dependence using function driven component analysis. ASP-DAC 2009: 474-479
173EELerong Cheng, Puneet Gupta, Costas J. Spanos, Kun Qian, Lei He: Physically justifiable die-level modeling of spatial variation in view of systematic across wafer variability. DAC 2009: 104-109
172EEFang Gong, Hao Yu, Lei He: PiCAP: a parallel and incremental capacitance extraction considering stochastic process variation. DAC 2009: 764-769
171EELei He, Juan Li, Qing Wang, Ye Yang: Predicting Upgrade Project Defects Based on Enhancement Requirements: An Empirical Study. ICSP 2009: 268-279
170EEWei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti, Yu Hu: Worst case timing jitter and amplitude noise in differential signaling. ISQED 2009: 40-46
169EEJu-Yueh Lee, Yu Hu, Rupak Majumdar, Lei He: Simultaneous test pattern compaction, ordering and X-filling for testing power reduction. ISQED 2009: 702-707
168EEHao Yu, Joanna Ho, Lei He: Allocating power ground vias in 3D ICs for simultaneous power and thermal integrity. ACM Trans. Design Autom. Electr. Syst. 14(3): (2009)
167EELerong Cheng, Jinjun Xiong, Lei He: Non-Gaussian Statistical Timing Analysis Using Second-Order Polynomial Fitting. IEEE Trans. on CAD of Integrated Circuits and Systems 28(1): 130-140 (2009)
166EEShenghua Liu, Guoqiang Chen, Tom Tong Jing, Lei He, Tianpei Zhang, Robi Dutta, Xianlong Hong: Substrate Topological Routing for High-Density Packages. IEEE Trans. on CAD of Integrated Circuits and Systems 28(2): 207-216 (2009)
165EEYu Hu, Satyaki Das, Steven Trimberger, Lei He: Design and Synthesis of Programmable Logic Block With Mixed LUT and Macrogate. IEEE Trans. on CAD of Integrated Circuits and Systems 28(4): 591-595 (2009)
2008
164EELerong Cheng, Jinjun Xiong, Lei He: Non-Gaussian statistical timing analysis using second-order polynomial fitting. ASP-DAC 2008: 298-303
163EELei He, Chunming Li, Chenyang Xu: Intensity statistics-based HSI diffusion for color photo denoising. CVPR 2008
162EEZhen Cao, Brian Foo, Lei He, Mihaela van der Schaar: Optimality and improvement of dynamic voltage scaling algorithms for multimedia applications. DAC 2008: 179-184
161EEYu Hu, Victor Shih, Rupak Majumdar, Lei He: FPGA area reduction by multi-output function based sequential resynthesis. DAC 2008: 24-29
160EEShenghua Liu, Guoqiang Chen, Tom Tong Jing, Lei He, Tianpei Zhang, Robi Dutta, Xianlong Hong: Topological routing to maximize routability for package substrate. DAC 2008: 566-569
159EELei He, Xiangjie Ma, Weili Zhang, Yunfei Guo, Hailong Ma: The Analysis and Simulation of a Hybrid Video Broadcast Architecture. EUC (2) 2008: 524-531
158EELerong Cheng, Yan Lin, Lei He: Trace-based framework for concurrent development of process and FPGA architecture considering process variation and reliability. FPGA 2008: 159-168
157EELei He, Xiangjie Ma, Weili Zhang, Yunfei Guo, Wenbo Liu: A Video Broadcast Architecture with Server Placement Programming. GridNets 2008: 130-137
156EELei He, Xiangjie Ma, Wenbo Liu, Yunfei Guo: A Peer-to-Peer Internet Video Broadcast System Utilizing the Locality Properties. HPCC 2008: 404-411
155EEXiangjie Ma, Lei He, Xiaozhuo Gu, Julong Lan, Baisheng Zhang: Study on a Novel Scheduling Algorithm ofthe Multiple-Plane and Multiple-Stage Switching Fabric. HPCC 2008: 412-417
154EEYingjian Zhi, Na Wang, Binqiang Wang, Lei He: Urgency-Based Batching Policy for Streaming Media. HPCC 2008: 580-585
153EEXiangjie Ma, Xiaozhuo Gu, Lei He, Julong Lan, Baisheng Zhang: Performance Study on the MPMS Fabric: A Novel Parallel and Distributed Switching System Architecture. HPCC 2008: 69-76
152EEYu Hu, Zhe Feng, Lei He, Rupak Majumdar: Robust FPGA resynthesis based on fault-tolerant Boolean matching. ICCAD 2008: 706-713
151EELei He, Chenyang Xu: Color Photo Denoising Via Hue, Saturation and Intensity Diffusion. ICIAR 2008: 159-169
150EELei He: Spatially varying weighted HSI diffusion for color image denoising. ICIP 2008: 581-584
149EELei He, Ashraf Saad, Joy Reed, Patrick Hannigan, Edward Strauser: Information technology education for k-12 students and teachers: from sensor network to comprehensive and customized web interaction. SIGITE Conference 2008: 65-70
148EEAshraf Saad, Lei He, Joy Reed, Edward Strauser, Patrick Hannigan: Ossabest: a comprehensive itest project for middle and high school teachers and students. SIGITE Conference 2008: 71-76
147EEYu Hu, Yan Lin, Lei He, Tim Tuan: Physical synthesis for FPGA interconnect power reduction by dual-Vdd budgeting and retiming. ACM Trans. Design Autom. Electr. Syst. 13(2): (2008)
146EEHao Yu, Yiyu Shi, Lei He, Tanay Karnik: Thermal Via Allocation for 3-D ICs Considering Temporally and Spatially Variant Thermal Power. IEEE Trans. VLSI Syst. 16(12): 1609-1619 (2008)
145EEYan Lin, Lei He, Mike Hutton: Stochastic Physical Synthesis Considering Prerouting Interconnect Uncertainty and Process Variation for FPGAs. IEEE Trans. VLSI Syst. 16(2): 124-133 (2008)
144EEYu Hu, Victor Shih, Rupak Majumdar, Lei He: Exploiting Symmetries to Speed Up SAT-Based Boolean Matching for Logic Synthesis of FPGAs. IEEE Trans. on CAD of Integrated Circuits and Systems 27(10): 1751-1760 (2008)
143EEZhen Cao, Tong Jing, Jinjun Xiong, Yu Hu, Zhe Feng, Lei He, Xianlong Hong: Fashion: A Fast and Accurate Solution to Global Routing Problem. IEEE Trans. on CAD of Integrated Circuits and Systems 27(4): 726-737 (2008)
142EEYiyu Shi, Jinjun Xiong, Chunchen Liu, Lei He: Efficient Decoupling Capacitance Budgeting Considering Operation and Process Variations. IEEE Trans. on CAD of Integrated Circuits and Systems 27(7): 1253-1263 (2008)
141EEKing Ho Tam, Yu Hu, Lei He, Tom Tong Jing, Xinyi Zhang: Dual-Vdd Buffer Insertion for Power Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 27(8): 1498-1502 (2008)
140EELei He, Zhigang Peng, Bryan Everding, Xun Wang, Chia Y. Han, Kenneth L. Weiss, William G. Wee: A comparative study of deformable contour methods on medical image segmentation. Image Vision Comput. 26(2): 141-163 (2008)
2007
139EELei He, Patricia Brandt: WEAS: a web-based educational assessment system. ACM Southeast Regional Conference 2007: 126-131
138EEZhen Cao, Tong Jing, Jinjun Xiong, Yu Hu, Lei He, Xianlong Hong: DpRouter: A Fast and Accurate Dynamic-Pattern-Based Global Routing Algorithm. ASP-DAC 2007: 256-261
137EELerong Cheng, Jinjun Xiong, Lei He: Non-Linear Statistical Static Timing Analysis for Non-Gaussian Variation Sources. DAC 2007: 250-255
136EEHao Yu, Chunta Chu, Lei He: Off-chip Decoupling Capacitor Allocation for Chip Package Co-Design. DAC 2007: 618-621
135EEYan Lin, Lei He: Interactive presentation: Statistical dual-Vdd assignment for FPGA interconnect power reduction. DATE 2007: 636-641
134EEYan Lin, Lei He: Stochastic physical synthesis for FPGAs with pre-routing interconnect uncertainty and process variation. FPGA 2007: 80-88
133EEYu Hu, Satyaki Das, Steven Trimberger, Lei He: Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates. ICCAD 2007: 188-193
132EEYan Lin, Lei He: Device and architecture concurrent optimization for FPGA transient soft error rate. ICCAD 2007: 194-198
131EEYu Hu, Victor Shih, Rupak Majumdar, Lei He: Exploiting symmetry in SAT-based Boolean matching for heterogeneous FPGA technology mapping. ICCAD 2007: 350-353
130EEChunta Chu, Xinyi Zhang, Lei He, Tong Jing: Temperature aware microprocessor floorplanning considering application dependent power load. ICCAD 2007: 586-589
129EEYiyu Shi, Jinjun Xiong, Chunchen Liu, Lei He: Efficient decoupling capacitance budgeting considering operation and process variations. ICCAD 2007: 803-810
128EELei He, Chuanjiang Luo, Feng Zhu, Yingming Hao, Jinjun Ou, Jing Zhou: Depth Map Regeneration via Improved Graph Cuts Using a Novel Omnidirectional Stereo Sensor. ICCV 2007: 1-8
127 Lei He, Feng Zhu, Yingming Hao: A Comparative Study on Pose Estimation for Monocular Vision and Binocular Vision Without Modeling. IPCV 2007: 627-631
126EEHao Yu, Yu Hu, Chunchen Liu, Lei He: Minimal skew clock embedding considering time variant temperature gradient. ISPD 2007: 173-180
125EEYiyu Shi, Lei He: Empire: an efficient and compact multiple-parameterized model order reduction method. ISPD 2007: 51-58
124EELei He, Chuanjiang Luo, Yanfeng Geng, Feng Zhu, Yingming Hao: Reliable Depth Map Regeneration Via a Novel Omnidirectional Stereo Sensor. ISVC (1) 2007: 278-287
123EEYu Hu, King Ho Tam, Tong Jing, Lei He: Fast dual-vdd buffering based on interconnect prediction and sampling. SLIP 2007: 95-102
122EEYiyu Shi, Paul Mesa, Hao Yu, Lei He: Circuit-simulated obstacle-aware Steiner routing. ACM Trans. Design Autom. Electr. Syst. 12(3): (2007)
121EEChangbo Long, Lucanus J. Simonson, Weiping Liao, Lei He: Microarchitecture Configurations and Floorplanning Co-Optimization. IEEE Trans. VLSI Syst. 15(7): 830-841 (2007)
120EEJinjun Xiong, Vladimir Zolotov, Lei He: Robust Extraction of Spatial Correlation. IEEE Trans. on CAD of Integrated Circuits and Systems 26(4): 619-631 (2007)
119EEJun Chen, Lei He: Efficient In-Package Decoupling Capacitor Optimization for I/O Power Integrity. IEEE Trans. on CAD of Integrated Circuits and Systems 26(4): 734-738 (2007)
118EEJinjun Xiong, Lei He: Probabilistic Transitive-Closure Ordering and Its Application on Variational Buffer Insertion. IEEE Trans. on CAD of Integrated Circuits and Systems 26(4): 739-742 (2007)
117EEFei Li, Yan Lin, Lei He: Field Programmability of Supply Voltages for FPGA Power Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 26(4): 752-764 (2007)
116EELei He, Andrew B. Kahng, King Ho Tam, Jinjun Xiong: Simultaneous Buffer Insertion and Wire Sizing Considering Systematic CMP Variation and Random Leff Variation. IEEE Trans. on CAD of Integrated Circuits and Systems 26(5): 845-857 (2007)
115EELerong Cheng, Fei Li, Yan Lin, Phoebe Wong, Lei He: Device and Architecture Cooptimization for FPGA Power Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 26(7): 1211-1221 (2007)
114EEPu Liu, Sheldon X.-D. Tan, Bruce McGaughy, Lifeng Wu, Lei He: TermMerg: An Efficient Terminal-Reduction Method for Interconnect Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 26(8): 1382-1392 (2007)
113EEJinjun Xiong, Lei He: Full-chip multilevel routing for power and signal integrity. Integration 40(3): 226-234 (2007)
2006
112EEJinjun Xiong, Yiu-Chung Wong, Egino Sarto, Lei He: Constraint driven I/O planning and placement for chip-package co-design. ASP-DAC 2006: 207-212
111EEYiyu Shi, Tong Jing, Lei He, Zhe Feng, Xianlong Hong: CDCTree: novel obstacle-avoiding routing tree construction based on current driven circuit model. ASP-DAC 2006: 630-635
110EEHao Yu, Yiyu Shi, Lei He: Fast analysis of structured power grid by triangularization based structure preserving model order reduction. DAC 2006: 205-210
109EEYiyu Shi, Paul Mesa, Hao Yu, Lei He: Circuit simulation based obstacle-aware Steiner routing. DAC 2006: 385-388
108EEYu Hu, Yan Lin, Lei He, Tim Tuan: Simultaneous time slack budgeting and retiming for dual-Vdd FPGA power reduction. DAC 2006: 478-483
107EELerong Cheng, Jinjun Xiong, Lei He, Mike Hutton: FPGA Performance Optimization Via Chipwise Placement Considering Process Variations. FPL 2006: 1-6
106EEMike Hutton, Yan Lin, Lei He: Placement and Timing for FPGAs Considering Variations. FPL 2006: 1-7
105EEHao Yu, Yiyu Shi, Lei He, David Smart: A fast block structure preserving model order reduction for inverse inductance circuits. ICCAD 2006: 7-12
104EEHao Yu, Joanna Ho, Lei He: Simultaneous power and thermal integrity driven via stapling in 3D ICs. ICCAD 2006: 802-808
103EELei He, Chia Y. Han, William G. Wee: Object Recognition and Recovery by Skeleton Graph Matching. ICME 2006: 993-996
102EEHao Yu, Yiyu Shi, Lei He, Tanay Karnik: Thermal via allocation for 3D ICs considering temporally and spatially variant thermal power. ISLPED 2006: 156-161
101EEYan Lin, Yu Hu, Lei He, Vijay Raghunat: An efficient chip-level time slack allocation algorithm for Dual-Vdd FPGA power reduction. ISLPED 2006: 168-173
100EEChangbo Long, Sasank Reddy, Sudhakar Pamarti, Lei He, Tanay Karnik: Power-efficient pulse width modulation DC/DC converters with zero voltage switching control. ISLPED 2006: 326-329
99EEJinjun Xiong, Lei He: Fast buffer insertion considering process variations. ISPD 2006: 128-135
98EEJinjun Xiong, Vladimir Zolotov, Lei He: Robust extraction of spatial correlation. ISPD 2006: 2-9
97EEYiyu Shi, Hao Yu, Lei He: SAMSON: a generalized second-order arnoldi method for reducing multiple source linear network with susceptance. ISPD 2006: 25-32
96EEJun Chen, Lei He: Noise driven in-package decoupling capacitor optimization for power integrity. ISPD 2006: 94-101
95EEPei Ding, Lei He, Xiang Yan, Rui Zhao, Jie Hao: Robust Mandarin Speech Recognition for Car Navigation Interface. PCM 2006: 302-309
94EEYan Lin, Lei He: Dual-Vdd Interconnect With Chip-Level Time Slack Allocation for FPGA Power Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2023-2034 (2006)
93EEZhenyu Qi, Hao Yu, Pu Liu, Sheldon X.-D. Tan, Lei He: Wideband passive multiport model order reduction and realization of RLCM circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 25(8): 1496-1509 (2006)
92EEJun Chen, Lei He: Modeling and synthesis of multiport transmission line for multichannel communication. IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1664-1676 (2006)
2005
91EEHao Yu, Lei He, Zhenyu Qi, Sheldon X.-D. Tan: A wideband hierarchical circuit reduction for massively coupled interconnects. ASP-DAC 2005: 111-114
90EETong Jing, Ling Zhang, Jinghong Liang, Jingyu Xu, Xianlong Hong, Jinjun Xiong, Lei He: A Min-area Solution to Performance and RLC Crosstalk Driven Global Routing Problem. ASP-DAC 2005: 115-120
89EEZhenyu Qi, Sheldon X.-D. Tan, Hao Yu, Lei He: Wideband modeling of RF/Analog circuits via hierarchical multi-point model order reduction. ASP-DAC 2005: 224-229
88EEYan Lin, Fei Li, Lei He: Routing track duplication with fine-grained power-gating for FPGA interconnect power reduction. ASP-DAC 2005: 645-650
87EEJinjun Xiong, Lei He: Probabilistic congestion model considering shielding for crosstalk reduction. ASP-DAC 2005: 739-742
86EEBodo Rosenhahn, Lei He, Reinhard Klette: Automatic Human Model Generation. CAIP 2005: 41-48
85EEKing Ho Tam, Lei He: Power optimal dual-Vdd buffered tree considering buffer stations and blockages. DAC 2005: 497-502
84EEYan Lin, Lei He: Leakage efficient chip-level dual-Vdd assignment with time slack allocation for FPGA power reduction. DAC 2005: 720-725
83EELerong Cheng, Phoebe Wong, Fei Li, Yan Lin, Lei He: Device and architecture co-optimization for FPGA power reduction. DAC 2005: 915-920
82EEJennifer L. Wong, Weiping Liao, Fei Li, Lei He, Miodrag Potkonjak: Scheduling of Soft Real-Time Systems for Context-Aware Applications. DATE 2005: 318-323
81EEJinjun Xiong, King Ho Tam, Lei He: Buffer Insertion Considering Process Variation. DATE 2005: 970-975
80EEYan Lin, Fei Li, Lei He: Power modeling and architecture evaluation for FPGA with novel circuits for Vdd programmability. FPGA 2005: 199-207
79 Ho-Yan Wong, Lerong Cheng, Yan Lin, Lei He: FPGA device and architecture evaluation considering process variations. ICCAD 2005: 19-24
78 Pu Liu, Sheldon X.-D. Tan, Hang Li, Zhenyu Qi, Jun Kong, Bruce McGaughy, Lei He: An efficient method for terminal reduction of interconnect circuits considering delay variations. ICCAD 2005: 821-826
77EEBin Chen, Lei He, Ping Liu: A Morphological Edge Detector for Gray-Level Image Thresholding. ICIAR 2005: 659-666
76EEHao Yu, Lei He: A sparsified vector potential equivalent circuit model for massively coupled interconnects. ISCAS (1) 2005: 105-108
75EEYu Ching Chang, King Ho Tam, Lei He: Power-optimal repeater insertion considering Vdd and Vth as design freedoms. ISLPED 2005: 137-142
74EELei He, Mike Hutton, Tim Tuan, Steven J. E. Wilton: Challenges and opportunities for low power FPGAs in nanometer technologies. ISLPED 2005: 90
73EELei He, Andrew B. Kahng, King Ho Tam, Jinjun Xiong: Simultaneous buffer insertion and wire sizing considering systematic CMP variation and random leff variation. ISPD 2005: 78-85
72EEAnirudh Devgan, Luca Daniel, Byron Krauter, Lei He: Modeling and Design of Chip-Package Interface. ISQED 2005: 6
71EEHao Yu, Lei He: Staggered Twisted-Bundle Interconnect for Crosstalk and Delay Reduction. ISQED 2005: 682-687
70EELei Zhu, Lei He, Alex Collier: MAPIS: A Mobile Amphibian Population Information System. ITCC (2) 2005: 254-259
69EELucanus J. Simonson, Lei He: Micro-architecture Performance Estimation by Formula. SAMOS 2005: 192-201
68EEWeiping Liao, Joseph M. Basile, Lei He: Microarchitecture-level leakage reduction with data retention. IEEE Trans. VLSI Syst. 13(11): 1324-1328 (2005)
67EEJinjun Xiong, Lei He: Extended global routing with RLC crosstalk constraints. IEEE Trans. VLSI Syst. 13(3): 319-329 (2005)
66EEYan Lin, Fei Li, Lei He: Circuits and architectures for field programmable gate array with configurable supply voltage. IEEE Trans. VLSI Syst. 13(9): 1035-1047 (2005)
65EEFei Li, Yizhou Lin, Lei He, Deming Chen, Jason Cong: Power modeling and characteristics of field programmable gate arrays. IEEE Trans. on CAD of Integrated Circuits and Systems 24(11): 1712-1724 (2005)
64EEJun Chen, Lei He: Piecewise linear model for transmission line with capacitive loading and ramp input. IEEE Trans. on CAD of Integrated Circuits and Systems 24(6): 928-937 (2005)
63EEWeiping Liao, Lei He, Kevin M. Lepak: Temperature and supply Voltage aware performance and power modeling at microarchitecture level. IEEE Trans. on CAD of Integrated Circuits and Systems 24(7): 1042-1053 (2005)
62EEJun Chen, Lei He: Worst case crosstalk noise for nonswitching victims in high-speed buses. IEEE Trans. on CAD of Integrated Circuits and Systems 24(8): 1275-1283 (2005)
61EEHao Yu, Lei He: A provably passive and cost-efficient model for inductive interconnects. IEEE Trans. on CAD of Integrated Circuits and Systems 24(8): 1283-1294 (2005)
60EEWeiping Liao, Lei He: Microarchitecture Level Interconnect Modeling Considering Layout Optimization. J. Low Power Electronics 1(3): 297-308 (2005)
2004
59EEJun Chen, Lei He: Modeling of coplanar waveguide for buffered clock tree. ASP-DAC 2004: 367-372
58EEFei Li, Lei He, Joseph M. Basile, Rakesh J. Patel, Hema Ramamurthy: High-level area and power-up current estimation considering rich cell library. ASP-DAC 2004: 899-904
57EELei He, Weiping Liao, Mircea R. Stan: System level leakage reduction considering the interdependence of temperature and leakage. DAC 2004: 12-17
56EEChangbo Long, Lucanus J. Simonson, Weiping Liao, Lei He: Floorplanning optimization with trajectory piecewise-linear model for pipelined interconnects. DAC 2004: 640-645
55EEFei Li, Yan Lin, Lei He: FPGA power reduction using configurable dual-Vdd. DAC 2004: 735-740
54EEJinjun Xiong, Lei He: Full-Chip Multilevel Routing for Power and Signal Integrity. DATE 2004: 1116-1123
53EEDeming Chen, Jason Cong, Fei Li, Lei He: Low-power technology mapping for FPGA architectures with dual supply voltages. FPGA 2004: 109-117
52EEFei Li, Yan Lin, Lei He, Jason Cong: Low-power FPGA using pre-defined dual-Vdd/dual-Vt fabrics. FPGA 2004: 42-50
51EEFei Li, Yan Lin, Lei He: Vdd programmability to reduce FPGA interconnect power. ICCAD 2004: 760-765
50EELei He, Tulika Mitra, Weng-Fai Wong: Configuration bitstream compression for dynamically reconfigurable FPGAs. ICCAD 2004: 766-773
49 Xin Zhao, Yici Cai, Qiang Zhou, Xianlong Hong, Lei He, Jinjun Xiong: Shielding area optimization under the solution of interconnect crosstalk. ISCAS (5) 2004: 297-300
48 Ling Zhang, Tong Jing, Xianlong Hong, Jingyu Xu, Jinjun Xiong, Lei He: Performance and RLC crosstalk driven global routing. ISCAS (5) 2004: 65-68
47EEChangbo Long, Jinjun Xiong, Lei He: On optimal physical synthesis of sleep transistors. ISPD 2004: 156-161
46EELucanus J. Simonson, King Ho Tam, Nataraj Akkiraju, Mosur Mohan, Lei He: Leveraging Delay Slack in Flip-Flop and Buffer Insertion for Power Reduction. ISQED 2004: 69-74
45EEKevin M. Lepak, Min Xu, Jun Chen, Lei He: Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization. ACM Trans. Design Autom. Electr. Syst. 9(3): 290-309 (2004)
44EEChangbo Long, Lei He: Distributed sleep transistor network for power reduction. IEEE Trans. VLSI Syst. 12(9): 937-946 (2004)
43EEJinjun Xiong, Lei He: Full-chip routing optimization with RLC crosstalk budgeting. IEEE Trans. on CAD of Integrated Circuits and Systems 23(3): 366-377 (2004)
42EEXun Wang, Lei He, William G. Wee: Deformable Contour Method: A Constrained Optimization Approach. International Journal of Computer Vision 59(1): 87-108 (2004)
41EELei He, Chia Y. Han, Bryan Everding, William G. Wee: Graph matching for object recognition and recovery. Pattern Recognition 37(7): 1557-1560 (2004)
2003
40EEChangbo Long, Lei He: Distributed sleep transistor network for power reduction. DAC 2003: 181-186
39EEHao Yu, Lei He: Vector potential equivalent circuit based on PEEC inversion. DAC 2003: 718-723
38EEFei Li, Deming Chen, Lei He, Jason Cong: Architecture evaluation for power-efficient FPGAs. FPGA 2003: 175-184
37EEWeiping Liao, Lei He: Full-Chip Interconnect Power Estimation and Simulation Considering Concurrent Repeater and Flip-Flop Insertion. ICCAD 2003: 574-580
36EEWeiping Liao, Fei Li, Lei He: Microarchitecture level power and thermal simulation considering temperature dependent leakage model. ISLPED 2003: 211-216
35EEWeiping Liao, Lei He: Coupled Power and Thermal Simulation with Active Cooling. PACS 2003: 148-163
34EEFei Li, Lei He, Joseph M. Basile, Rakesh Patel, Hema Ramamurthy: High Level Area and Current Estimation. PATMOS 2003: 259-268
33 Xun Wang, Lei He, Yingjie Tang, William G. Wee: A divide and conquer deformable contour method with a model based searching algorithm. IEEE Transactions on Systems, Man, and Cybernetics, Part B 33(5): 738-751 (2003)
2002
32EEJun Chen, Lei He: A decoupling method for analysis of coupled RLC interconnects. ACM Great Lakes Symposium on VLSI 2002: 41-46
31EEXun Wang, Lei He, Chia Y. Han, William G. Wee: Deformable contour method: a constrained optimization approach. BMVC 2002
30EEJames D. Z. Ma, Lei He: Towards global routing with RLC crosstalk constraints. DAC 2002: 669-672
29EEJinjun Xiong, Jun Chen, James Ma, Lei He: Post global routing RLC crosstalk budgeting. ICCAD 2002: 504-509
28EEWeiping Liao, Joseph M. Basile, Lei He: Leakage power modeling and reduction with data retention. ICCAD 2002: 714-719
27 Xun Wang, Lei He, William G. Wee: Constrained optimization: a geodesic snake approach. ICIP (2) 2002: 77-80
26 Lei He, Chia Y. Han, Xun Wang, Xiaokun Li, William G. Wee: A skeleton based shape matching and recovery approach. ICIP (3) 2002: 789-792
25 Xiaokun Li, Feng Gao, Bryan Everding, Lei He, William G. Wee: Error analysis, modeling, and correction for 3-D range data. ICIP (3) 2002: 873-876
24EEJun Chen, Lei He: Determination of worst-case crosstalk noise for non-switching victims in GHz+ buses. Timing Issues in the Specification and Synthesis of Digital Systems 2002: 92-97
23EEFei Li, Lei He, Kewal K. Saluja: Estimation of Maximum Power-Up Current. VLSI Design 2002: 51-
2001
22EEMin Xu, Lei He: An efficient model for frequency-dependent on-chip inductance. ACM Great Lakes Symposium on VLSI 2001: 115-120
21EELiang Yin, Lei He: An efficient analytical model of coupled on-chip RLC interconnects. ASP-DAC 2001: 385-390
20EEKevin M. Lepak, Irwan Luwandi, Lei He: Simultaneous Shield Insertion and Net Ordering under Explicit RLC Noise Constraint. DAC 2001: 199-202
19EEJames D. Z. Ma, Lei He: Formulae and Applications of Interconnect Estimation Considering Shield Insertion and Net Ordering. ICCAD 2001: 327-332
18 James D. Z. Ma, Arvind Parihar, Lei He: Pre-routing Estimation of Shielding for RLC Signal Integrity. ICCD 2001: 553-556
17EEFei Li, Lei He: Maximum current estimation considering power gating. ISPD 2001: 106-111
16EEZhenyu Tang, Lei He, Norman Chang, Shen Lin, Weize Xie, O. Sam Nakagawa: Instruction Prediction for Step Power Reduction. ISQED 2001: 211-216
15EEJames D. Z. Ma, Lei He: Simultaneous signal and power routing under K model. SLIP 2001: 175-182
14EEJason Cong, Lei He, Cheng-Kok Koh, David Zhigang Pan: Interconnect sizing and spacing with consideration of couplingcapacitance. IEEE Trans. on CAD of Integrated Circuits and Systems 20(9): 1164-1169 (2001)
2000
13 Yingjie Tang, Lei He, Xun Wang, William G. Wee: A Model Based Contour Searching Method. BIBE 2000: 347-354
12EENorman Chang, Shen Lin, O. Sam Nakagawa, Weize Xie, Lei He: Clocktree RLC Extraction with Efficient Inductance Modeling. DATE 2000: 522-
11EELei He, Kevin M. Lepak: Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization. ISPD 2000: 55-60
10EEZhenyu Tang, Norman Chang, Shen Lin, Weize Xie, O. Sam Nakagawa, Lei He: Ramp Up/Down Functional Unit to Reduce Step Power. PACS 2000: 13-24
1999
9EEJason Cong, Lei He: Theory and algorithm of local-refinement-based optimization with application to device and interconnect sizing. IEEE Trans. on CAD of Integrated Circuits and Systems 18(4): 406-420 (1999)
1998
8EEJason Cong, Lei He: An efficient technique for device and interconnect optimization in deep submicron designs. ISPD 1998: 45-51
1997
7EEJason Cong, Lei He, Andrew B. Kahng, David Noice, Nagesh Shirali, Steve H.-C. Yen: Analysis and Justification of a Simple, Practical 2 1/2-D Capacitance Extraction Methodology. DAC 1997: 627-632
6EEJason Cong, David Zhigang Pan, Lei He, Cheng-Kok Koh, Kei-Yong Khoo: Interconnect design for deep submicron ICs. ICCAD 1997: 478-485
5EEJason Cong, Lei He, Cheng-Kok Koh, David Zhigang Pan: Global interconnect sizing and spacing with consideration of coupling capacitance. ICCAD 1997: 628-633
1996
4EEJason Cong, Lei He: An efficient approach to simultaneous transistor and interconnect sizing. ICCAD 1996: 181-186
3EEJason Cong, Lei He: Optimal wiresizing for interconnects with multiple sources. ACM Trans. Design Autom. Electr. Syst. 1(4): 478-511 (1996)
2EEJason Cong, Lei He, Cheng-Kok Koh, Patrick H. Madden: Performance optimization of VLSI interconnect layout. Integration 21(1-2): 1-94 (1996)
1995
1EEJason Cong, Lei He: Optimal wiresizing for interconnects with multiple sources. ICCAD 1995: 568-574

Coauthor Index

1Nataraj Akkiraju [46]
2Joseph M. Basile [28] [34] [58] [68]
3Patricia Brandt [139]
4Yici Cai [49]
5Zhen Cao [138] [143] [162]
6Norman Chang [10] [12] [16]
7Yu Ching Chang [75]
8Bin Chen [77]
9Deming Chen [38] [53] [65]
10Guoqiang Chen [160] [166]
11Howard Chen [175]
12Jun Chen [24] [29] [32] [45] [59] [62] [64] [92] [96] [119]
13Lerong Cheng [79] [83] [107] [115] [137] [158] [164] [167] [173] [174]
14Chunta Chu [130] [136]
15Alex Collier [70]
16Jason Cong [1] [2] [3] [4] [5] [6] [7] [8] [9] [14] [38] [52] [53] [65]
17Luca Daniel [72]
18Satyaki Das [133] [165]
19Anirudh Devgan [72]
20Pei Ding [95]
21Robi Dutta [160] [166]
22Bryan Everding [25] [41] [140]
23Zhe Feng [111] [143] [152]
24Brian Foo [162]
25Feng Gao [25]
26Yanfeng Geng [124]
27Fang Gong [172]
28Xiaozhuo Gu [153] [155]
29Yunfei Guo [156] [157] [159]
30Puneet Gupta [173] [174]
31Chia Y. Han [26] [31] [41] [103] [140]
32Patrick Hannigan [148] [149]
33Jie Hao [95]
34Yingming Hao [124] [127] [128]
35Joanna Ho [104] [168]
36Xianlong Hong [48] [49] [90] [111] [138] [143] [160] [166]
37Yu Hu [101] [108] [123] [126] [131] [133] [138] [141] [143] [144] [147] [152] [161] [165] [169] [170]
38Michael Hutton (Michael D. Hutton, Mike Hutton) [74] [106] [107] [145]
39Tom Tong Jing [141] [160] [166]
40Tong Jing [48] [90] [111] [123] [130] [138] [143]
41Andrew B. Kahng [7] [73] [116]
42Tanay Karnik [100] [102] [146]
43Kei-Yong Khoo [6]
44Reinhard Klette [86]
45Cheng-Kok Koh [2] [5] [6] [14]
46Jun Kong [78]
47Byron Krauter [72]
48Julong Lan [153] [155]
49Ju-Yueh Lee [169]
50Kevin M. Lepak [11] [20] [45] [63]
51Chunming Li [163]
52Fei Li [17] [23] [34] [36] [38] [51] [52] [53] [55] [58] [65] [66] [80] [82] [83] [88] [115] [117]
53Hang Li [78]
54Juan Li [171]
55Xiaokun Li [25] [26]
56Jinghong Liang [90]
57Weiping Liao [28] [35] [36] [37] [56] [57] [60] [63] [68] [82] [121]
58Shen Lin [10] [12] [16]
59Yan Lin [51] [52] [55] [66] [79] [80] [83] [84] [88] [94] [101] [106] [108] [115] [117] [132] [134] [135] [145] [147] [158]
60Yizhou Lin [65]
61Chunchen Liu [126] [129] [142]
62Ping Liu [77]
63Pu Liu [78] [93] [114]
64Shenghua Liu [160] [166]
65Wenbo Liu [156] [157]
66Changbo Long [40] [44] [47] [56] [100] [121]
67Chuanjiang Luo [124] [128]
68Irwan Luwandi [20]
69Hailong Ma [159]
70James Ma [29]
71James D. Z. Ma [15] [18] [19] [30]
72Xiangjie Ma [153] [155] [156] [157] [159]
73Patrick H. Madden [2]
74Rupak Majumdar [131] [144] [152] [161] [169]
75Bruce McGaughy [78] [114]
76Paul Mesa [109] [122]
77Tulika Mitra [50]
78Mosur Mohan [46]
79O. Sam Nakagawa [10] [12] [16]
80David Noice [7]
81Jinjun Ou [128]
82Sudhakar Pamarti [100] [170]
83David Z. Pan (David Zhigang Pan) [5] [6] [14]
84Arvind Parihar [18]
85Rakesh Patel [34]
86Rakesh J. Patel [58]
87Zhigang Peng [140]
88Miodrag Potkonjak [82]
89Zhenyu Qi [78] [89] [91] [93]
90Kun Qian [173]
91Vijay Raghunat [101]
92Hema Ramamurthy [34] [58]
93Sasank Reddy [100]
94Joy Reed [148] [149]
95Bodo Rosenhahn [86]
96Ashraf Saad [148] [149]
97Kewal K. Saluja [23]
98Egino Sarto [112]
99Mihaela van der Schaar [162]
100Yiyu Shi [97] [102] [105] [109] [110] [111] [122] [125] [129] [142] [146] [170] [175] [176]
101Victor Shih [131] [144] [161]
102Nagesh Shirali [7]
103Lucanus J. Simonson [46] [56] [69] [121]
104David Smart [105]
105Costas J. Spanos [173]
106Mircea R. Stan [57]
107Edward Strauser [148] [149]
108King Ho Tam [46] [73] [75] [81] [85] [116] [123] [141]
109Sheldon X.-D. Tan (Xiang-Dong Tan) [78] [89] [91] [93] [114]
110Yingjie Tang [13] [33]
111Zhenyu Tang [10] [16]
112Steven Trimberger [133] [165]
113Tim Tuan [74] [108] [147]
114Binqiang Wang [154]
115Na Wang [154]
116Qing Wang [171]
117Xun Wang [13] [26] [27] [31] [33] [42] [140]
118William G. Wee [13] [25] [26] [27] [31] [33] [41] [42] [103] [140]
119Kenneth L. Weiss [140]
120Steven J. E. Wilton [74]
121Ho-Yan Wong [79]
122Jennifer L. Wong [82]
123Phoebe Wong [83] [115]
124Weng-Fai Wong [50]
125Yiu-Chung Wong [112]
126Lifeng Wu [114]
127Weize Xie [10] [12] [16]
128Jinjun Xiong [29] [43] [47] [48] [49] [54] [67] [73] [81] [87] [90] [98] [99] [107] [112] [113] [116] [118] [120] [129] [137] [138] [142] [143] [164] [167] [175] [176]
129Chenyang Xu [151] [163]
130Jingyu Xu [48] [90]
131Min Xu [22] [45]
132Xiang Yan [95]
133Ye Yang [171]
134Wei Yao [170] [176]
135Steve H.-C. Yen [7]
136Liang Yin [21]
137Hao Yu [39] [61] [71] [76] [89] [91] [93] [97] [102] [104] [105] [109] [110] [122] [126] [136] [146] [168] [172]
138Baisheng Zhang [153] [155]
139Ling Zhang [48] [90]
140Tianpei Zhang [160] [166]
141Weili Zhang [157] [159]
142Xinyi Zhang [130] [141]
143Rui Zhao [95]
144Xin Zhao [49]
145Yingjian Zhi [154]
146Jing Zhou [128]
147Qiang Zhou [49]
148Feng Zhu [124] [127] [128]
149Lei Zhu [70]
150Vladimir Zolotov [98] [120]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)