Masaki Hashizume

2006
27	EE	Masaki Hashizume, Tomomi Nishida, Hiroyuki Yotsuyanagi, Takeomi Tamesada, Yukiya Miura: Current Testable Design of Resistor String DACs. DELTA 2006: 197-200
2005
26	EE	Masaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Takeomi Tamesada: Electric field for detecting open leads in CMOS logic circuits by supply current testing. ISCAS (3) 2005: 2995-2998
25	EE	Hiroyuki Yotsuyanagi, Toshimasa Kuchii, Shigeki Nishikawa, Masaki Hashizume, Kozo Kinoshita: Reducing Scan Shifts Using Configurations of Compatible and Folding Scan Trees. J. Electronic Testing 21(6): 613-620 (2005)
2004
24	EE	Masaki Hashizume, Daisuke Yoneda, Hiroyuki Yotsuyanagi, Tetsuo Tada, Takeshi Koyama, Ikuro Morita, Takeomi Tamesada: I_DDQ Test Method Based on Wavelet Transformation for Noisy Current Measurement Environment. Asian Test Symposium 2004: 112-117
23	EE	Masaki Hashizume, Tetsuo Akita, Hiroyuki Yotsuyanagi, Takeomi Tamesada: CMOS Open Fault Detection by Appearance Time of Switching Supply Current. DELTA 2004: 183-188
22	EE	Isao Tsukimoto, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada: Practical Fault Coverage of Supply Current Tests for Bipolar ICs. DELTA 2004: 189-194
21	EE	Hiroyuki Yotsuyanagi, Toshimasa Kuchii, Shigeki Nishikawa, Masaki Hashizume, Kozo Kinoshita: On Configuring Scan Trees to Reduce Scan Shifts based on a Circuit Structure. DELTA 2004: 269-274
20	EE	Daisuke Ezaki, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada: A Power Supply Circuit Recycling Charge in Adiabatic Dynamic CMOS Logic Circuits. DELTA 2004: 306-311
19	EE	Masahiro Ichimiya, Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada: A test circuit for pin shorts generating oscillation in CMOS logic circuits. Systems and Computers in Japan 35(13): 10-20 (2004)
2003
18	EE	Masaki Hashizume, Teppei Takeda, Hiroyuki Yotsuyanagi, Takeomi Tamesada, Yukiya Miura, Kozo Kinoshita: A BIST Circuit for IDDQ Tests. Asian Test Symposium 2003: 390-395
17	EE	Hiroyuki Yotsuyanagi, Toshimasa Kuchii, Shigeki Nishikawa, Masaki Hashizume, Kozo Kinoshita: Reducing Scan Shifts Using Folding Scan Trees. Asian Test Symposium 2003: 6-11
2002
16	EE	Hiroyuki Yotsuyanagi, Masaki Hashizume, Takeomi Tamesada: Test Time Reduction for I DDQ Testing by Arranging Test Vectors. Asian Test Symposium 2002: 423-428
15	EE	Hiroyuki Yotsuyanagi, Masaki Hashizume, Taisuke Iwakiri, Masahiro Ichimiya, Takeomi Tamesada: Random Pattern Testability of the Open Defect Detection Method using Application of Time-variable Electric Field. DELTA 2002: 387-391
14	EE	Masaki Hashizume, Masashi Sato, Hiroyuki Yotsuyanagi, Takeomi Tamesada: Power Supply Circuit for High Speed Operation of Adiabatic Dynamic CMOS Logic Circuits. DELTA 2002: 459-461
2001
13	EE	Teppei Takeda, Masaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Yukiya Miura, Kozo Kinoshita: IDDQ Sensing Technique for High Speed IDDQ Testing. Asian Test Symposium 2001: 111-116
12	EE	Masaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Takeomi Tamesada: CMOS Open Defect Detection Based on Supply Current in Time-Variable Electric Field and Supply Voltage Application. Asian Test Symposium 2001: 117-122
11	EE	Hiroyuki Yotsuyanagi, Shinsuke Hata, Masaki Hashizume, Takeomi Tamesada: Sequential Redundancy Removal Using Test Generation and Multiple Unreachable States. Asian Test Symposium 2001: 23-
10	EE	Masaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Takeomi Tamesada: CMOS open defect detection by supply current test. DATE 2001: 509
9	EE	Hiroyuki Yotsuyanagi, Masaki Hashizume, Taisuke Iwakiri, Masahiro Ichimiya, Takeomi Tamesada: Test Pattern for Supply Current Test of Open Defects by Applying Time-Variable Electric Field. DFT 2001: 287-
2000
8	EE	Masaki Hashizume, Hiroyuki Yotsuyanagi, Masahiro Ichimiya, Takeomi Tamesada, Masashi Takeda: High speed IDDQ test and its testability for process variation. Asian Test Symposium 2000: 344-349
7	EE	Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada, Masashi Takeda: Testability Analysis of IDDQ Testing with Large Threshold Value. DFT 2000: 367-375
1999
6	EE	Masaki Hashizume, Hiroyuki Yotsuyanagi, Takeomi Tamesada: Identification of Feedback Bridging Faults with Oscillation. Asian Test Symposium 1999: 25-
1998
5	EE	Masaki Hashizume, Yukiya Miura, Masahiro Ichimiya, Takeomi Tamesada, Kozo Kinoshita: A High-Speed IDDQ Sensor for Low-Voltage ICs. Asian Test Symposium 1998: 327-
1997
4	EE	Masaki Hashizume, Toshimasa Kuchii, Takeomi Tamesada: Supply Current Test for Unit-to-unit Variations of Electrical Characteristics in Gates. Asian Test Symposium 1997: 372-377
1996
3	EE	Toshimasa Kuchii, Masaki Hashizume, Takeomi Tamesada: Algorithmic Test Generation for Supply Current Testing of TTL Combinational Circuits. Asian Test Symposium 1996: 171-176
1994
2		Masaki Hashizume, Takeomi Tamesada, Akio Sakamoto: A Maximum Clique Derivation Algorithm for Simplification of Incompletely Specified Machines. ISCAS 1994: 193-196
1988
1		Masaki Hashizume, Takeomi Tamesada, Kazuhiro Yamada, Masaaki Kawakami: Fault Detection of Combinational Circuits Based on Supply Current. ITC 1988: 374-380

Coauthor Index

1	Tetsuo Akita	[23]
2	Daisuke Ezaki	[20]
3	Shinsuke Hata	[11]
4	Masahiro Ichimiya	[5] [8] [9] [10] [12] [13] [15] [19] [26]
5	Taisuke Iwakiri	[9] [15]
6	Masaaki Kawakami	[1]
7	Kozo Kinoshita	[5] [13] [17] [18] [21] [25]
8	Takeshi Koyama	[24]
9	Toshimasa Kuchii	[3] [4] [17] [21] [25]
10	Yukiya Miura	[5] [13] [18] [27]
11	Ikuro Morita	[24]
12	Tomomi Nishida	[27]
13	Shigeki Nishikawa	[17] [21] [25]
14	Akio Sakamoto	[2]
15	Masashi Sato	[14]
16	Tetsuo Tada	[24]
17	Masashi Takeda	[7] [8]
18	Teppei Takeda	[13] [18]
19	Takeomi Tamesada	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [14] [15] [16] [18] [19] [20] [22] [23] [24] [26] [27]
20	Isao Tsukimoto	[22]
21	Kazuhiro Yamada	[1]
22	Daisuke Yoneda	[24]
23	Hiroyuki Yotsuyanagi	[6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]