| 2008 |
| 7 | EE | Andreas Hansson,
Maarten Wiggers,
Arno Moonen,
Kees Goossens,
Marco Bekooij:
Applying Dataflow Analysis to Dimension Buffers for Guaranteed Performance in Networks on Chip.
NOCS 2008: 211-212 |
| 2007 |
| 6 | EE | Andreas Hansson,
Martijn Coenen,
Kees Goossens:
Channel trees: reducing latency by sharing time slots in time-multiplexed networks on chip.
CODES+ISSS 2007: 149-154 |
| 5 | EE | Akash Kumar,
Andreas Hansson,
Jos Huisken,
Henk Corporaal:
Interactive presentation: An FPGA design flow for reconfigurable network-based multi-processor systems on chip.
DATE 2007: 117-122 |
| 4 | EE | Andreas Hansson,
Martijn Coenen,
Kees Goossens:
Undisrupted quality-of-service during reconfiguration of multiple applications in networks on chip.
DATE 2007: 954-959 |
| 3 | EE | Andreas Hansson,
Kees Goossens:
Trade-offs in the Configuration of a Network on Chip for Multiple Use-Cases.
NOCS 2007: 233-242 |
| 2006 |
| 2 | EE | Calin Ciordas,
Andreas Hansson,
Kees Goossens,
Twan Basten:
A Monitoring-Aware Network-on-Chip Design Flow.
DSD 2006: 97-106 |
| 2005 |
| 1 | EE | Andreas Hansson,
Kees Goossens,
Andrei Radulescu:
A unified approach to constrained mapping and routing on network-on-chip architectures.
CODES+ISSS 2005: 75-80 |