Themistoklis Haniotakis

Th. Haniotakis

2007
29	EE	Michael N. Skoufis, Haibo Wang, Themistoklis Haniotakis, Spyros Tragoudas: Glitch Control with Dynamic Receiver Threshold Adjustment. ISQED 2007: 410-415
28	EE	Dimitri Kagaris, Themistoklis Haniotakis: Transistor-Level Synthesis for Low-Power Applications. ISQED 2007: 607-612
27	EE	Themistoklis Haniotakis, Y. Tsiatouhas, Dimitris Nikolos, Costas Efstathiou: Testable Designs of Multiple Precharged Domino Circuits. IEEE Trans. VLSI Syst. 15(4): 461-465 (2007)
26	EE	Dimitrios Kagaris, Themistoklis Haniotakis: A Methodology for Transistor-Efficient Supergate Design. IEEE Trans. VLSI Syst. 15(4): 488-492 (2007)
2006
25	EE	Edward Flanigan, Themistoklis Haniotakis, Spyros Tragoudas: An Improved Method for Identifying Linear Dependencies in Path Delay Faults. ISQED 2006: 457-462
24	EE	Dimitri Kagaris, Themistoklis Haniotakis: Transistor-Level Optimization of Supergates. ISQED 2006: 682-690
2005
23	EE	S. Matakias, Y. Tsiatouhas, Themistoklis Haniotakis, Angela Arapoyanni, Aristides Efthymiou: Fast, Parallel Two-Rail Code Checker with Enhanced Testability. IOLTS 2005: 149-156
22	EE	Khadija Stewart, Themistoklis Haniotakis, Spyros Tragoudas: Design and Evaluation of a Security Scheme for Sensor Networks. ISQED 2005: 197-201
21	EE	Themistoklis Haniotakis, Spyros Tragoudas, G. Pani: Reduced Test Application Time Based on Reachability Analysis. ISQED 2005: 232-237
20	EE	A. Rao, Th. Haniotakis, Y. Tsiatouhas, H. Djemil: The Use of Pre-Evaluation Phase in Dynamic CMOS Logic. ISVLSI 2005: 270-271
2004
19	EE	A. Rao, Th. Haniotakis, Y. Tsiatouhas, V. Kaky: A New Dynamic Circuit Design Technique for High Performance TSC Checker Implementations. IOLTS 2004: 52-57
18	EE	S. Matakias, Y. Tsiatouhas, Th. Haniotakis, Angela Arapoyanni: Ultra Fast and Low Cost Parallel Two-Rail Code Checker Targeting High Fan-In Applications . ISVLSI 2004: 293-296
17	EE	Maria K. Michael, Themistoklis Haniotakis, Spyros Tragoudas: A unified framework for generating all propagation functions for logic errors and events. IEEE Trans. on CAD of Integrated Circuits and Systems 23(6): 980-986 (2004)
2003
16	EE	Y. Tsiatouhas, S. Matakias, Angela Arapoyanni, Th. Haniotakis: A Sense Amplifier Based Circuit for Concurrent Detection of Soft and Timing Errors in CMOS ICs. IOLTS 2003: 12-16
15	EE	Y. Tsiatouhas, Th. Haniotakis, Angela Arapoyanni: An Embedded IDDQ Testing Architecture and Technique. ISQED 2003: 442-
2002
14	EE	Y. Tsiatouhas, Angela Arapoyanni, Dimitris Nikolos, Th. Haniotakis: A Hierarchical Architecture for Concurrent Soft Error Detection Based on Current Sensing. IOLTW 2002: 56-60
13	EE	A. Chrisanthopoulos, Y. Tsiatouhas, Angela Arapoyanni, Themistoklis Haniotakis: SRAM oriented memory sense amplifier design in 0.18 /spl mu/m CMOS technology. ISCAS (5) 2002: 145-148
12	EE	Y. Tsiatouhas, Th. Haniotakis, Dimitris Nikolos, Angela Arapoyanni: Extending the Viability of IDDQ Testing in the Deep Submicron Era. ISQED 2002: 100-105
11	EE	Y. Tsiatouhas, Yiannis Moisiadis, Th. Haniotakis, Dimitris Nikolos, Angela Arapoyanni: A new technique for IDDQ testing in nanometer technologies. Integration 31(2): 183-194 (2002)
2001
10	EE	Y. Tsiatouhas, Th. Haniotakis, Dimitris Nikolos, Costas Efstathiou: Concurrent Detection of Soft Errors Based on Current Monitoring. IOLTW 2001: 106-110
2000
9	EE	Y. Tsiatouhas, Th. Haniotakis, Angela Arapoyanni, Dimitris Nikolos: A Versatile Built-In Self-Test Scheme for Delay Fault Testing. DATE 2000: 756
8	EE	Y. Tsiatouhas, Th. Haniotakis, Dimitris Nikolos: A Compact Built-In Current Sensor for IDDQ Testing. IOLTW 2000: 95-99
7	EE	Th. Haniotakis, Y. Tsiatouhas, Dimitris Nikolos, Costas Efstathiou: On Testability of Multiple Precharged Domino Logic. ISQED 2000: 299-304
1999
6	EE	Dimitris Nikolos, Haridimos T. Vergos, Th. Haniotakis, Y. Tsiatouhas: Path Delay Fault Testing of ICs with Embedded Intellectual Property Blocks. DATE 1999: 112-116
5	EE	Y. Tsiatouhas, Th. Haniotakis: A Zero Aliasing Built-In Self Test Technique for Delay Fault Testing. DFT 1999: 95-100
4	EE	Haridimos T. Vergos, Dimitris Nikolos, Y. Tsiatouhas, Th. Haniotakis, Michael Nicolaidis: On Path Delay Fault Testing of Multiplexer - Based Shifters. Great Lakes Symposium on VLSI 1999: 20-23
1998
3	EE	Th. Haniotakis, Dimitris Nikolos, Y. Tsiatouhas: C-Testable One-Dimensional ILAs with Respect to Path Delay Faults: Theory and Applications. DFT 1998: 155-163
1995
2	EE	Ioannis Voyiatzis, Dimitris Nikolos, Antonis M. Paschalis, Constantinos Halatsis, Th. Haniotakis: An efficient comparative concurrent Built-In Self-Test technique. Asian Test Symposium 1995: 309-315
1		Th. Haniotakis, Antonis M. Paschalis, Dimitris Nikolos: Efficient Totally Self-Checking Checkers for a Class of Borden Codes. IEEE Trans. Computers 44(11): 1318-1322 (1995)

Coauthor Index

1	Angela Arapoyanni	[9] [11] [12] [13] [14] [15] [16] [18] [23]
2	A. Chrisanthopoulos	[13]
3	H. Djemil	[20]
4	Costas Efstathiou	[7] [10] [27]
5	Aristides Efthymiou	[23]
6	Edward Flanigan	[25]
7	Constantin Halatsis (Constantine Halatsis, Constantinos Halatsis)	[2]
8	Dimitrios Kagaris (Dimitri Kagaris)	[24] [26] [28]
9	V. Kaky	[19]
10	S. Matakias	[16] [18] [23]
11	Maria K. Michael	[17]
12	Yiannis Moisiadis	[11]
13	Michael Nicolaidis	[4]
14	Dimitris Nikolos	[1] [2] [3] [4] [6] [7] [8] [9] [10] [11] [12] [14] [27]
15	G. Pani	[21]
16	Antonis M. Paschalis	[1] [2]
17	A. Rao	[19] [20]
18	Michael N. Skoufis	[29]
19	Khadija Stewart	[22]
20	Spyros Tragoudas	[17] [21] [22] [25] [29]
21	Y. Tsiatouhas	[3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [18] [19] [20] [23] [27]
22	Haridimos T. Vergos	[4] [6]
23	Ioannis Voyiatzis	[2]
24	Haibo Wang	[29]