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Rajesh K. Gupta Vis

Rajesh Gupta

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*2009
166EEZhong-Yi Jin, Rajesh Gupta: LazySync: A New Synchronization Scheme for Distributed Simulation of Sensor Networks. DCOSS 2009: 103-116
165EEZhong-Yi Jin, Curt Schurgers, Rajesh K. Gupta: A gateway node with duty-cycled radio and processing subsystems for wireless sensor networks. ACM Trans. Design Autom. Electr. Syst. 14(1): (2009)
2008
164 Marcelo Lubaszewski, Michel Renovell, Rajesh K. Gupta: Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, SBCCI 2008, Gramado, Brazil, September 1-4, 2008 ACM 2008
163EESudipta Kundu, Sorin Lerner, Rajesh Gupta: Validating High-Level Synthesis. CAV 2008: 459-472
162EESudipta Kundu, Malay K. Ganai, Rajesh Gupta: Partial order reduction for scalable testing of systemC TLM designs. DAC 2008: 936-941
161EESrinivasan Murali, Almir Mutapcic, David Atienza, Rajesh Gupta, Stephen P. Boyd, Luca Benini, Giovanni De Micheli: Temperature Control of High-Performance Multi-core Platforms Using Convex Optimization. DATE 2008: 110-115
160EEZhong-Yi Jin, Rajesh Gupta: Improved Distributed Simulation of Sensor Networks Based on Sensor Node Sleep Time. DCOSS 2008: 204-218
159EERyo Sugihara, Rajesh K. Gupta: Improving the Data Delivery Latency in Sensor Networks with Controlled Mobility. DCOSS 2008: 386-399
158EERajesh Gupta, Arvind, Gérard Berry, Forrest Brewer: Advances in ESL Design. IEEE Design & Test of Computers 25(6): 520-526 (2008)
157EERyo Sugihara, Rajesh K. Gupta: Programming models for sensor networks: A survey. TOSN 4(2): (2008)
2007
156EESrinivasan Murali, Almir Mutapcic, David Atienza, Rajesh Gupta, Stephen P. Boyd, Giovanni De Micheli: Temperature-aware processor frequency assignment for MPSoCs using convex optimization. CODES+ISSS 2007: 111-116
155EEDohyung Kim, Soonhoi Ha, Rajesh Gupta: CATS: cycle accurate transaction-driven simulation with multiple processor simulators. DATE 2007: 749-754
154EEFrederic Doucet, R. K. Shyamasundar, Ingolf H. Krüger, Saurabh Joshi, Rajesh K. Gupta: Reactivity in SystemC Transaction-Level Models. Haifa Verification Conference 2007: 34-50
153EESudipta Kundu, Sorin Lerner, Rajesh Gupta: Automated refinement checking of concurrent systems. ICCAD 2007: 318-325
152EEYuvraj Agarwal, Ranveer Chandra, Alec Wolman, Paramvir Bahl, Kevin Chin, Rajesh K. Gupta: Wireless wakeups revisited: energy management for voip over wi-fi smartphones. MobiSys 2007: 179-191
151EEZhong-Yi Jin, Curt Schurgers, Rajesh K. Gupta: An Embedded Platform with Duty-Cycled Radio and Processing Subsystems for Wireless Sensor Networks. SAMOS 2007: 421-430
150EESandy Irani, Sandeep K. Shukla, Rajesh Gupta: Algorithms for power savings. ACM Transactions on Algorithms 3(4): (2007)
2006
149EEChalermek Intanagonwiwat, Rajesh K. Gupta, Amin Vahdat: Declarative Resource Naming for Macroprogramming Wireless Networks of Embedded Systems. ALGOSENSORS 2006: 192-199
148EEJeffrey Namkung, Dohyung Kim, Rajesh K. Gupta, Igor Kozintsev, Jean-Yves Bouguet, Carole Dulong: Phase guided sampling for efficient parallel application simulation. CODES+ISSS 2006: 187-192
147EEDohyung Kim, Soonhoi Ha, Rajesh Gupta: Parallel co-simulation using virtual synchronization with redundant host execution. DATE 2006: 1151-1156
146EEFrederic Doucet, Ingolf Krüger, Rajesh K. Gupta, R. K. Shyamasundar: Compositional interaction specifications for SystemC. MEMOCODE 2006: 201
145EETrevor Pering, Yuvraj Agarwal, Rajesh K. Gupta, Roy Want: CoolSpots: reducing the power consumption of wireless mobile devices with multiple radio interfaces. MobiSys 2006: 220-232
144EEFrederic Doucet, Massimiliano Menarini, Ingolf H. Krüger, Rajesh K. Gupta, Jean-Pierre Talpin: A Verification Approach for GALS Integration of Synchronous Components. Electr. Notes Theor. Comput. Sci. 146(2): 105-131 (2006)
143EERavindra Jejurikar, Rajesh Gupta: Optimized Slowdown in Real-Time Task Systems. IEEE Trans. Computers 55(12): 1588-1598 (2006)
142EEArun Kejariwal, Sumit Gupta, Alexandru Nicolau, Nikil D. Dutt, Rajesh K. Gupta: Energy efficient watermarking on mobile devices using proxy-based partitioning. IEEE Trans. VLSI Syst. 14(6): 625-636 (2006)
141EERavindra Jejurikar, Rajesh K. Gupta: Energy-aware task scheduling with task synchronization for embedded real-time systems. IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 1024-1037 (2006)
2005
140EEYuvraj Agarwal, Curt Schurgers, Rajesh Gupta: Dynamic power management using on demand paging for networked embedded systems. ASP-DAC 2005: 755-759
139EECristiano Pereira, Jeremy Lau, Brad Calder, Rajesh K. Gupta: Dynamic phase analysis for cycle-close trace generation. CODES+ISSS 2005: 321-326
138EERavindra Jejurikar, Rajesh K. Gupta: Dynamic slack reclamation with procrastination scheduling in real-time embedded systems. DAC 2005: 111-116
137EERavindra Jejurikar, Rajesh K. Gupta: Energy Aware Non-Preemptive Scheduling for Hard Real-Time Systems. ECRTS 2005: 21-30
136EEArun Kejariwal, Sumit Gupta, Alexandru Nicolau, Nikil Dutt, Rajesh Gupta: Energy Analysis of Multimedia Watermarking on Mobile Handheld Devices. ESTImedia 2005: 33-38
135EEShivajit Mohapatra, Radu Cornea, Hyunok Oh, Kyoungwoo Lee, Minyoung Kim, Nikil D. Dutt, Rajesh Gupta, Alexandru Nicolau, Sandeep K. Shukla, Nalini Venkatasubramanian: A Cross-Layer Approach for Power-Performance Optimization in Distributed Mobile Systems. IPDPS 2005
134EENicolae Savoiu, Sandeep K. Shukla, Rajesh K. Gupta: Improving SystemC simulation through Petri net reductions. MEMOCODE 2005: 131-140
133EELuca Benini, Sandeep K. Shukla, Rajesh K. Gupta: Architectural, System Level and Protocol Level Techniques for Power Optimization for Networked Embedded Systems. VLSI Design 2005: 18-
132 Hiren D. Patel, Sumit Gupta, Sandeep K. Shukla, Rajesh Gupta: An Introductory Survey of Networked Embedded Systems. The Industrial Information Technology Handbook 2005: 0-
131EEGethin Norman, David Parker, Marta Z. Kwiatkowska, Sandeep K. Shukla, Rajesh Gupta: Using probabilistic model checking for dynamic power management. Formal Asp. Comput. 17(2): 160-176 (2005)
130EERajesh K. Gupta: Global competitiveness, outsourcing, and education in the semiconductor industry. IEEE Design & Test of Computers 22(1): 5-6 (2005)
129EERajesh K. Gupta: FPGA-enabled computing architectures. IEEE Design & Test of Computers 22(2): 81 (2005)
128EERajesh K. Gupta: The other face of design for manufacturability. IEEE Design & Test of Computers 22(3): 193 (2005)
127EERajesh K. Gupta: Nanotechnology: Where science of the small meets math of the large. IEEE Design & Test of Computers 22(4): 289, 294 (2005)
126EERajesh K. Gupta: On-chip networks. IEEE Design & Test of Computers 22(5): 393 (2005)
125EERajesh K. Gupta: Going 3D: Silicon and D&T. IEEE Design & Test of Computers 22(6): 493-494 (2005)
124EEPaolo D'Alberto, Alexandru Nicolau, Alexander V. Veidenbaum, Rajesh K. Gupta: Line Size Adaptivity Analysis of Parameterized Loop Nests for Direct Mapped Data Cache. IEEE Trans. Computers 54(2): 185-197 (2005)
123EESandy Irani, Gaurav Singh, Sandeep K. Shukla, Rajesh K. Gupta: An overview of the competitive and adversarial approaches to designing dynamic power management strategies. IEEE Trans. VLSI Syst. 13(12): 1349-1361 (2005)
122EEVijay Raghunathan, Cristiano Pereira, Mani B. Srivastava, Rajesh K. Gupta: Energy-aware wireless systems with adaptive power-fidelity tradeoffs. IEEE Trans. VLSI Syst. 13(2): 211-225 (2005)
121EEJean-Pierre Talpin, Paul Le Guernic, Sandeep K. Shukla, Rajesh Gupta: A Compositional Behavioral Modeling Framework for Embedded System Design and Conformance Checking. International Journal of Parallel Programming 33(6): 613-643 (2005)
2004
120EEJean-Pierre Talpin, David Berner, Sandeep K. Shukla, Paul Le Guernic, Abdoulaye Gamatié, Rajesh Gupta: A Behavioral Type Inference System for Compositional System-on-Chip Design. ACSD 2004: 47-56
119EERajesh Gupta, R. K. Shyamasundar: Reactive Framework for Resource Aware Distributed Computing. ASIAN 2004: 452-467
118EERavindra Jejurikar, Cristiano Pereira, Rajesh K. Gupta: Leakage aware dynamic voltage scaling for real-time embedded systems. DAC 2004: 275-280
117EEArun Kejariwal, Sumit Gupta, Alexandru Nicolau, Nikil Dutt, Rajesh Gupta: Proxy-based task partitioning of watermarking algorithms for reducing energy consumption in mobile devices. DAC 2004: 556-561
116EEHans Van Antwerpen, Nikil D. Dutt, Rajesh K. Gupta, Shivajit Mohapatra, Cristiano Pereira, Nalini Venkatasubramanian, Ralph von Vignau: Energy-Aware System Design for Wireless Multimedia. DATE 2004: 1124-1131
115EESumit Gupta, Nikil Dutt, Rajesh Gupta, Alexandru Nicolau: Loop Shifting and Compaction for the High-Level Synthesis of Designs with Complex Control Flow. DATE 2004: 114-121
114EENikhil Bansal, Sumit Gupta, Nikil Dutt, Alexandru Nicolau, Rajesh Gupta: Network Topology Exploration of Mesh-Based Coarse-Grain Reconfigurable Architectures. DATE 2004: 474-479
113EERavindra Jejurikar, Rajesh K. Gupta: Optimized Slowdown in Real-Time Task Systems. ECRTS 2004: 155-164
112EENikhil Bansal, Sumit Gupta, Nikil D. Dutt, Alexandru Nicolau, Rajesh K. Gupta: Interconnect-Aware Mapping of Applications to Coarse-Grain Reconfigurable Architectures. FPL 2004: 891-899
111EERavindra Jejurikar, Rajesh K. Gupta: Dynamic voltage scaling for systemwide energy minimization in real-time embedded systems. ISLPED 2004: 78-81
110EERavindra Jejurikar, Rajesh K. Gupta: Procrastination scheduling in fixed priority real-time systems. LCTES 2004: 57-66
109EESumit Gupta, Rajesh K. Gupta, Nikil D. Dutt, Alexandru Nicolau: Coordinated parallelizing compiler optimizations and high-level synthesis. ACM Trans. Design Autom. Electr. Syst. 9(4): 441-470 (2004)
108EERajesh Gupta: Guest editorial: Special issue on networked embedded systems. ACM Trans. Embedded Comput. Syst. 3(1): 1-2 (2004)
107EEJean-Pierre Talpin, Paul Le Guernic, Sandeep K. Shukla, Frederic Doucet, Rajesh K. Gupta: Formal Refinement Checking in a System-level Design Methodology. Fundam. Inform. 62(2): 243-273 (2004)
106EERajesh Gupta: From the Editor in Chief: Predictability in Design and Manufacturing. IEEE Design & Test of Computers 21(1): 1- (2004)
105EERajesh Gupta: From the EIC: Past successes, future challenges. IEEE Design & Test of Computers 21(2): 77-78 (2004)
104EERajesh Gupta: From the EIC: The next EDA challenge - Design for manufacturability. IEEE Design & Test of Computers 21(3): 169- (2004)
103EERajesh Gupta: Silicon for embedded multimedia processing. IEEE Design & Test of Computers 21(5): 345- (2004)
102EERajesh K. Gupta: Verification synergies. IEEE Design & Test of Computers 21(6): 457 (2004)
101EESumit Gupta, Nicolae Savoiu, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau: Using global code motions to improve the quality of results for high-level synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 23(2): 302-312 (2004)
2003
100 Rajesh Gupta, Yukihiro Nakamura, Alex Orailoglu, Pai H. Chou: Proceedings of the 1st IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2003, Newport Beach, CA, USA, October 1-3, 2003 ACM 2003
99EEJean-Pierre Talpin, Paul Le Guernic, Sandeep K. Shukla, Rajesh K. Gupta, Frederic Doucet: Polychrony for Formal Refinement-Checking in a System-Level Design Methodology. ACSD 2003: 9-19
98EERajesh K. Gupta, Shishpal Rawat, Sandeep K. Shukla, Brian Bailey, Daniel K. Beece, Masahiro Fujita, Carl Pixley, John O'Leary, Fabio Somenzi: Formal verification - prove it or pitch it. DAC 2003: 710-711
97EEVijay Raghunathan, Mani B. Srivastava, Rajesh K. Gupta: A survey of techniques for energy efficient on-chip communication. DAC 2003: 900-905
96EESumit Gupta, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau: Dynamic Conditional Branch Balancing during the High-Level Synthesis of Control-Intensive Designs. DATE 2003: 10270-10275
95EEFrederic Doucet, Sandeep K. Shukla, Rajesh K. Gupta: Introspection in System-Level Language Frameworks: Meta-Level vs. Integrated. DATE 2003: 10382-10387
94EEJean-Pierre Talpin, Paul Le Guernic, Sandeep K. Shukla, Rajesh K. Gupta, Frederic Doucet: Polychrony for Refinement-Based Design. DATE 2003: 11172-11173
93EERajesh K. Gupta, Sandy Irani, Sandeep K. Shukla: Formal Methods for Dynamic Power Management. ICCAD 2003: 874-882
92EEManev Luthra, Sumit Gupta, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau: Interface Synthesis using Memory Mapping for an FPGA Platform. ICCD 2003: 140-145
91EERadu Cornea, Nikil D. Dutt, Rajesh K. Gupta, Ingolf Krüger, Alexandru Nicolau, Douglas C. Schmidt, Sandeep K. Shukla: FORGE: A Framework for Optimization of Distributed Embedded Systems Software. IPDPS 2003: 208
90EERajesh K. Gupta, Sandeep K. Shukla: Should the space of implementation possibilities be determined by the abilities of high-level synthesis and validation? MEMOCODE 2003: 277-
89EESandy Irani, Sandeep K. Shukla, Rajesh K. Gupta: Algorithms for power savings. SODA 2003: 37-46
88EESumit Gupta, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau: SPARK: A High-Lev l Synthesis Framework For Applying Parallelizing Compiler Transformations. VLSI Design 2003: 461-466
87EESandeep K. Shukla, Jean-Pierre Talpin, Stephen A. Edwards, Rajesh K. Gupta: High Level Modeling and Validation Methodologies for Embedded Systems: Bridging the Productivity Gap. VLSI Design 2003: 9-14
86EESandy Irani, Sandeep K. Shukla, Rajesh K. Gupta: Online strategies for dynamic power management in systems with multiple power-saving states. ACM Trans. Embedded Comput. Syst. 2(3): 325-346 (2003)
85EERajesh K. Gupta: Driving Research in System-Chip Design Technology. IEEE Computer 36(7): 95-97 (2003)
84 Rajesh Gupta: From the Editor in Chief: Twenty years! IEEE Design & Test of Computers 20(1): 1- (2003)
83 Rajesh Gupta: From the Editor in Chief: Full Circle? IEEE Design & Test of Computers 20(2): 1- (2003)
82 Rajesh Gupta: From the Editor in Chief: A "Powerful" Issue! IEEE Design & Test of Computers 20(3): 1- (2003)
81EERajesh Gupta: From the Editor in Chief: Addressing Problems of the Large. IEEE Design & Test of Computers 20(4): 3- (2003)
80EERajesh Gupta: At-Speed Testing: A Shared Red Brick between Design and Test. IEEE Design & Test of Computers 20(5): 1- (2003)
79EERajesh Gupta: From the EIC: The changing face of IC design and its industry. IEEE Design & Test of Computers 20(6): 1- (2003)
78EEFrederic Doucet, Sandeep K. Shukla, Masato Otsuka, Rajesh K. Gupta: BALBOA: a component-based design environment for system models. IEEE Trans. on CAD of Integrated Circuits and Systems 22(12): 1597-1612 (2003)
2002
77 Jörg Henkel, Xiaobo Sharon Hu, Rajesh Gupta, Sri Parameswaran: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002, Estes Park, Colorado, USA, May 6-8, 2002 ACM 2002
76EERavindra Jejurikar, Rajesh K. Gupta: Energy aware task scheduling with task synchronization for embedded real time systems. CASES 2002: 164-169
75EESumit Gupta, Nick Savoiu, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau, Timothy Kam, Michael Kishinevsky, Shai Rotem: Coordinated transformations for high-level synthesis of high performance microprocessor blocks. DAC 2002: 898-903
74EESandy Irani, Rajesh K. Gupta, Sandeep K. Shukla: Competitive Analysis of Dynamic Power Management Strategies for Systems with Multiple Power Savings States. DATE 2002: 117-123
73EEAna Azevedo, Ilya Issenin, Radu Cornea, Rajesh Gupta, Nikil D. Dutt, Alexander V. Veidenbaum, Alexandru Nicolau: Profile-Based Dynamic Voltage Scheduling Using Program Checkpoints. DATE 2002: 168-175
72EEWeiyu Tang, Rajesh K. Gupta, Alexandru Nicolau: Power Savings in Embedded Processors through Decode Filer Cache. DATE 2002: 443-448
71EEFrederic Doucet, Sandeep K. Shukla, Rajesh K. Gupta, Masato Otsuka: An Environment for Dynamic Component Composition for Efficient Co-Design . DATE 2002: 736-743
70EENick Savoiu, Sandeep K. Shukla, Rajesh K. Gupta: Automated Concurrency Re-Assignment in High Level System Models for Efficient System-Level Simulation. DATE 2002: 875-883
69EESandeep K. Shukla, Frederic Doucet, Rajesh K. Gupta: Structured Component Composition Frameworks for Embedded System Design. HiPC 2002: 663-678
68EEWeiyu Tang, Alexander V. Veidenbaum, Alexandru Nicolau, Rajesh K. Gupta: Integrated I-cache Way Predictor and Branch Target Buffer to Reduce Energy Consumption. ISHPC 2002: 120-132
67EERajesh K. Gupta, Sandeep K. Shukla, Nick Savoiu: Efficient Simulation of Synthesis-Oriented System Level Designs. ISSS 2002: 168-173
66EEAlexandru Nicolau, Nikil D. Dutt, Rajesh Gupta, Nick Savoiu, Mehrdad Reshadi, Sumit Gupta: Dynamic Common Sub-Expression Elimination during Scheduling in High-Level Synthesis. ISSS 2002: 261-266
65 Nick Savoiu, Sandeep K. Shukla, Rajesh K. Gupta: Concurrency in System Level Design: Conflict Between Simulation and Synthesis Goals. IWLS 2002: 407-411
64EELuciano Lavagno, Sujit Dey, Rajesh K. Gupta: Specification, Modeling and Design Tools for System-on-Chip (Tutorial Abstract). VLSI Design 2002: 21-23
63EERajesh Gupta: Sustaining an Industry Obsession. IEEE Design & Test of Computers 19(5): 1- (2002)
62 Rajesh Gupta: EIC Message: The Neglected Community. IEEE Design & Test of Computers 19(6): 3- (2002)
61EEAmit Chowdhary, Rajesh K. Gupta: A Methodology for Synthesis of Data Path Circuitse. IEEE Design & Test of Computers 19(6): 90-100 (2002)
60EEDinesh Ramanathan, Sandy Irani, Rajesh K. Gupta: An analysis of system level power management algorithms and theireffects on latency. IEEE Trans. on CAD of Integrated Circuits and Systems 21(3): 291-305 (2002)
59EEKi-Seok Chung, Rajesh K. Gupta, Taewhan Kim, C. L. Liu: Synthesis and Optimization of Combinational Interface Circuits. VLSI Signal Processing 31(3): 243-261 (2002)
2001
58EESumit Gupta, Nick Savoiu, Sunwoo Kim, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau: Speculation Techniques for High Level Synthesis of Control Intensive Designs. DAC 2001: 269-272
57EERajesh K. Gupta, Shishpal Rawat, Ingrid Verbauwhede, Gérard Berry, Ramesh Chandra, Daniel Gajski, Kris Konigsfeld, Patrick Schaumont: Panel: The Next HDL: If C++ is the Answer, What was the Question? DAC 2001: 71-72
56 Weiyu Tang, Rajesh K. Gupta, Alexandru Nicolau: Design of a Predictive Filter Cache for Energy Savings in High Performance Processor Architectures. ICCD 2001: 68-75
55 Sumit Gupta, Nick Savoiu, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau: Conditional speculation and its effects on performance and area for high-level snthesis. ISSS 2001: 171-176
54 Frederic Doucet, Rajesh K. Gupta, Masato Otsuka, Patrick Schaumont, Sandeep K. Shukla: Interoperability as a design issue in C++ based modeling environments. ISSS 2001: 87-92
53 Wolfgang Rosenstiel, Brian Bailey, Masahiro Fujita, Guang R. Gao, Rajesh K. Gupta, Preeti Ranjan Panda: New design paradigms. ISSS 2001: 94
2000
52EEDinesh Ramanathan, Ravindra Jejurikar, Rajesh K. Gupta: Timing driven co-design of networked embedded systems. ASP-DAC 2000: 117-122
51EEPrashant Arora, Rajesh K. Gupta: Design and implementation of a hierarchical exception handling extension to systemC. CASES 2000: 80-84
50EEDinesh Ramanathan, Rajesh K. Gupta: System Level Online Power Management Algorithms. DATE 2000: 606-605
49EESumit Gupta, Rajesh K. Gupta, Miguel Miranda, Francky Catthoor: Analysis of High-Level Address Code Transformations for Programmable Processors. DATE 2000: 9-13
48 Dinesh Ramanathan, Sandy Irani, Rajesh K. Gupta: Latency Effects of System Level Power Management Algorithms. ICCAD 2000: 350-356
47EEDinesh Ramanathan, Rajesh K. Gupta, Raymond Roth: Interfacing Hardware and Software Using C++ Class Libraries. ICCD 2000: 445-
46EEXiaomei Ji, Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau, Rajesh K. Gupta: Compiler-Directed Cache Assist Adaptivity. ISHPC 2000: 88-104
45EEVivek Sinha, Frederic Doucet, Chuck Siska, Rajesh K. Gupta, Stan Y. Liao, Abhijit Ghosh: YAML: A Tool for Hardware Design Visualization and Capture. ISSS 2000: 9-17
44EEDan Nicolaescu, Xiaomei Ji, Alexander V. Veidenbaum, Alexandru Nicolau, Rajesh K. Gupta: Compiler-Directed Cache Line Size Adaptivity. Intelligent Memory Systems 2000: 183-187
1999
43EEDinesh Ramanathan, Ali Dasdan, Rajesh K. Gupta: Timing-driven HW/SW codesign based on task structuring and process timing simulation. CODES 1999: 203-207
42EEAli Dasdan, Sandy Irani, Rajesh K. Gupta: Efficient Algorithms for Optimum Cycle Mean and Optimum Cost to Time Ratio Problems. DAC 1999: 37-42
41EEAlexander V. Veidenbaum, Weiyu Tang, Rajesh K. Gupta, Alexandru Nicolau, Xiaomei Ji: Adapting cache line size to application behavior. International Conference on Supercomputing 1999: 145-154
40EEAmit Chowdhary, Sudhakar Kale, Phani K. Saripella, Naresh Sehgal, Rajesh K. Gupta: Extraction of functional regularity in datapath circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 18(9): 1279-1296 (1999)
1998
39EEJian Li, Rajesh K. Gupta: HDL code restructuring using timed decision tables. CODES 1998: 131-135
38EEAli Dasdan, Dinesh Ramanathan, Rajesh K. Gupta: Rate Derivation and Its Applications to Reactive, Real-Time Embedded Systems. DAC 1998: 263-268
37EEJian Li, Rajesh K. Gupta: An Algorithm To Determine Mutually Exclusive Operations In Behavioral Descriptions. DATE 1998: 457-
36EEAmit Chowdhary, Sudhakar Kale, Phani K. Saripella, Naresh Sehgal, Rajesh K. Gupta: A general approach for regularity extraction in datapath circuits. ICCAD 1998: 332-339
35EEZhang Yang, Rajesh K. Gupta: A Case Analysis of System Partitioning and Its Relationship To High-Level Synthesis Tasks. VLSI Design 1998: 442-448
34EEAnmol Mathur, Ali Dasdan, Rajesh K. Gupta: Rate analysis for embedded systems. ACM Trans. Design Autom. Electr. Syst. 3(3): 408-436 (1998)
33EEAli Dasdan, Dinesh Ramanathan, Rajesh K. Gupta: A timing-driven design and validation methodology for embedded real-time systems. ACM Trans. Design Autom. Electr. Syst. 3(4): 533-553 (1998)
32EEAli Dasdan, Rajesh K. Gupta: Faster maximum and minimum mean cycle algorithms for system-performance analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 17(10): 889-899 (1998)
1997
31EEJian Li, Rajesh K. Gupta: Limited Exception Modeling and Its Use in Presynthesis Optimizations. DAC 1997: 341-346
30EEStan Y. Liao, Steven W. K. Tjiang, Rajesh K. Gupta: An Efficient Implementation of Reactivity for Modeling Hardware in the Scenic Design Environment. DAC 1997: 70-75
29EESamir Agrawal, Rajesh K. Gupta: Data-Flow Assisted Behavioral Partitioning for Embedded Systems. DAC 1997: 709-712
28EEAli Dasdan, Anmol Mathur, Rajesh K. Gupta: RATAN: A tool for rate analysis and rate constraint debugging for embedded systems. ED&TC 1997: 2-6
27EEJian Li, Rajesh K. Gupta: Decomposition of timed decision tables and its use in presynthesis optimizations. ICCAD 1997: 22-27
26EERajesh K. Gupta, Mani B. Srivastava: Design technology for building wireless systems (tutorial). ICCAD 1997
25 Xingbin Zhang, Ali Dasdan, Martin Schulz, Rajesh K. Gupta, Andrew A. Chien: Architectural Adaptation for Application-Specific Locality Optimization. ICCD 1997: 150-156
24EERajesh K. Gupta, Stan Y. Liao: Using a Programming Language for Digital System Design. IEEE Design & Test of Computers 14(2): 72-80 (1997)
23 Yervant Zorian, Rajesh K. Gupta: Design and Test of Core-Based Systems on Chips. IEEE Design & Test of Computers 14(4): 14- (1997)
22EERajesh K. Gupta, Yervant Zorian: Introducing Core-Based System Design. IEEE Design & Test of Computers 14(4): 15-25 (1997)
21EERajesh K. Gupta, Giovanni De Micheli: Specification and analysis of timing constraints for embedded systems. IEEE Trans. on CAD of Integrated Circuits and Systems 16(3): 240-256 (1997)
20EERajesh K. Gupta, Giovanni De Micheli: Constrained software synthesis for embedded applications. Journal of Systems Architecture 43(8): 557-586 (1997)
19EEVenkatram Krishnaswamy, Rajesh Gupta, Prithviraj Banerjee: Implications of VHDL timing models on simulation and software synthesis. Journal of Systems Architecture 44(1): 23-36 (1997)
1996
18EEJian Li, Rajesh K. Gupta: HDL Optimization Using Timed Decision Tables. DAC 1996: 51-54
17EERajesh K. Gupta: Analysis of Operation Delay and Execution Rate Constraints for Embedded Systems. DAC 1996: 601-604
16EEKi-Seok Chung, Rajesh K. Gupta, C. L. Liu: An algorithm for synthesis of system-level interface circuits. ICCAD 1996: 442-447
15EERajesh K. Gupta, Daniel Gajski, Randy Allen, Yatin Trivedi: Opportunities and pitfalls in HDL-based system design. ICCD 1996: 56-
14EERajesh Gupta: Hardware Software Co-Design of Embedded Systems. VLSI Design 1996: 3
13EEJohn Y. Sayah, Rajesh Gupta, Deepak D. Sherlekar, Philip S. Honsinger, Jitendra M. Apte, S. Wayne Bollinger, Hai Hsia Chen, Sumit DasGupta, Edward P. Hsieh, Andrew D. Huber, Edward J. Hughes, Zahi M. Kurzum, Vasant B. Rao, Thepthai Tabtieng, Vigen Valijan, David Y. Yang: Design planning for high-performance ASICs. IBM Journal of Research and Development 40(4): 431-452 (1996)
1995
12EEVinod Narayananan, David LaPotin, Rajesh K. Gupta, Gopalakrishnan Vijayan: PEPPER - a timing driven early floorplanner. ICCD 1995: 230-235
11EERajesh Gupta, Melvin A. Breuer: Partial scan design of register-transfer level circuits. J. Electronic Testing 7(1-2): 25-46 (1995)
1994
10EERajesh K. Gupta, Giovanni De Micheli: Constrained software generation for hardware-software systems. CODES 1994: 56-63
9 Rajesh K. Gupta, Claudionor José Nunes Coelho Jr., Giovanni De Micheli: Program Implementation Schemes for Hardware-Software Systems. IEEE Computer 27(1): 48-55 (1994)
1993
8EERajesh K. Gupta, Giovanni De Micheli: Hardware-Software Cosynthesis for Digital Systems. IEEE Design & Test of Computers 10(3): 29-41 (1993)
7 Sridhar Narayanan, Rajesh Gupta, Melvin A. Breuer: Optimal Configuring of Multiple Scan Chains. IEEE Trans. Computers 42(9): 1121-1131 (1993)
1992
6EERajesh K. Gupta, Claudionor José Nunes Coelho Jr., Giovanni De Micheli: Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components. DAC 1992: 225-230
5EESridhar Narayanan, Rajesh Gupta, Melvin A. Breuer: Configuring multiple scan chains for minimum test time. ICCAD 1992: 4-8
1991
4 Rajesh Gupta, Melvin A. Breuer: Ordering Storage Elements in a Single Scan Chain. ICCAD 1991: 408-411
1990
3 Rajesh K. Gupta, Giovanni De Micheli: Partitioning of Functional Models of Synchronous Digital Systems. ICCAD 1990: 216-219
2 Rajesh Gupta, Rajiv Gupta, Melvin A. Breuer: The BALLAST Methodology for Structured Partial Scan Design. IEEE Trans. Computers 39(4): 538-544 (1990)
1989
1 Rajiv Gupta, Wesley H. Cheng, Rajesh Gupta, Ido Hardonag, Melvin A. Breuer: An Object-Oriented VLSI CAD Framework: A Case Study in Rapid Prototyping. IEEE Computer 22(5): 28-37 (1989)

Coauthor Index

1Yuvraj Agarwal [140] [145] [152]
2Samir Agrawal [29]
3Randy Allen [15]
4Hans Van Antwerpen [116]
5Jitendra M. Apte [13]
6Prashant Arora [51]
7 Arvind [158]
8David Atienza [156] [161]
9Ana Azevedo [73]
10Paramvir Bahl (Victor Bahl) [152]
11Brian Bailey [53] [98]
12Prithviraj Banerjee (Prith Banerjee) [19]
13Nikhil Bansal [112] [114]
14Daniel K. Beece [98]
15Luca Benini [133] [161]
16David Berner [120]
17Gérard Berry [57] [158]
18S. Wayne Bollinger [13]
19Jean-Yves Bouguet [148]
20Stephen P. Boyd [156] [161]
21Melvin A. Breuer [1] [2] [4] [5] [7] [11]
22Forrest Brewer [158]
23Brad Calder [139]
24Francky Catthoor [49]
25Ramesh Chandra [57]
26Ranveer Chandra [152]
27Hai Hsia Chen [13]
28Wesley H. Cheng [1]
29Andrew A. Chien [25]
30Kevin Chin [152]
31Pai H. Chou [100]
32Amit Chowdhary [36] [40] [61]
33Ki-Seok Chung [16] [59]
34Claudionor José Nunes Coelho Jr. [6] [9]
35Radu Cornea [73] [91] [135]
36Paolo D'Alberto [124]
37Sumit DasGupta [13]
38Ali Dasdan [25] [28] [32] [33] [34] [38] [42] [43]
39Sujit Dey [64]
40Frederic Doucet [45] [54] [69] [71] [78] [94] [95] [99] [107] [144] [146] [154]
41Carole Dulong [148]
42Nikil D. Dutt (Nikil Dutt) [55] [58] [66] [73] [75] [88] [91] [92] [96] [101] [109] [112] [114] [115] [116] [117] [135] [136] [142]
43Stephen A. Edwards [87]
44Masahiro Fujita [53] [98]
45Daniel Gajski (Daniel D. Gajski) [15] [57]
46Abdoulaye Gamatié [120]
47Malay K. Ganai [162]
48Guang R. Gao [53]
49Abhijit Ghosh [45]
50Paul Le Guernic [94] [99] [107] [120] [121]
51Rajiv Gupta [1] [2]
52Sumit Gupta [49] [55] [58] [66] [75] [88] [92] [96] [101] [109] [112] [114] [115] [117] [132] [136] [142]
53Soonhoi Ha [147] [155]
54Ido Hardonag [1]
55Jörg Henkel [77]
56Philip S. Honsinger [13]
57Edward P. Hsieh [13]
58Xiaobo Sharon Hu (Xiaobo Hu) [77]
59Andrew D. Huber [13]
60Edward J. Hughes [13]
61Chalermek Intanagonwiwat [149]
62Sandy Irani [42] [48] [60] [74] [86] [89] [93] [123] [150]
63Ilya Issenin [73]
64Ravindra Jejurikar [52] [76] [110] [111] [113] [118] [137] [138] [141] [143]
65Xiaomei Ji [41] [44] [46]
66Zhong-Yi Jin [151] [160] [165] [166]
67Saurabh Joshi [154]
68Sudhakar Kale [36] [40]
69Timothy Kam [75]
70Arun Kejariwal [117] [136] [142]
71Dohyung Kim [147] [148] [155]
72Minyoung Kim [135]
73Sunwoo Kim [58]
74Taewhan Kim [59]
75Michael Kishinevsky [75]
76Kris Konigsfeld [57]
77Igor Kozintsev [148]
78Venkatram Krishnaswamy [19]
79Ingolf Krüger (Ingolf H. Krüger) [91] [144] [146] [154]
80Sudipta Kundu [153] [162] [163]
81Zahi M. Kurzum [13]
82Marta Z. Kwiatkowska [131]
83David LaPotin [12]
84Jeremy Lau [139]
85Luciano Lavagno [64]
86Kyoungwoo Lee [135]
87Sorin Lerner [153] [163]
88Jian Li [18] [27] [31] [37] [39]
89Stan Y. Liao [24] [30] [45]
90C. L. Liu (Chung Laung (Dave) Liu) [16] [59]
91Marcelo Lubaszewski [164]
92Manev Luthra [92]
93Anmol Mathur [28] [34]
94Massimiliano Menarini [144]
95Giovanni De Micheli [3] [6] [8] [9] [10] [20] [21] [156] [161]
96Miguel Miranda [49]
97Shivajit Mohapatra [116] [135]
98Srinivasan Murali [156] [161]
99Almir Mutapcic [156] [161]
100Yukihiro Nakamura [100]
101Jeffrey Namkung [148]
102Sridhar Narayanan [5] [7]
103Vinod Narayananan [12]
104Dan Nicolaescu [44] [46]
105Alexandru Nicolau (Alex Nicolau) [41] [44] [46] [55] [56] [58] [66] [68] [72] [73] [75] [88] [91] [92] [96] [101] [109] [112] [114] [115] [117] [124] [135] [136] [142]
106Gethin Norman [131]
107John O'Leary [98]
108Hyunok Oh [135]
109Alex Orailoglu [100]
110Masato Otsuka [54] [71] [78]
111Preeti Ranjan Panda [53]
112Sri Parameswaran [77]
113David Parker [131]
114Hiren D. Patel [132]
115Cristiano Pereira [116] [118] [122] [139]
116Trevor Pering [145]
117Carl Pixley [98]
118Vijay Raghunathan [97] [122]
119Dinesh Ramanathan [33] [38] [43] [47] [48] [50] [52] [60]
120Vasant B. Rao [13]
121Shishpal Rawat [57] [98]
122Michel Renovell [164]
123Mehrdad Reshadi [66]
124Wolfgang Rosenstiel [53]
125Shai Rotem [75]
126Raymond Roth [47]
127Phani K. Saripella [36] [40]
128Nicolae Savoiu (Nick Savoiu) [55] [58] [65] [66] [67] [70] [75] [101] [134]
129John Y. Sayah [13]
130Patrick Schaumont [54] [57]
131Douglas C. Schmidt [91]
132Martin Schulz [25]
133Curt Schurgers [140] [151] [165]
134Naresh Sehgal [36] [40]
135Deepak D. Sherlekar [13]
136Sandeep K. Shukla [54] [65] [67] [69] [70] [71] [74] [78] [86] [87] [89] [90] [91] [93] [94] [95] [98] [99] [107] [120] [121] [123] [131] [132] [133] [134] [135] [150]
137R. K. Shyamasundar [119] [146] [154]
138Gaurav Singh [123]
139Vivek Sinha [45]
140Chuck Siska [45]
141Fabio Somenzi [98]
142Mani B. Srivastava [26] [97] [122]
143Ryo Sugihara [157] [159]
144Thepthai Tabtieng [13]
145Jean-Pierre Talpin [87] [94] [99] [107] [120] [121] [144]
146Weiyu Tang [41] [56] [68] [72]
147Steven W. K. Tjiang [30]
148Yatin Trivedi [15]
149Amin Vahdat [149]
150Vigen Valijan [13]
151Alexander V. Veidenbaum [41] [44] [46] [68] [73] [124]
152Nalini Venkatasubramanian [116] [135]
153Ingrid Verbauwhede [57]
154Ralph von Vignau [116]
155Gopalakrishnan Vijayan [12]
156Roy Want [145]
157Alec Wolman [152]
158David Y. Yang [13]
159Zhang Yang [35]
160Xingbin Zhang [25]
161Yervant Zorian [22] [23]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)