Aarti Gupta

2008
65	EE	Sriram Sankaranarayanan, Franjo Ivancic, Aarti Gupta: Mining library specifications using inductive logic programming. ICSE 2008: 131-140
64	EE	Chao Wang, Zijiang Yang, Vineet Kahlon, Aarti Gupta: Peephole Partial Order Reduction. TACAS 2008: 382-396
2007
63	EE	Malay K. Ganai, Aarti Gupta: Efficient BMC for Multi-Clock Systems with Clocked Specifications. ASP-DAC 2007: 310-315
62	EE	Vineet Kahlon, Yu Yang, Sriram Sankaranarayanan, Aarti Gupta: Fast and Accurate Static Data-Race Detection for Concurrent Programs. CAV 2007: 226-239
61	EE	Chao Wang, Zijiang Yang, Aarti Gupta, Franjo Ivancic: Using Counterexamples for Improving the Precision of Reachability Computation with Polyhedra. CAV 2007: 352-365
60	EE	Chao Wang, Aarti Gupta, Franjo Ivancic: Induction in CEGAR for Detecting Counterexamples. FMCAD 2007: 77-84
59	EE	Aarti Gupta: From Hardware Verification to Software Verification: Re-use and Re-learn. Haifa Verification Conference 2007: 14-15
58	EE	Chao Wang, Hyondeuk Kim, Aarti Gupta: Hybrid CEGAR: combining variable hiding and predicate abstraction. ICCAD 2007: 310-317
57	EE	Aarti Gupta, Tim Oates: Using Ontologies and the Web to Learn Lexical Semantics. IJCAI 2007: 1618-1623
56	EE	Vineet Kahlon, Aarti Gupta: On the analysis of interacting pushdown systems. POPL 2007: 303-314
55	EE	Sriram Sankaranarayanan, Franjo Ivancic, Aarti Gupta: Program Analysis Using Symbolic Ranges. SAS 2007: 366-383
54	EE	Malay K. Ganai, Akira Mukaiyama, Aarti Gupta, Kazutoshi Wakabayashi: Synthesizing "Verification Aware" Models: Why and How? VLSI Design 2007: 50-56
53	EE	Chao Wang, Zijiang Yang, Franjo Ivancic, Aarti Gupta: Disjunctive image computation for software verification. ACM Trans. Design Autom. Electr. Syst. 12(2): (2007)
52	EE	Malay K. Ganai, Aarti Gupta, Pranav Ashar: Verification of Embedded Memory Systems using Efficient Memory Modeling CoRR abs/0710.4666: (2007)
2006
51	EE	Chao Wang, Zijiang Yang, Franjo Ivancic, Aarti Gupta: Whodunit? Causal Analysis for Counterexamples. ATVA 2006: 82-95
50	EE	Himanshu Jain, Franjo Ivancic, Aarti Gupta, Ilya Shlyakhter, Chao Wang: Using Statically Computed Invariants Inside the Predicate Abstraction and Refinement Loop. CAV 2006: 137-151
49	EE	Vineet Kahlon, Aarti Gupta, Nishant Sinha: Symbolic Model Checking of Concurrent Programs Using Partial Orders and On-the-Fly Transactions. CAV 2006: 286-299
48	EE	Chao Wang, Aarti Gupta, Malay K. Ganai: Predicate learning and selective theory deduction for a difference logic solver. DAC 2006: 235-240
47	EE	Chao Wang, Zijiang Yang, Franjo Ivancic, Aarti Gupta: Disjunctive image computation for embedded software verification. DATE 2006: 1205-1210
46	EE	Malay K. Ganai, Aarti Gupta: Accelerating high-level bounded model checking. ICCAD 2006: 794-801
45	EE	Vineet Kahlon, Aarti Gupta: An Automata-Theoretic Approach for Model Checking Threads for LTL Propert. LICS 2006: 101-110
44	EE	Zijiang Yang, Chao Wang, Aarti Gupta, Franjo Ivancic: Mixed symbolic representations for model checking software programs. MEMOCODE 2006: 17-26
43	EE	Sriram Sankaranarayanan, Franjo Ivancic, Ilya Shlyakhter, Aarti Gupta: Static Analysis in Disjunctive Numerical Domains. SAS 2006: 3-17
42	EE	Aarti Gupta, Malay K. Ganai, Chao Wang: SAT-Based Verification Methods and Applications in Hardware Verification. SFM 2006: 108-143
41	EE	Malay K. Ganai, Muralidhar Talupur, Aarti Gupta: SDSAT: Tight Integration of Small Domain Encoding and Lazy Approaches in a Separation Logic Solver. TACAS 2006: 135-150
40	EE	Malay K. Ganai, Aarti Gupta, Zijiang Yang, Pranav Ashar: Efficient distributed SAT and SAT-based distributed Bounded Model Checking. STTT 8(4-5): 387-396 (2006)
2005
39	EE	Daijue Tang, Sharad Malik, Aarti Gupta, C. Norris Ip: Symmetry Reduction in SAT-Based Model Checking. CAV 2005: 125-138
38	EE	Franjo Ivancic, Zijiang Yang, Malay K. Ganai, Aarti Gupta, Ilya Shlyakhter, Pranav Ashar: F-Soft: Software Verification Platform. CAV 2005: 301-306
37	EE	Vineet Kahlon, Franjo Ivancic, Aarti Gupta: Reasoning About Threads Communicating via Locks. CAV 2005: 505-518
36	EE	Malay K. Ganai, Aarti Gupta, Pranav Ashar: Beyond safety: customized SAT-based model checking. DAC 2005: 738-743
35	EE	Malay K. Ganai, Aarti Gupta, Pranav Ashar: Verification of Embedded Memory Systems using Efficient Memory Modeling. DATE 2005: 1096-1101
34	EE	Franjo Ivancic, Ilya Shlyakhter, Aarti Gupta, Malay K. Ganai: Model Checking C Programs Using F-SOFT. ICCD 2005: 297-308
33	EE	Chao Wang, Franjo Ivancic, Malay K. Ganai, Aarti Gupta: Deciding Separation Logic Formulae by SAT and Incremental Negative Cycle Elimination. LPAR 2005: 322-336
32	EE	Himanshu Jain, Franjo Ivancic, Aarti Gupta, Malay K. Ganai: Localization and Register Sharing for Predicate Abstraction. TACAS 2005: 397-412
31	EE	Malay K. Ganai, Aarti Gupta, Pranav Ashar: DiVer: SAT-Based Model Checking Platform for Verifying Large Scale Systems. TACAS 2005: 575-580
30	EE	Aarti Gupta, Malay K. Ganai, Pranav Ashar: Lazy Constraints and SAT Heuristics for Proof-Based Abstraction. VLSI Design 2005: 183-188
29		Aarti Gupta, Ali Alphan Bayazit, Yogesh S. Mahajan: Verification Languages. The Industrial Information Technology Handbook 2005: 1-18
28	EE	Mukul R. Prasad, Armin Biere, Aarti Gupta: A survey of recent advances in SAT-based formal verification. STTT 7(2): 156-173 (2005)
2004
27	EE	Malay K. Ganai, Aarti Gupta, Pranav Ashar: Efficient Modeling of Embedded Memories in Bounded Model Checking. CAV 2004: 440-452
26	EE	Malay K. Ganai, Aarti Gupta, Pranav Ashar: Efficient SAT-based unbounded symbolic model checking using circuit cofactoring. ICCAD 2004: 510-517
2003
25	EE	Aarti Gupta, Malay K. Ganai, Chao Wang, Zijiang Yang, Pranav Ashar: Abstraction and BDDs Complement SAT-Based BMC in DiVer. CAV 2003: 206-209
24	EE	Malay K. Ganai, Aarti Gupta, Zijiang Yang, Pranav Ashar: Efficient Distributed SAT and SAT-Based Distributed Bounded Model Checking. CHARME 2003: 334-347
23	EE	Aarti Gupta, Malay K. Ganai, Chao Wang, Zijiang Yang, Pranav Ashar: Learning from BDDs in SAT-based bounded model checking. DAC 2003: 824-829
22	EE	Aarti Gupta, Malay K. Ganai, Zijiang Yang, Pranav Ashar: Iterative Abstraction using SAT-based BMC with Proof Analysis. ICCAD 2003: 416-423
2002
21	EE	Aarti Gupta, Albert E. Casavant, Pranav Ashar, Akira Mukaiyama, Kazutoshi Wakabayashi, X. G. Liu: Property-Specific Testbench Generation for Guided Simulation. ASP-DAC 2002: 524-534
20	EE	Malay K. Ganai, Pranav Ashar, Aarti Gupta, Lintao Zhang, Sharad Malik: Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver. DAC 2002: 747-750
19	EE	Aarti Gupta, Albert E. Casavant, Pranav Ashar, X. G. Liu, Akira Mukaiyama, Kazutoshi Wakabayashi: Property-Specific Testbench Generation for Guided Simulation. VLSI Design 2002: 524-
18	EE	Aarti Gupta: Assertion-based verification turns the corner. IEEE Design & Test of Computers 19(4): 131-132 (2002)
2001
17	EE	Aarti Gupta, Anubhav Gupta, Zijiang Yang, Pranav Ashar: Dynamic Detection and Removal of Inactive Clauses in SAT with Application in Image Computation. DAC 2001: 536-541
16	EE	Albert E. Casavant, Aarti Gupta, S. Liu, Akira Mukaiyama, Kazutoshi Wakabayashi, Pranav Ashar: Property-specific witness graph generation for guided simulation. DATE 2001: 799
15	EE	Aarti Gupta, Zijiang Yang, Pranav Ashar, Lintao Zhang, Sharad Malik: Partition-Based Decision Heuristics for Image Computation Using SAT and BDDs. ICCAD 2001: 286-292
14	EE	Pranav Ashar, Aarti Gupta, Sharad Malik: Using complete-1-distinguishability for FSM equivalence checking. ACM Trans. Design Autom. Electr. Syst. 6(4): 569-590 (2001)
2000
13	EE	Aarti Gupta, Zijiang Yang, Pranav Ashar, Anubhav Gupta: SAT-Based Image Computation with Application in Reachability Analysis. FMCAD 2000: 354-371
12	EE	Aarti Gupta, Pranav Ashar: Fast Error Diagnosis for Combinational Verification. VLSI Design 2000: 442-448
1999
11	EE	Aarti Gupta, Pranav Ashar, Sharad Malik: Exploiting Retiming in a Guided Simulation Based Validation Methodology. CHARME 1999: 350-353
10	EE	Pranav Ashar, Anand Raghunathan, Aarti Gupta, Subhrajit Bhattacharya: Verification of Scheduling in the Presence of Loops Using Uninterpreted Symbolic Simulation. ICCD 1999: 458-466
1998
9	EE	Aarti Gupta, Pranav Ashar: Integrating a Boolean Satisfiability Checker and BDDs for Combinational Equivalence Checking. VLSI Design 1998: 222-225
1997
8	EE	Aarti Gupta, Sharad Malik, Pranav Ashar: Toward Formalizing a Validation Methodology Using Simulation Coverage. DAC 1997: 740-745
1996
7	EE	Pranav Ashar, Aarti Gupta, Sharad Malik: Using complete-1-distinguishability for FSM equivalence checking. ICCAD 1996: 346-353
1994
6		Aarti Gupta, Allan L. Fisher: Tradeoffs in Canonical Sequential Function Representations. ICCD 1994: 111-116
1993
5		Aarti Gupta, Allan L. Fisher: Parametric Circuit Representation Using Inductive Boolean Functions. CAV 1993: 15-28
4	EE	Aarti Gupta, Allan L. Fisher: Representation and symbolic manipulation of linearly inductive Boolean functions. ICCAD 1993: 192-199
1992
3		Aarti Gupta: Formal Hardware Verification Methods: A Survey. Formal Methods in System Design 1(2/3): 151-238 (1992)
1990
2		Aarti Gupta, Allan L. Fisher: Flexible Parallel Polygon Rendering. ICPP (3) 1990: 87-91
1986
1		Moon-Jung Chung, Edward J. Toy, Aarti Gupta: A Parallel Computer Based on Cube-Connected Cycles for Wafer-Scale. FJCC 1986: 325-334

Coauthor Index

1	Pranav Ashar	[7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [19] [20] [21] [22] [23] [24] [25] [26] [27] [30] [31] [35] [36] [38] [40] [52]
2	Ali Alphan Bayazit	[29]
3	Subhrajit Bhattacharya	[10]
4	Armin Biere	[28]
5	Albert E. Casavant	[16] [19] [21]
6	Moon-Jung Chung	[1]
7	Allan L. Fisher	[2] [4] [5] [6]
8	Malay K. Ganai	[20] [22] [23] [24] [25] [26] [27] [30] [31] [32] [33] [34] [35] [36] [38] [40] [41] [42] [46] [48] [52] [54] [63]
9	Anubhav Gupta	[13] [17]
10	C. Norris Ip	[39]
11	Franjo Ivancic	[32] [33] [34] [37] [38] [43] [44] [47] [50] [51] [53] [55] [60] [61] [65]
12	Himanshu Jain	[32] [50]
13	Vineet Kahlon	[37] [45] [49] [56] [62] [64]
14	Hyondeuk Kim	[58]
15	S. Liu	[16]
16	X. G. Liu	[19] [21]
17	Yogesh S. Mahajan	[29]
18	Sharad Malik	[7] [8] [11] [14] [15] [20] [39]
19	Akira Mukaiyama	[16] [19] [21] [54]
20	Tim Oates	[57]
21	Mukul R. Prasad	[28]
22	Anand Raghunathan	[10]
23	Sriram Sankaranarayanan	[43] [55] [62] [65]
24	Ilya Shlyakhter	[34] [38] [43] [50]
25	Nishant Sinha	[49]
26	Muralidhar Talupur	[41]
27	Daijue Tang	[39]
28	Edward J. Toy	[1]
29	Kazutoshi Wakabayashi	[16] [19] [21] [54]
30	Chao Wang	[23] [25] [33] [42] [44] [47] [48] [50] [51] [53] [58] [60] [61] [64]
31	Yu Yang	[62]
32	Zijiang Yang	[13] [15] [17] [22] [23] [24] [25] [38] [40] [44] [47] [51] [53] [61] [64]
33	Lintao Zhang	[15] [20]

Colors in the list of coauthors