| 2008 |
|---|
| 10 | EE | Kanupriya Gulati,
Sunil P. Khatri:
Improving FPGA routability using network coding.
ACM Great Lakes Symposium on VLSI 2008: 147-150 |
| 9 | EE | Nikhil Saluja,
Kanupriya Gulati,
Sunil P. Khatri:
SAT-based ATPG using multilevel compatible don't-cares.
ACM Trans. Design Autom. Electr. Syst. 13(2): (2008) |
| 2007 |
|---|
| 8 | EE | Kanupriya Gulati,
Nikhil Jayakumar,
Sunil P. Khatri:
A Structured ASIC Design Approach Using Pass Transistor Logic.
ISCAS 2007: 1787-1790 |
| 2006 |
|---|
| 7 | EE | Rajesh Garg,
Mario Sanchez,
Kanupriya Gulati,
Nikhil Jayakumar,
Anshul Gupta,
Sunil P. Khatri:
A design flow to optimize circuit delay by using standard cells and PLAs.
ACM Great Lakes Symposium on VLSI 2006: 217-222 |
| 6 | EE | Brock J. LaMeres,
Kanupriya Gulati,
Sunil P. Khatri:
Controlling inductive cross-talk and power in off-chip buses using CODECs.
ASP-DAC 2006: 850-855 |
| 5 | EE | Nikhil Jayakumar,
Sunil P. Khatri,
Kanupriya Gulati,
Alexander Sprintson:
Network coding for routability improvement in VLSI.
ICCAD 2006: 820-823 |
| 4 | EE | Mandar Waghmode,
Kanupriya Gulati,
Sunil P. Khatri,
Weiping Shi:
An Efficient, Scalable Hardware Engine for Boolean SATisfiability.
ICCD 2006 |
| 3 | EE | Kanupriya Gulati,
Nikhil Jayakumar,
Sunil P. Khatri:
A probabilistic method to determine the minimum leakage vector for combinational designs.
ISCAS 2006 |
| 2 | EE | Kanupriya Gulati,
M. Lovell,
Sunil P. Khatri:
Efficient don't care computation for hierarchical designs.
ISCAS 2006 |
| 2005 |
|---|
| 1 | EE | Kanupriya Gulati,
Nikhil Jayakumar,
Sunil P. Khatri:
An algebraic decision diagram (ADD) based technique to find leakage histograms of combinational designs.
ISLPED 2005: 111-114 |
