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Warren J. Gross Vis

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*2009
20EEBharathram Sivasubramanian, Warren J. Gross, Harry Leib: Design and FPGA implementation of iterative decoders for codes on graphs. CCECE 2009: 1080-1084
2008
19EEAndrew J. Wong, Warren J. Gross: Configurable Flow Models for FPGA Particle Graphics Engines. FCCM 2008: 283-284
18EEYousef El-Kurdi, David Fernández, Evgueni Souleimanov, Dennis Giannacopoulos, Warren J. Gross: FPGA architecture and implementation of sparse matrix-vector multiplication for the finite element method. Computer Physics Communications 178(8): 558-570 (2008)
17EEShaoqiang Bi, Warren J. Gross: The Mixed-Radix Chinese Remainder Theorem and Its Applications to Residue Comparison. IEEE Trans. Computers 57(12): 1624-1632 (2008)
16EESaeed Sharifi Tehrani, Shie Mannor, Warren J. Gross: Fully Parallel Stochastic LDPC Decoders. IEEE Transactions on Signal Processing 56(11): 5692-5703 (2008)
15EESaeed Sharifi Tehrani, Christophe Jégo, Bo Zhu, Warren J. Gross: Stochastic Decoding of Linear Block Codes With High-Density Parity-Check Matrices. IEEE Transactions on Signal Processing 56(11): 5733-5739 (2008)
14EEJohn Sachs Beeckler, Warren J. Gross: Particle graphics on reconfigurable hardware. TRETS 1(3): (2008)
2007
13EEJahyun J. Koo, David Fernández, Ashraf Haddad, Warren J. Gross: Evaluation of a High-Level-Language Methodology for High-Performance Reconfigurable Computers. ASAP 2007: 30-35
12EEJahyun J. Koo, Alan Evans, Warren J. Gross: Accelerating a Medical 3D Brain MRI Analysis Algorithm using a High-Performance Reconfigurable Computer. FPL 2007: 11-16
11EESaeed Sharifi Tehrani, Shie Mannor, Warren J. Gross: Survey of Stochastic Computation on Factor Graphs. ISMVL 2007: 54
10EELaurier Boulianne, Michel Dumontier, Warren J. Gross: A stochastic particle-based biological system simulator. SCSC 2007: 794-801
9EESaeed Sharifi Tehrani, Shie Mannor, Warren J. Gross: An Area-Efficient FPGA-Based Architecture for Fully-Parallel Stochastic LDPC Decoding. SiPS 2007: 255-260
8EEWarren J. Gross, Frank R. Kschischang, P. Glenn Gulak: Architecture and Implementation of an Interpolation Processor for Soft-Decision Reed-Solomon Decoding. IEEE Trans. VLSI Syst. 15(3): 309-318 (2007)
2006
7EEYousef El-Kurdi, Warren J. Gross, Dennis Giannacopoulos: Sparse Matrix-Vector Multiplication for Finite Element Method Matrices on FPGAs. FCCM 2006: 293-294
6EEWarren J. Gross, Frank R. Kschischang, Ralf Koetter, P. Glenn Gulak: Applications of Algebraic Soft-Decision Decoding of Reed-Solomon Codes. IEEE Transactions on Communications 54(6): 1143 (2006)
5EEWarren J. Gross, Frank R. Kschischang, Ralf Koetter, P. Glenn Gulak: Applications of Algebraic Soft-Decision Decoding of Reed-Solomon Codes. IEEE Transactions on Communications 54(7): 1224-1234 (2006)
2005
4EEJohn Sachs Beeckler, Warren J. Gross: FPGA Particle Graphics Hardware. FCCM 2005: 85-94
3EEShaoqiang Bi, Warren J. Gross, Wei Wang, Asim J. Al-Khalili, M. N. S. Swamy: An Area-Reduced Scheme for Modulo 2n-1 Addition/Subtraction. IWSOC 2005: 396-399
2EEWarren J. Gross, Frank R. Kschischang, Ralf Koetter, P. Glenn Gulak: Towards a VLSI Architecture for Interpolation-Based Soft-Decision Reed-Solomon Decoders. VLSI Signal Processing 39(1-2): 93-111 (2005)
2004
1EEWarren J. Gross, Frank R. Kschischang, P. Glenn Gulak: An FPGA Interpolation Processor for Soft-Decision Reed-Solomon Decoding. FCCM 2004: 310-311

Coauthor Index

1Asim J. Al-Khalili (A. J. Al-Khalili) [3]
2John Sachs Beeckler [4] [14]
3Shaoqiang Bi [3] [17]
4Laurier Boulianne [10]
5Michel Dumontier [10]
6Yousef El-Kurdi [7] [18]
7Alan Evans [12]
8David Fernández [13] [18]
9Dennis Giannacopoulos [7] [18]
10P. Glenn Gulak [1] [2] [5] [6] [8]
11Ashraf Haddad [13]
12Christophe Jégo [15]
13Ralf Koetter (Ralf Kötter) [2] [5] [6]
14Jahyun J. Koo [12] [13]
15Frank R. Kschischang [1] [2] [5] [6] [8]
16Harry Leib [20]
17Shie Mannor [9] [11] [16]
18Bharathram Sivasubramanian [20]
19Evgueni Souleimanov [18]
20M. N. S. Swamy [3]
21Saeed Sharifi Tehrani [9] [11] [15] [16]
22Wei Wang [3]
23Andrew J. Wong [19]
24Bo Zhu [15]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)