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| 2001 | ||
|---|---|---|
| 3 | EE | Matt Postiff, David Greene, Steven E. Raasch, Trevor N. Mudge: Integrating superscalar processor components to implement register caching. ICS 2001: 348-357 |
| 2000 | ||
| 2 | EE | Matt Postiff, David Greene, Trevor N. Mudge: The store-load address table and speculative register promotion. MICRO 2000: 235-244 |
| 1995 | ||
| 1 | Kenneth P. Parker, David Greene: The ITC Lecture Series: An Experiment. ITC 1995: 925 | |
| 1 | Trevor N. Mudge | [2] [3] |
| 2 | Kenneth P. Parker | [1] |
| 3 | Matt Postiff | [2] [3] |
| 4 | Steven E. Raasch | [3] |