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Atsuhiro Goto Vis

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*2007
15 Atsuhiro Goto: Proceedings of the 2007 Workshop on Digital Identity Management, Fairfax, VA, USA, November 2, 2007 ACM 2007
14EELing Liu, Atsuhiro Goto: Message from SAINT 2007 Workshops Chairs. SAINT Workshops 2007
13EEAtsuhiro Goto: Preface. Journal of Computer Security 15(5): 491 (2007)
2006
12 Ari Juels, Marianne Winslett, Atsuhiro Goto: Proceedings of the 2006 Workshop on Digital Identity Management, Alexandria, VA, USA, November 3, 2006 ACM 2006
11EEAtsuhiro Goto: Preface. Journal of Computer Security 14(3): 247 (2006)
2005
10 Vijay Atluri, Pierangela Samarati, Atsuhiro Goto: Proceedings of the 2005 Workshop on Digital Identity Management, Fairfax, VA, USA, November 11, 2005 ACM 2005
1990
9 Kenji Nishida, Yasunori Kimura, Akira Matsumoto, Atsuhiro Goto: Evaluation of MRB Garbage Collection on Parallel Logic Programming Architectures. ICLP 1990: 83-95
1989
8EEAtsuhiro Goto, Akira Matsumoto, Evan Tick: Design and Performance of a Coherent Cache for Parallel Logic Programming Architectures. ISCA 1989: 25-33
1988
7 Shunichi Uchida, Kazuo Taki, Katsuto Nakajima, Atsuhiro Goto, Takashi Chikayama: Research and Development of the Parallel Inference System in the Intermediate Stage of the FGCS Project. FGCS 1988: 16-36
6 Atsuhiro Goto, Masatoshi Sato, Katsuto Nakajima, Kazuo Taki, Akira Matsumoto: Overview of the Parallel Inference Machine Architecture (PIM). FGCS 1988: 208-229
5 Tsuyoshi Shinogi, Kouichi Kumon, Akira Hattori, Atsuhiro Goto, Yasunori Kimura, Takashi Chikayama: Macro-Call Instruction for the Efficient KL1 Implementation on PIM. FGCS 1988: 953-961
4 Atsuhiro Goto, Yasunori Kimura, T. Nakagawa, Takashi Chikayama: Lazy Reference Counting: An Incremental Garbage Collection Method for Parallel Inference Machines. ICLP/SLP 1988: 1241-1256
1987
3 Masatoshi Sato, Hajime Shimizu, Akira Matsumoto, Kazuaki Rokusawa, Atsuhiro Goto: KL1 Execution Model for PIM Cluster with Shared Memory. ICLP 1987: 338-355
1986
2 Atsuhiro Goto, Shunichi Uchida: Towards a High Performance Parallel Inference Machine - The Intermediate Stage Plan of PIM. Future Parallel Computers 1986: 299-320
1984
1 Atsuhiro Goto, Hidehiko Tanaka, Tohru Moto-Oka: Highly Parallel Inference Engine PIE: Goal Rewriting Model and Machine Architecture. New Generation Comput. 2(1): 37-58 (1984)

Coauthor Index

1Vijayalakshmi Atluri (Vijay Atluri) [10]
2Takashi Chikayama [4] [5] [7]
3Akira Hattori [5]
4Ari Juels [12]
5Yasunori Kimura [4] [5] [9]
6Kouichi Kumon [5]
7Ling Liu [14]
8Akira Matsumoto [3] [6] [8] [9]
9Tohru Moto-Oka [1]
10T. Nakagawa [4]
11Katsuto Nakajima [6] [7]
12Kenji Nishida [9]
13Kazuaki Rokusawa [3]
14Pierangela Samarati [10]
15Masatoshi Sato [3] [6]
16Hajime Shimizu [3]
17Tsuyoshi Shinogi [5]
18Kazuo Taki [6] [7]
19Hidehiko Tanaka [1]
20Evan Tick [8]
21Shunichi Uchida [2] [7]
22Marianne Winslett [12]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)