| * | 2009 |
|---|
| 10 | EE | Siddharth Garg,
Diana Marculescu,
Radu Marculescu,
Ümit Y. Ogras:
Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: a system-level perspective.
DAC 2009: 818-821 |
| 9 | EE | Siddharth Garg,
Diana Marculescu:
System-level process variability analysis and mitigation for 3D MPSoCs.
DATE 2009: 604-609 |
| 8 | EE | Siddharth Garg,
Diana Marculescu:
3D-GCP: An analytical model for the impact of process variations on the critical path delay distribution of 3D ICs.
ISQED 2009: 147-155 |
| 2008 |
|---|
| 7 | EE | Siddharth Garg,
Diana Marculescu:
System-level mitigation of WID leakage power variability using body-bias islands.
CODES+ISSS 2008: 273-278 |
| 6 | EE | Siddharth Garg,
Diana Marculescu:
System-level throughput analysis for process variation aware multiple voltage-frequency island designs.
ACM Trans. Design Autom. Electr. Syst. 13(4): (2008) |
| 5 | EE | Diana Marculescu,
Siddharth Garg:
Process-Driven Variability Analysis of Single and Multiple Voltage-Frequency Island Latency-Constrained Systems.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(5): 893-905 (2008) |
| 2007 |
|---|
| 4 | EE | Siddharth Garg,
Diana Marculescu:
On the impact of manufacturing process variations on the lifetime of sensor networks.
CODES+ISSS 2007: 203-208 |
| 3 | EE | Siddharth Garg,
Diana Marculescu:
Interactive presentation: System-level process variation driven throughput analysis for single and multiple voltage-frequency island designs.
DATE 2007: 403-408 |
| 2006 |
|---|
| 2 | EE | Diana Marculescu,
Siddharth Garg:
System-level process-driven variability analysis for single and multiple voltage-frequency island systems.
ICCAD 2006: 541-546 |
| 2004 |
|---|
| 1 | EE | Siddharth Garg,
Siddharth Tata,
Ravishankar Arunachalam:
Static Transition Probability Analysis Under Uncertainty.
ICCD 2004: 380-386 |
