| 2007 |
|---|
| 7 | EE | Loganathan Lingappan,
Vijay Gangaram,
Niraj K. Jha:
Fast Enhancement of Validation Test Sets to Improve Stuck-at Fault Coverage for RTL circuits.
VLSI Design 2007: 504-512 |
| 6 | EE | Jian Kang,
Sharad C. Seth,
Vijay Gangaram:
Efficient RTL Coverage Metric for Functional Test Selection.
VTS 2007: 318-324 |
| 2006 |
|---|
| 5 | EE | Vijay Gangaram,
Deepa Bhan,
James K. Caldwell:
Functional Test Selection for High Volume Manufacturing.
MTV 2006: 15-19 |
| 4 | EE | Vishwani D. Agrawal,
Soumitra Bose,
Vijay Gangaram:
Upper Bounding Fault Coverage by Structural Analysis and Signal Monitoring.
VTS 2006: 88-93 |
| 1998 |
|---|
| 3 | EE | Sujit Dey,
Vijay Gangaram,
Miodrag Potkonjak:
A controller redesign technique to enhance testability of controller-data path circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(2): 157-168 (1998) |
| 1997 |
|---|
| 2 | EE | Srimat T. Chakradhar,
Vijay Gangaram,
Steven G. Rothweiler:
Deriving Signal Constraints to Accelerate Sequential Test Generation.
VLSI Design 1997: 488-494 |
| 1995 |
|---|
| 1 | EE | Sujit Dey,
Vijay Gangaram,
Miodrag Potkonjak:
A controller-based design-for-testability technique for controller-data path circuits.
ICCAD 1995: 534-540 |
