Joan Figueras

2008
49	EE	Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman: Full Open Defects in Nanometric CMOS. VTS 2008: 119-124
48	EE	Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras: Experimental Characterization of CMOS Interconnect Open Defects. IEEE Trans. on CAD of Integrated Circuits and Systems 27(1): 123-136 (2008)
2007
47	EE	Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi: Diagnosis of Bridging Defects Based on Current Signatures at Low Power Supply Voltages. VTS 2007: 145-150
46	EE	Rosa Rodríguez-Montañés, Daniel Arumí, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi: Diagnosis of Full Open Defects in Interconnecting Lines. VTS 2007: 158-166
45	EE	Salvador Manich, L. Garcia-Deiros, Joan Figueras: Minimizing Test Time in Arithmetic Test-Pattern Generators With Constrained Memory Resources. IEEE Trans. on CAD of Integrated Circuits and Systems 26(11): 2046-2058 (2007)
2006
44		L. Balado, E. Lupon, L. García, Rosa Rodríguez-Montañés, Joan Figueras: Lissajous Based Mixed-Signal Testing for N-Observable Signals. DDECS 2006: 125-130
2005
43	EE	R. Sanahuja, V. Barcons, L. Balado, Joan Figueras: Testing Biquad Filters under Parametric Shifts Using X-Y Zoning. J. Electronic Testing 21(3): 257-265 (2005)
2004
42	EE	Salvador Manich, L. García, L. Balado, E. Lupon, Josep Rius, Rosa Rodríguez-Montañés, Joan Figueras: BIST Technique by Equally Spaced Test Vector Sequences. VTS 2004: 206-216
2003
41	EE	Yves Bertrand, Marie-Lise Flottes, L. Balado, Joan Figueras, Anton Biasizzo, Franc Novak, Stefano Di Carlo, Paolo Prinetto, N. Pricopi, Hans-Joachim Wunderlich, J.-P. Van der Heyden: Test Engineering Education in Europe: the EuNICE-Test Project. MSE 2003: 85-86
2002
40	EE	Rosa Rodríguez-Montañés, D. Muñoz, L. Balado, Joan Figueras: Analog Switches in Programmable Analog Devices: Quiescent Defective Behaviours. IOLTW 2002: 99-103
39	EE	Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira, Salvador Manich, Rosa Rodríguez-Montañés, Joan Figueras: RTL Level Preparation of High-Quality/Low-Energy/Low-Power BIST. ITC 2002: 814-823
38	EE	Antoni Ferré, Joan Figueras: Leakage power bounds in CMOS digital technologies. IEEE Trans. on CAD of Integrated Circuits and Systems 21(6): 731-738 (2002)
2001
37		Michel Renovell, Penelope Faure, Jean Michel Portal, Joan Figueras, Yervant Zorian: IS-FPGA : a new symmetric FPGA architecture with implicit scan. ITC 2001: 924-931
2000
36	EE	Michel Renovell, Jean Michel Portal, Penelope Faure, Joan Figueras, Yervant Zorian: TOF: a tool for test pattern generation optimization of an FPGA application oriented test. Asian Test Symposium 2000: 323-328
35		Anna Maria Brosa, Joan Figueras: Digital signature proposal for mixed-signal circuits. ITC 2000: 1041-1050
1999
34	EE	Michel Renovell, Jean Michel Portal, Joan Figueras, Yervant Zorian: Minimizing the Number of Test Configurations for Different FPGA Families. Asian Test Symposium 1999: 363-368
33	EE	Josep Rius, Joan Figueras: Exploring the Combination of IDDQ and iDDt Testing: Energy Testing. DATE 1999: 543-548
32	EE	Michel Renovell, Jean Michel Portal, Joan Figueras, Yervant Zorian: Testing the Configurable Interconnect/Logic Interface of SRAM-Based FPGA's. DATE 1999: 618-622
31	EE	Anna Maria Brosa, Joan Figueras: On Optimizing Test Strategies for Analog Cells. Great Lakes Symposium on VLSI 1999: 92-96
30	EE	Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Joan Figueras, Salvador Manich, P. Teixeira, M. Santos: Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity. ISCAS (1) 1999: 110-113
1998
29	EE	Michel Renovell, Jean Michel Portal, Joan Figueras, Yervant Zorian: SRAM-Based FPGA's: Testing the Interconnect/Logic Interface. Asian Test Symposium 1998: 266-271
28	EE	Rosa Rodríguez-Montañés, Joan Figueras: Estimation of the Defective IDDQ Caused by Shorts in Deep-Submicron CMOS ICs. DATE 1998: 490-494
27	EE	Michel Renovell, Jean Michel Portal, Joan Figueras, Yervant Zorian: RAM-Based FPGA's: A Test Approach for the Configurable Logic. DATE 1998: 82-88
26	EE	Cecilia Metra, Michel Renovell, G. Mojoli, Jean Michel Portal, S. Pastore, Joan Figueras, Yervant Zorian, Davide Salvi, Giacomo R. Sechi: Novel Technique for Testing FPGAs. DATE 1998: 89-
25	EE	Michel Renovell, Jean Michel Portal, Joan Figueras, Yervant Zorian: SRAM-Based FPGAs: A Fault Model for the Configurable Logig Modules. FPL 1998: 139-148
24	EE	Michel Renovell, Jean Michel Portal, Joan Figueras, Yervant Zorian: SRAM-based FPGA's: testing the LUT/RAM modules. ITC 1998: 1102-1111
23	EE	Víctor H. Champac, José Castillejos, Joan Figueras: IDDQ Testing of Opens in CMOS SRAMs. VTS 1998: 106-111
22	EE	Michel Renovell, Jean Michel Portal, Joan Figueras, Yervant Zorian: Testing the Interconnect of RAM-Based FPGAs. IEEE Design & Test of Computers 15(1): 45-50 (1998)
21	EE	Antoni Ferré, Eugeni Isern, Josep Rius, Rosa Rodríguez-Montañés, Joan Figueras: IDDQ testing: state of the art and future trends. Integration 26(1-2): 167-196 (1998)
1997
20	EE	Michel Renovell, Jean Michel Portal, Joan Figueras, Yervant Zorian: Test Pattern and Test Configuration Generation Methodology for the Logic of RAM-Based FPGA. Asian Test Symposium 1997: 254-
19		Antoni Ferré, Joan Figueras: IDDQ Characterization in Submicron CMOS. ITC 1997: 136-145
18	EE	Michel Renovell, Joan Figueras, Yervant Zorian: Test of RAM-based FPGA: methodology and application to the interconnect. VTS 1997: 230-237
17	EE	Vishwani D. Agrawal, Robert C. Aitken, J. Braden, Joan Figueras, S. Kumar, Hans-Joachim Wunderlich, Yervant Zorian: Power Dissipation During Testing: Should We Worry About it? VTS 1997: 456-457
16	EE	Rosa Rodríguez-Montañés, Joan Figueras: Bridges in sequential CMOS circuits: current-voltage signatur. VTS 1997: 68-73
15	EE	Michael Nicolaidis, Ricardo de Oliveira Duarte, Salvador Manich, Joan Figueras: Fault-Secure Parity Prediction Arithmetic Operators. IEEE Design & Test of Computers 14(2): 60-71 (1997)
1996
14	EE	Antoni Ferré, Joan Figueras: On estimating bounds of the quiescent current for I/sub DDQ/ testin. VTS 1996: 106-111
13	EE	Salvador Manich, Michael Nicolaidis, Joan Figueras: Enhancing realistic fault secureness in parity prediction array arithmetic operators by I/sub DDQ/ monitoring. VTS 1996: 124-129
1995
12	EE	Víctor H. Champac, Joan Figueras: Testability of floating gate defects in sequential circuits. VTS 1995: 202-207
11	EE	Josep Rius, Joan Figueras: Detecting I/sub DDQ/ defective CMOS circuits by depowering. VTS 1995: 324-329
10	EE	Eugeni Isern, Joan Figueras: IDDQ Test and Diagnosis of CMOS Circuits. IEEE Design & Test of Computers 12(4): 60-67 (1995)
1994
9		Rosa Rodríguez-Montañés, Joan Figueras: Analysis of Bridging Defects in Sequential CMOS Circuits and their Current Testability. EDAC-ETC-EUROASIC 1994: 356-360
8		Eugeni Isern, Joan Figueras: Test of Bridging Faults in Scan-based Sequential Circuits. EDAC-ETC-EUROASIC 1994: 366-370
7	EE	Víctor H. Champac, Antonio Rubio, Joan Figueras: Electrical model of the floating gate defect in CMOS ICs: implications on IDDQ testing. IEEE Trans. on CAD of Integrated Circuits and Systems 13(3): 359-369 (1994)
1993
6		Víctor H. Champac, Antonio Rubio, Joan Figueras: Analysis of the Floating Gate Defect in CMOS. DFT 1993: 101-108
5		Michel Renovell, Joan Figueras: Current Testing Viability in Dynamic CMOS Circuits. DFT 1993: 207-214
4		Eugeni Isern, Joan Figueras: Test Generation with High Coverages for Quiescent Current Test of Bridging Faults in Combinational Circuits. ITC 1993: 73-82
1992
3		Rosa Rodríguez-Montañés, Joan Figueras, Eric Bruls: Bridging Defects Resistance Measurements in a CMOS Process. ITC 1992: 892-899
1991
2		Rosa Rodríguez-Montañés, J. A. Segura, Víctor H. Champac, Joan Figueras, J. A. Rubio: Current vs. Logic Testing of Gate Oxide Short, Floating Gate and Bridging Failures in CMOS. ITC 1991: 510-519
1	EE	Juan A. Carrasco, Joan Figueras, Annie Kuntzmann-Combelles: Evaluation of safety-oriented two-version architectures. Journal of Systems and Software 14(3): 155-162 (1991)

Coauthor Index

1	Vishwani D. Agrawal	[17]
2	Robert C. Aitken	[17]
3	Daniel Arumí	[46] [47] [48] [49]
4	L. Balado	[40] [41] [42] [43] [44]
5	V. Barcons	[43]
6	Yves Bertrand	[41]
7	Anton Biasizzo	[41]
8	J. Braden	[17]
9	Anna Maria Brosa	[31] [35]
10	Eric Bruls	[3]
11	Stefano Di Carlo	[41]
12	Juan A. Carrasco	[1]
13	José Castillejos	[23]
14	Víctor H. Champac (Víctor H. Champac Vilela)	[2] [6] [7] [12] [23]
15	Ricardo de Oliveira Duarte	[15]
16	Stefan Eichenberger	[46] [47] [49]
17	Penelope Faure	[36] [37]
18	Antoni Ferré	[14] [19] [21] [38]
19	Marie-Lise Flottes	[41]
20	L. García	[42] [44]
21	L. Garcia-Deiros	[45]
22	Patrick Girard	[30]
23	Loïs Guiller	[30]
24	J.-P. Van der Heyden	[41]
25	Camelia Hora	[46] [47] [49]
26	Eugeni Isern	[4] [8] [10] [21]
27	Bram Kruseman	[46] [47] [49]
28	S. Kumar	[17]
29	Annie Kuntzmann-Combelles	[1]
30	Christian Landrault	[30]
31	Maurice Lousberg	[46] [47]
32	E. Lupon	[42] [44]
33	Ananta K. Majhi	[46] [47]
34	Salvador Manich	[13] [15] [30] [39] [42] [45]
35	Cecilia Metra	[26]
36	G. Mojoli	[26]
37	D. Muñoz	[40]
38	Michael Nicolaidis	[13] [15]
39	Franc Novak	[41]
40	S. Pastore	[26]
41	Jean Michel Portal	[20] [22] [24] [25] [26] [27] [29] [32] [34] [36] [37]
42	Serge Pravossoudovitch	[30]
43	N. Pricopi	[41]
44	Paolo Prinetto	[41]
45	Michel Renovell	[5] [18] [20] [22] [24] [25] [26] [27] [29] [32] [34] [36] [37]
46	Josep Rius	[11] [21] [33] [42]
47	Rosa Rodríguez-Montañés	[2] [3] [9] [16] [21] [28] [39] [40] [42] [44] [46] [47] [48] [49]
48	Antonio Rubio	[6] [7]
49	J. A. Rubio	[2]
50	Davide Salvi	[26]
51	R. Sanahuja	[43]
52	M. Santos	[30]
53	Marcelino B. Santos	[39]
54	Giacomo R. Sechi	[26]
55	J. A. Segura	[2]
56	Isabel C. Teixeira	[39]
57	João Paulo Teixeira	[39]
58	P. Teixeira	[30]
59	Hans-Joachim Wunderlich	[17] [41]
60	Yervant Zorian	[17] [18] [20] [22] [24] [25] [26] [27] [29] [32] [34] [36] [37]

Colors in the list of coauthors