Wenyi Feng Vis

*	2008
14	EE	Wenyi Feng, Sinan Kaptanoglu: Designing Efficient Input Interconnect Blocks for LUT Clusters Using Counting and Entropy. TRETS 1(1): (2008)
	2007
13	EE	Wenyi Feng, Sinan Kaptanoglu: Designing efficient input interconnect blocks for LUT clusters using counting and entropy. FPGA 2007: 23-32
12	EE	Wenyi Feng, Jonathan W. Greene: Post-Placement Interconnect Entropy. IEEE Trans. VLSI Syst. 15(8): 945-948 (2007)
	2006
11	EE	Wenyi Feng, Jonathan W. Greene: Post-placement interconnect entropy. FPGA 2006: 227
10	EE	Wenyi Feng, Jonathan W. Greene: Post-placement interconnect entropy: how many configuration bits does a programmable logic device need? SLIP 2006: 41-48
	2003
9	EE	Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi: Adaptive Algorithms for Maximal Diagnosis of Wiring Interconnects. IEEE Trans. Computers 52(10): 1259-1270 (2003)
	2001
8	EE	Wenyi Feng, Farzin Karimi, Fabrizio Lombardi: Fault Detection in a Tristate System Environment. IEEE Micro 21(5): 77-85 (2001)
	2000
7	EE	Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi: Complexity Bounds for Lookup Table Implementation of Factored Forms in FPGA Technology Mapping. IPDPS Workshops 2000: 951-958
	1999
6	EE	Wenyi Feng, Wei-Kang Huang, Fred J. Meyer, Fabrizio Lombardi: A BIST TPG Approach for Interconnect Testing With the IEEE 1149.1 STD. Asian Test Symposium 1999: 95-100
5	EE	Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi: Novel Control Pattern Generators for Interconnect Testing with Boundary Scan. DFT 1999: 112-120
4	EE	Wenyi Feng, Xiao-Tao Chen, Fred J. Meyer, Fabrizio Lombardi: Reconfiguration of One-Time Programmable FPGAs with Faulty Logic Resources. DFT 1999: 368-376
3	EE	Wenyi Feng, Fred J. Meyer, Fabrizio Lombardi: Two-Step Algorithms for Maximal Diagnosis of Wiring Interconnects. FTCS 1999: 130-137
	1998
2	EE	Wenyi Feng, Wei-Kang Huang, Fred J. Meyer, Fabrizio Lombardi: Fault Detection in a Tristate System Environment. Asian Test Symposium 1998: 253-258
1	EE	Wenyi Feng, Fred J. Meyer, Wei-Kang Huang, Fabrizio Lombardi: On the Complexity of Sequential Testing in Configurable FPGAs. DFT 1998: 164-

Coauthor Index

1	Xiao-Tao Chen	[4]
2	Jonathan W. Greene	[10] [11] [12]
3	Wei-Kang Huang	[1] [2] [6]
4	Sinan Kaptanoglu	[13] [14]
5	Farzin Karimi	[8]
6	Fabrizio Lombardi	[1] [2] [3] [4] [5] [6] [7] [8] [9]
7	Fred J. Meyer	[1] [2] [3] [4] [5] [6] [7] [9]

Colors in the list of coauthors