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Joel S. Emer Vis

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*2009
41EEAndré Seznec, Joel S. Emer, Michael F. P. O'Boyle, Margaret Martonosi, Theo Ungerer: High Performance Embedded Architectures and Compilers, Fourth International Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings Springer 2009
40EEMichael Pellauer, Michael Adler, Derek Chiou, Joel S. Emer: Soft connections: addressing the hardware-design modularity problem. DAC 2009: 276-281
39EEMichael D. Powell, Arijit Biswas, Joel S. Emer, Shubhendu S. Mukherjee, Basit R. Sheikh, Shrirang M. Yardi: CAMP: A technique to estimate per-structure power at run-time using a few simple parameters. HPCA 2009: 289-300
38EEJoel S. Emer: Accelerating architecture research. ISPASS 2009
2008
37EEMichael Pellauer, Muralidaran Vijayaraghavan, Michael Adler, Arvind, Joel S. Emer: A-Ports: an efficient abstraction for cycle-accurate performance models on FPGAs. FPGA 2008: 87-96
36EEMichael Pellauer, Muralidaran Vijayaraghavan, Michael Adler, Arvind, Joel S. Emer: Quick Performance Models Quickly: Closely-Coupled Partitioned Simulation on FPGAs. ISPASS 2008: 1-10
35EEAamer Jaleel, William Hasenplaugh, Moinuddin K. Qureshi, Julien Sebot, Simon C. Steely Jr., Joel S. Emer: Adaptive insertion policies for managing shared caches. PACT 2008: 208-219
34EEMoinuddin K. Qureshi, Aamer Jaleel, Yale N. Patt, Simon C. Steely Jr., Joel S. Emer: Set-Dueling-Controlled Adaptive Insertion for High-Performance Caching. IEEE Micro 28(1): 91-98 (2008)
2007
33EESimha Sethumadhavan, Franziska Roesner, Joel S. Emer, Doug Burger, Stephen W. Keckler: Late-binding: enabling unordered load-store queues. ISCA 2007: 347-357
32EEMoinuddin K. Qureshi, Aamer Jaleel, Yale N. Patt, Simon C. Steely Jr., Joel S. Emer: Adaptive insertion policies for high performance caching. ISCA 2007: 381-391
31EEJoel S. Emer, Mark D. Hill, Yale N. Patt, Joshua J. Yi, Derek Chiou, Resit Sendag: Single-Threaded vs. Multithreaded: Where Should We Focus? IEEE Micro 27(6): 14-24 (2007)
2005
30EEShubhendu S. Mukherjee, Joel S. Emer, Steven K. Reinhardt: The Soft Error Problem: An Architectural Perspective. HPCA 2005: 243-247
29EEArijit Biswas, Paul Racunas, Razvan Cheveresan, Joel S. Emer, Shubhendu S. Mukherjee, Ram Rangan: Computing Architectural Vulnerability Factors for Address-Based Structures. ISCA 2005: 532-543
2004
28EEChristopher T. Weaver, Joel S. Emer, Shubhendu S. Mukherjee, Steven K. Reinhardt: Techniques to Reduce the Soft Error Rate of a High-Performance Microprocessor. ISCA 2004: 264-275
27EEShubhendu S. Mukherjee, Joel S. Emer, Tryggve Fossum, Steven K. Reinhardt: Cache Scrubbing in Microprocessors: Myth or Necessity? PRDC 2004: 37-42
26EEChristopher T. Weaver, Joel S. Emer, Shubhendu S. Mukherjee, Steven K. Reinhardt: Reducing the Soft-Error Rate of a High-Performance Microprocessor. IEEE Micro 24(6): 30-37 (2004)
2003
25EEShubhendu S. Mukherjee, Christopher T. Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin: A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor. MICRO 2003: 29-42
24EEShubhendu S. Mukherjee, Christopher T. Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin: Measuring Architectural Vulnerability Factors. IEEE Micro 23(6): 70-75 (2003)
2002
23EEShubhendu S. Mukherjee, Federico Silla, Peter J. Bannon, Joel S. Emer, Steven Lang, David Webb: A comparative study of arbitration algorithms for the Alpha 21364 pipelined router. ASPLOS 2002: 223-234
22EEEric Borch, Eric Tune, Srilatha Manne, Joel S. Emer: Loose Loops Sink Chips. HPCA 2002: 299-310
21EERoger Espasa, Federico Ardanaz, Julio Gago, Roger Gramunt, Isaac Hernandez, Toni Juan, Joel S. Emer, Stephen Felix, P. Geoffrey Lowney, Matthew Mattina, André Seznec: Tarantula: A Vector Extension to the Alpha Architecture. ISCA 2002: 281-
20EEShubhendu S. Mukherjee, Sarita V. Adve, Todd M. Austin, Joel S. Emer, Peter S. Magnusson: Performance Simulation Tools. IEEE Computer 35(2): 38-39 (2002)
19EEJoel S. Emer, Pritpal Ahuja, Eric Borch, Artur Klauser, Chi-Keung Luk, Srilatha Manne, Shubhendu S. Mukherjee, Harish Patil, Steven Wallace, Nathan L. Binkert, Roger Espasa, Toni Juan: Asim: A Performance Model Framework. IEEE Computer 35(2): 68-76 (2002)
2000
18EEHarish Patil, Joel S. Emer: Combining Static and Dynamic Branch Prediction to Reduce Destructive Aliasing. HPCA 2000: 251-
1999
17EETimothy Sherwood, Brad Calder, Joel S. Emer: Reducing cache misses using hardware and software page placement. International Conference on Supercomputing 1999: 155-164
16EECraig B. Zilles, Joel S. Emer, Gurindar S. Sohi: The Use of Multithreading for Exception Handling. MICRO 1999: 219-229
1998
15EEJoel S. Emer, Douglas W. Clark: A Characterization of Processor Performance in the VAX-11/780. 25 Years ISCA: Retrospectives and Reprints 1998: 274-283
14EEJoel S. Emer, Douglas W. Clark: Retrospective: Characterization of Processor Performance in the VAX-11/780. 25 Years ISCA: Retrospectives and Reprints 1998: 37-38
13EEGeorge Z. Chrysos, Joel S. Emer: Memory Dependence Prediction Using Store Sets. ISCA 1998: 142-153
1997
12EEJoel S. Emer, Nicholas C. Gloy: A Language for Describing Predictors and Its Application to Automatic Synthesis. ISCA 1997: 304-314
11EEJack L. Lo, Susan J. Eggers, Joel S. Emer, Henry M. Levy, Rebecca L. Stamm, Dean M. Tullsen: Converting Thread-Level Parallelism to Instruction-Level Parallelism via Simultaneous Multithreading. ACM Trans. Comput. Syst. 15(3): 322-354 (1997)
1996
10EEBrad Calder, Dirk Grunwald, Joel S. Emer: Predictive Sequential Associative Cache. HPCA 1996: 244-253
9EEDean M. Tullsen, Susan J. Eggers, Joel S. Emer, Henry M. Levy, Jack L. Lo, Rebecca L. Stamm: Exploiting Choice: Instruction Fetch and Issue on an Implementable Simultaneous Multithreading Processor. ISCA 1996: 191-202
8 Joel S. Emer: Incremental Versus Revolutionary Research. ACM Comput. Surv. 28(4es): 27 (1996)
1995
7EERichard Uhlig, David Nagle, Trevor N. Mudge, Stuart Sechrest, Joel S. Emer: Instruction Fetching: Coping with Code Bloat. ISCA 1995: 345-356
6EEBrad Calder, Dirk Grunwald, Joel S. Emer: A system level perspective on branch architecture performance. MICRO 1995: 199-206
1989
5EEK. K. Ramakrishnan, Joel S. Emer: Performance Analysis of Mass Storage Service Alternatives for Distributed Systems. IEEE Trans. Software Eng. 15(2): 120-133 (1989)
1988
4 Joel S. Emer, K. K. Ramakrishnan: Performance Considerations for Distributed Services: A Case Study: Mass Storage. ICDCS 1988: 289-297
1986
3EEJoel S. Emer, K. K. Ramakrishnan: Design analysis of a heterogeneous distributed system. ACM SIGOPS European Workshop 1986
1985
2EEDouglas W. Clark, Joel S. Emer: Performance of the VAX-11/780 Translation Buffer: Simulation and Measurement ACM Trans. Comput. Syst. 3(1): 31-62 (1985)
1984
1 Joel S. Emer, Douglas W. Clark: A Characterization of Processor Performance in the VAX-11/780. ISCA 1984: 301-310

Coauthor Index

1Michael Adler [36] [37] [40]
2Sarita V. Adve [20]
3Pritpal Ahuja [19]
4Federico Ardanaz [21]
5 Arvind [36] [37]
6Todd M. Austin [20] [24] [25]
7Peter J. Bannon [23]
8Nathan L. Binkert [19]
9Arijit Biswas [29] [39]
10Eric Borch [19] [22]
11Doug Burger [33]
12Brad Calder [6] [10] [17]
13Razvan Cheveresan [29]
14Derek Chiou [31] [40]
15George Z. Chrysos [13]
16Douglas W. Clark [1] [2] [14] [15]
17Susan J. Eggers [9] [11]
18Roger Espasa [19] [21]
19Stephen Felix [21]
20Tryggve Fossum [27]
21Julio Gago [21]
22Nicholas C. Gloy [12]
23Roger Gramunt [21]
24Dirk Grunwald [6] [10]
25William Hasenplaugh [35]
26Isaac Hernandez [21]
27Mark D. Hill [31]
28Aamer Jaleel [32] [34] [35]
29Toni Juan [19] [21]
30Stephen W. Keckler [33]
31Artur Klauser [19]
32Steven Lang [23]
33Henry M. Levy (Hank Levy) [9] [11]
34Jack L. Lo [9] [11]
35P. Geoffrey Lowney [21]
36Chi-Keung Luk [19]
37Peter S. Magnusson [20]
38Srilatha Manne [19] [22]
39Margaret Martonosi [41]
40Matthew Mattina [21]
41Trevor N. Mudge [7]
42Shubhendu S. Mukherjee [19] [20] [23] [24] [25] [26] [27] [28] [29] [30] [39]
43David Nagle [7]
44Michael F. P. O'Boyle [41]
45Harish Patil [18] [19]
46Yale N. Patt [31] [32] [34]
47Michael Pellauer [36] [37] [40]
48Michael D. Powell [39]
49Moinuddin K. Qureshi [32] [34] [35]
50Paul Racunas [29]
51K. K. Ramakrishnan (Kadangode K. Ramakrishnan) [3] [4] [5]
52Ram Rangan [29]
53Steven K. Reinhardt [24] [25] [26] [27] [28] [30]
54Franziska Roesner [33]
55Julien Sebot [35]
56Stuart Sechrest [7]
57Resit Sendag [31]
58Simha Sethumadhavan [33]
59André Seznec [21] [41]
60Basit R. Sheikh [39]
61Timothy Sherwood [17]
62Federico Silla [23]
63Gurindar S. Sohi [16]
64Rebecca L. Stamm [9] [11]
65Simon C. Steely Jr. [32] [34] [35]
66Dean M. Tullsen [9] [11]
67Eric Tune [22]
68Richard Uhlig [7]
69Theo Ungerer [41]
70Muralidaran Vijayaraghavan [36] [37]
71Steven Wallace [19]
72Christopher T. Weaver [24] [25] [26] [28]
73David Webb [23]
74Shrirang M. Yardi [39]
75Joshua J. Yi [31]
76Craig B. Zilles [16]

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Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)