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Michel Dubois Vis

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*2009
112EEViviane Guéraud, Anne Lejeune, Jean-Michel Adam, Michel Dubois, Nadine Mandran: Flexible Environment for Supervising Simulation-Based Learning Situations. AIED 2009: 698-700
111EEViviane Guéraud, Anne Lejeune, Jean-Michel Adam, Michel Dubois, Nadine Mandran: Supervising Distant Simulation-Based Practical Work: Environment and Experimentation. EC-TEL 2009: 602-608
110EEJinho Suh, Michel Dubois: Dynamic MIPS rate stabilization in out-of-order processors. ISCA 2009: 46-56
109EEJerome Tonetti, Lucile Vadcard, P. Girard, Michel Dubois, Philippe Merloz, Jocelyne Troccaz: Assessment of a percutaneous iliosacral screw insertion simulator CoRR abs/0910.2154: (2009)
108EEAdrian Moga, Michel Dubois: A comparative evaluation of hybrid distributed shared-memory systems. Journal of Systems Architecture - Embedded Systems Design 55(1): 43-52 (2009)
107EEWoojin Choi, Seok-Jun Park, Michel Dubois: Accurate Instruction Pre-scheduling in Dynamically Scheduled Processors. T. HiPEAC 2: 107-127 (2009)
2008
106 Per Stenström, Michel Dubois, Manolis Katevenis, Rajiv Gupta, Theo Ungerer: High Performance Embedded Architectures and Compilers, Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedings Springer 2008
105EEMichel Dubois, Hyunyoung Lee: STAMP: A universal algorithmic model for next-generation multithreaded machines and systems. IPDPS 2008: 1-5
104EEFederico Tajariol, Jean-Michel Adam, Michel Dubois: Seeing the Face and Observing the Actions: The Effects of Nonverbal Cues on Mediated Tutoring Dialogue. Intelligent Tutoring Systems 2008: 480-489
103EEXiaogang Qiu, Michel Dubois: The Synonym Lookaside Buffer: A Solution to the Synonym Problem in Virtual Caches. IEEE Trans. Computers 57(12): 1585-1599 (2008)
2007
102 Utpal Banerjee, José Moreira, Michel Dubois, Per Stenström: Proceedings of the 4th Conference on Computing Frontiers, 2007, Ischia, Italy, May 7-9, 2007 ACM 2007
101EEMd. Mafijul Islam, Alexander Busck, Mikael Engbom, Simji Lee, Michel Dubois, Per Stenström: Loop-level Speculative Parallelism in Embedded Applications. ICPP 2007: 3
100EEMichel Dubois, Hyunyoung Lee, Lan Lin: STAMP: A Universal Algorithmic Model for Next-Generation Multithreaded Machines and Systems. IPDPS 2007: 1-8
99EEMarc-Eric Bobillier-Chaumon, Michel Dubois, Françoise Sandoz-Guermond: Study of conditions of use of E-services accessible to visually disabled persons CoRR abs/0712.2168: (2007)
98EEJianwei Chen, Michel Dubois, Per Stenström: SimWattch: Integrating Complete-System and User-Level Performance and Power Simulators. IEEE Micro 27(4): 34-48 (2007)
2006
97 Laxmi N. Bhuyan, Michel Dubois, Will Eatherton: Proceedings of the 2006 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, ANCS 2006, San Jose, California, USA, December 3-5, 2006 ACM 2006
96EEVanda Luengo, Lucile Vadcard, Michel Dubois, Dima Mufti-Alchawafa: TELEOS : de l'analyse de l'activité professionnelle à la formalisation des connaissances pour un environnement d'apprentissage. Actes d'IC 2006: 101-110
95EEJaeheon Jeong, Per Stenström, Michel Dubois: Simple penalty-sensitive replacement policies for caches. Conf. Computing Frontiers 2006: 341-352
94EEJaeheon Jeong, Michel Dubois: Cache Replacement Algorithms with Nonuniform Miss Costs. IEEE Trans. Computers 55(4): 353-365 (2006)
2005
93EENasir Mohyuddin, Rashed Bhatti, Michel Dubois: Controlling leakage power with the replacement policy in slumberous caches. Conf. Computing Frontiers 2005: 161-170
92EEXiaogang Qiu, Michel Dubois: Moving Address Translation Closer to Memory in Distributed Shared-Memory Multiprocessors. IEEE Trans. Parallel Distrib. Syst. 16(7): 612-623 (2005)
2004
91EEMichel Dubois: Fighting the memory wall with assisted execution. Conf. Computing Frontiers 2004: 168-180
90EEMartin Kämpe, Per Stenström, Michel Dubois: Self-correcting LRU replacement policies. Conf. Computing Frontiers 2004: 181-191
89EEXiaogang Qiu, Michel Dubois: Tolerating Late Memory Traps in Dynamically Scheduled Processors. IEEE Trans. Computers 53(6): 732-743 (2004)
2003
88EEJaeheon Jeong, Michel Dubois: Cost-Sensitive Cache Replacement Algorithms. HPCA 2003: 327-
87EEJianwei Chen, Michel Dubois, Per Stenström: Integrating complete-system and user-level performance/power simulators: the SimWattch approach. ISPASS 2003: 1-10
86 Adrian Moga, Michel Dubois: Scalability implications of software-implemented coherence. Comput. Syst. Sci. Eng. 18(1): 7-15 (2003)
2002
85EEMartin Kämpe, Per Stenström, Michel Dubois: The FAB Predictor: Using Fourier Analysis to Predict the Outcome of Conditional Branches. HPCA 2002: 223-232
84 Michel Dubois, Jaeheon Jeong, Ashwini K. Nanda: Shared cache architectures for decision support systems. Perform. Eval. 49(1/4): 283-298 (2002)
2001
83EEXiaogang Qiu, Michel Dubois: Towards Virtually-Addressed Memory Hierarchies. HPCA 2001: 51-62
2000
82EEFong Pong, Michel Dubois: Formal Automatic Verification of Cache Coherence in Multiprocessors with Relaxed Memory Models. IEEE Trans. Parallel Distrib. Syst. 11(9): 989-1006 (2000)
81EEMichel Dubois, Isolde Vial: Multimedia design: the effects of relating multimodal information. J. Comp. Assisted Learning 16(2): 157-165 (2000)
80 Jonas Skeppstedt, Michel Dubois: Compiler Controlled Prefetching for Multiprocessors Using Low-Overhead Traps and Prefetch Engines. J. Parallel Distrib. Comput. 60(5): 585-615 (2000)
1999
79EEXiaogang Qiu, Michel Dubois: Tolerating Late Memory Traps in ILP Processors. ISCA 1999: 76-87
78EEJaeheon Jeong, Michel Dubois: Optimal Replacements in Caches with Two Miss Costs. SPAA 1999: 155-164
1998
77EEMichel Dubois, Christoph Scheurich, Faye A. Briggs: Memory Access Buffering in Multiprocessors. 25 Years ISCA: Retrospectives and Reprints 1998: 320-328
76EEMichel Dubois, Christoph Scheurich: Retrospective: Memory Access Buffering in Multiprocessors. 25 Years ISCA: Retrospectives and Reprints 1998: 48-50
75EEAdrian Moga, Michel Dubois: The Effectiveness of SRAM Network Caches in Clustered DSMs. HPCA 1998: 103-112
74EEXiaogang Qiu, Michel Dubois: Options for Dynamic Address Translation in COMAs. ISCA 1998: 214-225
73EEChristopher Ho, Heidi E. Ziegler, Michel Dubois: In-Memory Directories: Eliminating the Cost of Directories in CC-NUMAs. SPAA 1998: 222-230
72EEMichel Dubois, Jaeheon Jeong, Yong Ho Song, Adrian Moga: Rapid Hardware Prototyping on RPM-2. IEEE Design & Test of Computers 15(3): 112-118 (1998)
71 Fong Pong, Michael C. Browne, Gunes Aybay, Andreas Nowatzyk, Michel Dubois: Design Verification of the S3.mp Cache-Coherent Shared-Memory System. IEEE Trans. Computers 47(1): 135-140 (1998)
70 Fredrik Dahlgren, Michel Dubois, Per Stenström: Performance Evaluation and Cost Analysis of Cache Protocol Extensions for Shared-Memory Multiprocessors. IEEE Trans. Computers 47(10): 1041-1055 (1998)
69EEFong Pong, Michel Dubois: Formal Verification of Complex Coherence Protocols Using Symbolic State Models. J. ACM 45(4): 557-587 (1998)
68 Kangwoo Lee, Michel Dubois: Empirical Models of Miss Rates. Parallel Computing 24(2): 205-219 (1998)
1997
67EEKangwoo Lee, Woo-Jong Han, Michel Dubois: Bottleneck-Free Interconnect and IO Subsystem in SPAX. ICPADS 1997: 524-533
66EEAdrian Moga, Michel Dubois, Alain Gefflaut: Hardware Versus Software Implementation of COMA. ICPP 1997: 248-256
65EEJonas Skeppstedt, Michel Dubois: Hybrid compiler/hardware prefetching for multiprocessors using low-overhead cache miss traps. ICPP 1997: 298-305
64 Per Stenström, Mats Brorsson, Fredrik Dahlgren, Håkan Grahn, Michel Dubois: Boosting the Performance of Shared Memory Multiprocessors. IEEE Computer 30(7): 63-70 (1997)
1996
63EEFong Pong, Michel Dubois: Formal Verification of Delayed Consistency Protocols. IPPS 1996: 124-131
62EEAdrian Moga, Michel Dubois: Performance of Asynchronous Linear Iterations with Random Delays. IPPS 1996: 625-629
61EEFong Pong, Michel Dubois: Verification Techniques for Cache Coherence Protocols. ACM Comput. Surv. 29(1): 82-126 (1996)
60 Aydin Üresin, Michel Dubois: Effects of Asynchronism on the Convergence Rate of Iterative Algorithms. J. Parallel Distrib. Comput. 34(1): 66-81 (1996)
1995
59EEFong Pong, Andreas Nowatzyk, Gunes Aybay, Michel Dubois: Verifying Distributed Directory-Based Cahce Coherence Protocols: S3.mp, a Case Study. Euro-Par 1995: 287-300
58EEKoray Öner, Luiz André Barroso, Sasan Iman, Jaeheon Jeong, Krishnan Ramamurthy, Michel Dubois: The Design of RPM: An FPGA-based Multiprocessor Emulator. FPGA 1995: 60-66
57 Luiz André Barroso, Sasan Iman, Jaeheon Jeong, Koray Öner, Michel Dubois: RPM: A Rapid Prototyping Engine for Multiprocessor Systems. IEEE Computer 28(2): 26-34 (1995)
56 Luiz André Barroso, Michel Dubois: Performance Evaluation of the Slotted Ring Multiprocessor. IEEE Trans. Computers 44(7): 878-890 (1995)
55EEFredrik Dahlgren, Michel Dubois, Per Stenström: Sequential Hardware Prefetching in Shared-Memory Multiprocessors. IEEE Trans. Parallel Distrib. Syst. 6(7): 733-746 (1995)
54EEFong Pong, Michel Dubois: A New Approach for the Verification of Cache Coherence Protocols. IEEE Trans. Parallel Distrib. Syst. 6(8): 773-787 (1995)
53 Michel Dubois, Jonas Skeppstedt, Per Stenström: Essential Misses and Data Traffic in Coherence Protocols. J. Parallel Distrib. Comput. 29(2): 108-125 (1995)
1994
52 Fong Pong, Per Stenström, Michel Dubois: An Integrated Methodology for the Verification of Directory-Based Cache Protocols. ICPP (1) 1994: 158-165
51 Fredrik Dahlgren, Michel Dubois, Per Stenström: Combined Performance Gains of Simple Cache Protocol Extensions. ISCA 1994: 187-197
1993
50 Fredrik Dahlgren, Michel Dubois, Per Stenström: Fixed and Adaptive Sequential Prefetching in Shared Memory Multiprocessors. ICPP 1993: 56-63
49 Yung-Syau Chen, Michel Dubois: Cache Protocols with Partial Block Invalidations. IPPS 1993: 16-23
48 Luiz André Barroso, Michel Dubois: The Performance of Cache-Coherent Ring-based Multiprocessors. ISCA 1993: 268-277
47 Michel Dubois, Jonas Skeppstedt, Livio Ricciulli, Krishnan Ramamurthy, Per Stenström: The Detection and Elimination of Useless Misses in Multiprocessors. ISCA 1993: 88-97
46EEKoray Öner, Michel Dubois: Effects of Memory Latencies on Non-Blocking Processor/Cache Architectures. International Conference on Supercomputing 1993: 338-347
45 Jacqueline Chame, Michel Dubois: Cache Inclusion and Processor Sampling in Multiprocessor Simulations. SIGMETRICS 1993: 36-47
44EEFong Pong, Michel Dubois: The Verification of Cache Coherence Protocols. SPAA 1993: 11-20
43 Fong Pong, Michel Dubois: Correctness of a Directory-Based Cache Coherence Protocol: Early Experience. SPDP 1993: 37-44
1992
42 Ashfaq A. Khokhar, Michel Dubois: Matching Algorithms and Architecture in Hierarchical Shared-Memory Multiprocessor (HMS) Systems. IPPS 1992: 558-561
41EEMichel Dubois, Luiz André Barroso, Yung-Syau Chen, Koray Öner: Scalability Problems in Multiprocessors with Private Caches. PARLE 1992: 211-230
40 Michel Dubois: Special Issue on Memory System Architectures for Scalable Multiprocessors. J. Parallel Distrib. Comput. 15(4): 303-304 (1992)
1991
39 Luiz André Barroso, Michel Dubois: Cache Coherence on a Slotted Ring. ICPP (1) 1991: 230-237
38 Jin-Chin Wang, Michel Dubois, Faye A. Briggs: Analytical Modeling for Finite Cache Effects. ICPP (1) 1991: 287-291
37EEMichel Dubois, Jin-Chin Wang, Luiz André Barroso, Kangwoo Lee, Yung-Syau Chen: Delayed consistency and its effects on the miss rate of parallel programs. SC 1991: 197-206
36 Michel Dubois, Faye A. Briggs: The Run-Time Efficiency of Parallel Asynchronous Algorithms. IEEE Trans. Computers 40(11): 1260-1266 (1991)
35 Michel Dubois, Jin-Chin Wang: Shared Block Contention in a Cache Coherence Protocol. IEEE Trans. Computers 40(5): 640-644 (1991)
34 Christoph Scheurich, Michel Dubois: Lockup-free Caches in High-Performance Multiprocessors. J. Parallel Distrib. Comput. 11(1): 25-36 (1991)
1990
33 Anastasios A. Economides, Michel Dubois: Transient Models of Bus-Based Multiprocessors. ICPP (1) 1990: 153-160
32 Aydin Üresin, Michel Dubois: Asynchronous Iterations with Bounded Delay. ICPP (3) 1990: 236-243
31 Sharad Mehrotra, Chien-Ming Cheng, Kai Hwang, Michel Dubois, Dhabaleswar K. Panda: Algorithm-Driven Simulation and Performance Projection of a RISC-based Orthogonal Multiprocessor. ICPP (3) 1990: 244-253
30EEKai Hwang, Michel Dubois, Dhabaleswar K. Panda, S. Rao, Shisheng Shang, Aydin Üresin, W. Mao, H. Nair, M. Lytwyn, F. Hsieh, J. Liu, Sharad Mehrotra, Chien-Ming Cheng: OMP: a RISC-based multiprocessor using orthogonal-access memories and multiple spanning buses. ICS 1990: 7-22
29 Jin-Chin Wang, Michel Dubois: Performance comparison of cache coherence protocols based on the access burst model. Comput. Syst. Sci. Eng. 5(3): 147-158 (1990)
28 Shreekant S. Thakkar, Michel Dubois, Anthony T. Laundrie, Gurindar S. Sohi, David V. James, Stein Gjessing, Manu Thapar, Bruce Delagi, Michael J. Carlton, Alvin M. Despain: Scalable Shared-Memory Multiprocessor Architectures. IEEE Computer 23(6): 71-83 (1990)
27 Michel Dubois, Shreekant S. Thakkar: Cache Architectures in Tightly Coupled Multiprocessors - Guest Editors' Introduction to the Special Issue. IEEE Computer 23(6): 9-11 (1990)
26EEMichel Dubois, Christoph Scheurich: Memory Access Dependencies in Shared-Memory Multiprocessors. IEEE Trans. Software Eng. 16(6): 660-673 (1990)
25EEAydin Üresin, Michel Dubois: Parallel Asynchronous Algorithms for Discrete Data J. ACM 37(3): 588-606 (1990)
1989
24 Christoph Scheurich, Michel Dubois: Dynamic Page Migration in Multiprocessors with Distributed Global Memory. IEEE Trans. Computers 38(8): 1154-1163 (1989)
23 Aydin Üresin, Michel Dubois: Sufficient conditions for the convergence of asynchronous iterations. Parallel Computing 10(1): 83-92 (1989)
1988
22 Christoph Scheurich, Michel Dubois: Dynamic Page Migration in Multiprocessors with Distributed Global Memory. ICDCS 1988: 162-169
21 Christoph Scheurich, Michel Dubois: Concurrent Miss Resolution in Multiprocessor Caches. ICPP (1) 1988: 118-125
20 Michel Dubois, Jin-Chin Wang: Shared Data Contention in a Cache Coherence Protocol. ICPP (1) 1988: 146-155
19EEChristoph Scheurich, Michel Dubois: The design of a lockup-free cache for high-performance multiprocessors. SC 1988: 352-359
18 Michel Dubois, Christoph Scheurich, Faye A. Briggs: Synchronization, Coherence, and Event Ordering in Multiprocessors. IEEE Computer 21(2): 9-21 (1988)
17 Michel Dubois: Throughput Analysis of Cache-Based Multiprocessors with Multiple Buses. IEEE Trans. Computers 37(1): 58-70 (1988)
1987
16 Michel Dubois: Effect of Invalidations on the Hit Ratio of Cache-Based Multiprocessors. ICPP 1987: 255-257
15 Aydin Üresin, Michel Dubois: Asynchronous Relaxation of Non-Numerical Data. ICPP 1987: 499-501
14 Christoph Scheurich, Michel Dubois: Correct Memory Operation of Cache-Based Multiprocessors. ISCA 1987: 234-243
1986
13EEAydin Üresin, Michel Dubois: Generalized Asynchronous Iterations. CONPAR 1986: 272-278
12 Michel Dubois, Faye A. Briggs, Indira Patil, Meera Balakrishnan: Trace-Driven Simulations of Parallel and Distributed Algorithms in Multiprocessors. ICPP 1986: 909-916
11 Michel Dubois, Christoph Scheurich, Faye A. Briggs: Memory Access Buffering in Multiprocessors. ISCA 1986: 434-442
1985
10 Michel Dubois: A Cache-Based Multiprocessor with High Efficiency. ICPP 1985: 646-648
9 Michel Dubois: A Cache-Based Multiprocessor with High Efficiency. IEEE Trans. Computers 34(10): 968-972 (1985)
1983
8 Faye A. Briggs, Michel Dubois: Effectiveness of Private Caches in Multiprocessor Systems with Parallel-Pipelined Memories. IEEE Trans. Computers 32(1): 48-59 (1983)
1982
7 Michel Dubois, Faye A. Briggs: An approximate analytical model for asynchronous processes in multiprocessors. ICPP 1982: 290-297
6EEMichel Dubois, Faye A. Briggs: Effects of cache coherency in multiprocessors. ISCA 1982: 299-308
5 Michel Dubois, Faye A. Briggs: Effects of Cache Coherency in Multiprocessors. IEEE Trans. Computers 31(11): 1083-1099 (1982)
4 Michel Dubois, Faye A. Briggs: Performance of Synchronized Iterative Processes in Multiprocessor Systems. IEEE Trans. Software Eng. 8(4): 419-431 (1982)
1981
3 Michel Dubois, Faye A. Briggs: Efficient Interprocessor Communications for MIMD Multiprocessor Systems. ISCA 1981: 187-196
2 Faye A. Briggs, Michel Dubois, Kai Hwang: Throughout Analysis and Configuration Design of a Shared-Resource Multiprocessor System: PUMPS. ISCA 1981: 67-80
1 Faye A. Briggs, Michel Dubois: Performance of Cache-Based Multiprocessors. SIGMETRICS 1981: 181-190

Coauthor Index

1Jean-Michel Adam [104] [111] [112]
2Gunes Aybay [59] [71]
3Meera Balakrishnan [12]
4Utpal Banerjee [102]
5Luiz André Barroso [37] [39] [41] [48] [56] [57] [58]
6Rashed Bhatti [93]
7Laxmi N. Bhuyan [97]
8Marc-Eric Bobillier-Chaumon [99]
9Faye A. Briggs [1] [2] [3] [4] [5] [6] [7] [8] [11] [12] [18] [36] [38] [77]
10Mats Brorsson [64]
11Michael C. Browne [71]
12Alexander Busck [101]
13Michael J. Carlton [28]
14Jacqueline Chame [45]
15Jianwei Chen [87] [98]
16Yung-Syau Chen [37] [41] [49]
17Chien-Ming Cheng [30] [31]
18Woojin Choi [107]
19Fredrik Dahlgren [50] [51] [55] [64] [70]
20Bruce Delagi [28]
21Alvin M. Despain [28]
22Will Eatherton [97]
23Anastasios A. Economides [33]
24Mikael Engbom [101]
25Alain Gefflaut [66]
26P. Girard [109]
27Stein Gjessing [28]
28Håkan Grahn [64]
29Viviane Guéraud [111] [112]
30Rajiv Gupta [106]
31Woo-Jong Han [67]
32Christopher Ho [73]
33F. Hsieh [30]
34Kai Hwang [2] [30] [31]
35Sasan Iman [57] [58]
36Md. Mafijul Islam [101]
37David V. James [28]
38Jaeheon Jeong [57] [58] [72] [78] [84] [88] [94] [95]
39Martin Kämpe [85] [90]
40Manolis Katevenis [106]
41Ashfaq A. Khokhar [42]
42Anthony T. Laundrie [28]
43Hyunyoung Lee [100] [105]
44Kangwoo Lee [37] [67] [68]
45Simji Lee [101]
46Anne Lejeune [111] [112]
47Lan Lin [100]
48J. Liu [30]
49Vanda Luengo [96]
50M. Lytwyn [30]
51Nadine Mandran [111] [112]
52W. Mao [30]
53Sharad Mehrotra [30] [31]
54Philippe Merloz [109]
55Adrian Moga [62] [66] [72] [75] [86] [108]
56Nasir Mohyuddin [93]
57José Moreira [102]
58Dima Mufti-Alchawafa [96]
59H. Nair [30]
60Ashwini K. Nanda [84]
61Andreas Nowatzyk [59] [71]
62Koray Öner [41] [46] [57] [58]
63Dhabaleswar K. Panda [30] [31]
64Seok-Jun Park [107]
65Indira Patil [12]
66Fong Pong [43] [44] [52] [54] [59] [61] [63] [69] [71] [82]
67Xiaogang Qiu [74] [79] [83] [89] [92] [103]
68Krishnan Ramamurthy [47] [58]
69S. Rao [30]
70Livio Ricciulli [47]
71Françoise Sandoz-Guermond [99]
72Christoph Scheurich [11] [14] [18] [19] [21] [22] [24] [26] [34] [76] [77]
73Shisheng Shang [30]
74Jonas Skeppstedt [47] [53] [65] [80]
75Gurindar S. Sohi [28]
76Yong Ho Song [72]
77Per Stenström [47] [50] [51] [52] [53] [55] [64] [70] [85] [87] [90] [95] [98] [101] [102] [106]
78Jinho Suh [110]
79Federico Tajariol [104]
80Shreekant S. Thakkar [27] [28]
81Manu Thapar [28]
82Jerome Tonetti [109]
83Jocelyne Troccaz [109]
84Theo Ungerer [106]
85Aydin Üresin [13] [15] [23] [25] [30] [32] [60]
86Lucile Vadcard [96] [109]
87Isolde Vial [81]
88Jin-Chin Wang [20] [29] [35] [37] [38]
89Heidi E. Ziegler [73]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)