| * | 2009 |
|---|
| 11 | EE | Rostislav (Reuven) Dobkin,
Ran Ginosar,
Avinoam Kolodny:
QNoC asynchronous router.
Integration 42(2): 103-115 (2009) |
| 10 | EE | Rostislav (Reuven) Dobkin,
Ran Ginosar:
Two-phase synchronization with sub-cycle latency.
Integration 42(3): 367-375 (2009) |
| 2008 |
|---|
| 9 | EE | Rostislav (Reuven) Dobkin,
Ran Ginosar:
Fast Universal Synchronizers.
PATMOS 2008: 199-208 |
| 8 | EE | Rostislav (Reuven) Dobkin,
Arkadiy Morgenshtein,
Avinoam Kolodny,
Ran Ginosar:
Parallel vs. serial on-chip communication.
SLIP 2008: 43-50 |
| 2007 |
|---|
| 7 | EE | Rostislav (Reuven) Dobkin,
Yevgeny Perelman,
Tuvia Liran,
Ran Ginosar,
Avinoam Kolodny:
High Rate Wave-pipelined Asynchronous On-chip Bit-serial Data Link.
ASYNC 2007: 3-14 |
| 6 | EE | Rostislav (Reuven) Dobkin,
Ran Ginosar,
Israel Cidon:
QNoC Asynchronous Router with Dynamic Virtual Channel Allocation.
NOCS 2007: 218 |
| 2006 |
|---|
| 5 | EE | Rostislav (Reuven) Dobkin,
Ran Ginosar,
Avinoam Kolodny:
Fast Asynchronous Shift Register for Bit-Serial Communication.
ASYNC 2006: 117-127 |
| 4 | EE | Rostislav (Reuven) Dobkin,
Ran Ginosar,
Christos P. Sotiriou:
High Rate Data Synchronization in GALS SoCs.
IEEE Trans. VLSI Syst. 14(10): 1063-1074 (2006) |
| 2005 |
|---|
| 3 | EE | Rostislav (Reuven) Dobkin,
Victoria Vishnyakov,
Eyal Friedman,
Ran Ginosar:
An Asynchronous Router for Multiple Service Levels Networks on Chip.
ASYNC 2005: 44-53 |
| 2 | EE | Rostislav (Reuven) Dobkin,
Michael Peleg,
Ran Ginosar:
Parallel interleaver design and VLSI architecture for low-latency MAP turbo decoders.
IEEE Trans. VLSI Syst. 13(4): 427-438 (2005) |
| 2004 |
|---|
| 1 | EE | Rostislav (Reuven) Dobkin,
Ran Ginosar,
Christos P. Sotiriou:
Data Synchronization Issues in GALS SoCs.
ASYNC 2004: 170-180 |
