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Florent de Dinechin Vis

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*2008
29EENicolas Brisebarre, Florent de Dinechin, Jean-Michel Muller: Integer and floating-point constant multipliers for FPGAs. ASAP 2008: 239-244
28 Ionut Trestian, Octavian Cret, Laura Cret, Lucia Vacariu, Radu Tudoran, Florent de Dinechin: FPGA-Based Computation of the Inductance of Coils Used for the Magnetic Stimulation of the Nervous System. BIODEVICES (1) 2008: 151-155
27EEFlorent de Dinechin, Jérémie Detrey, Octavian Cret, Radu Tudoran: When FPGAs are better at floating-point than microprocessors. FPGA 2008: 260
26EEFlorent de Dinechin, Milos D. Ercegovac, Jean-Michel Muller, Nathalie Revol: Digital Arithmetic. Wiley Encyclopedia of Computer Science and Engineering 2008
25EEFlorent de Dinechin, Christoph Quirin Lauter, Guillaume Melquiond: Certifying floating-point implementations using Gappa CoRR abs/0801.0523: (2008)
24EEFlorent de Dinechin, Christoph Quirin Lauter: Optimizing polynomials for floating-point implementation CoRR abs/0803.0439: (2008)
23EEJérémie Detrey, Florent de Dinechin: Fonctions élémentaires en virgule flottante pour les accélérateurs reconfigurables. Technique et Science Informatiques 27(6): 673-698 (2008)
2007
22EEJérémie Detrey, Florent de Dinechin: Floating-Point Trigonometric Functions for FPGAs. FPL 2007: 29-34
21EEJérémie Detrey, Florent de Dinechin, Xavier Pujol: Return of the hardware floating-point elementary function. IEEE Symposium on Computer Arithmetic 2007: 161-168
20EEJérémie Detrey, Florent de Dinechin: Parameterized floating-point logarithm and exponential functions for FPGAs. Microprocessors and Microsystems 31(8): 537-545 (2007)
19EEJérémie Detrey, Florent de Dinechin: A Tool for Unbiased Comparison between Logarithmic and Floating-point Arithmetic. VLSI Signal Processing 49(1): 161-175 (2007)
2006
18EESylvain Collange, Jérémie Detrey, Florent de Dinechin: Floating Point or LNS: Choosing the Right Arithmetic on an Aapplication Basis. DSD 2006: 197-203
17EEFlorent de Dinechin, Christoph Quirin Lauter, Guillaume Melquiond: Assisted verification of elementary functions using Gappa. SAC 2006: 1318-1322
2005
16EEJérémie Detrey, Florent de Dinechin: Table-based polynomials for fast hardware function evaluation. ASAP 2005: 328-333
15 Jérémie Detrey, Florent de Dinechin: A Parameterized Floating-Point Exponential Function for FPGAs. FPT 2005: 27-34
14EEFlorent de Dinechin, Alexey V. Ershov, Nicolas Gast: Towards the Post-Ultimate libm. IEEE Symposium on Computer Arithmetic 2005: 288-295
13EEFlorent de Dinechin, Arnaud Tisserand: Multipartite Table Methods. IEEE Trans. Computers 54(3): 319-330 (2005)
12EEJérémie Detrey, Florent de Dinechin: Outils pour une comparaison sans a priori entre arithmétique logarithmique et arithmétique flottante. Technique et Science Informatiques 24(6): 625-643 (2005)
2004
11EEJérémie Detrey, Florent de Dinechin: Second Order Function Approximation Using a Single Multiplication on FPGAs. FPL 2004: 221-230
2003
10EEDavid Defour, Florent de Dinechin: Software Carry-Save: A Case Study for Instruction-Level Parallelism. PaCT 2003: 207-214
2002
9EEJérémie Detrey, Florent de Dinechin: Multipartite Tables in JBits for the Evaluation of Functions on FPGAs. IPDPS 2002
2001
8EEFlorent de Dinechin, Arnaud Tisserand: Some Improvements on Multipartite Table Methods . IEEE Symposium on Computer Arithmetic 2001: 128-135
2000
7 Florent de Dinechin, Vincent Lefèvre: Constant Multipliers for FPGAs. PDPTA 2000
6EEFlorent de Dinechin: The Price of Routing in FPGAs. J. UCS 6(2): 227-239 (2000)
1999
5EEFlorent de Dinechin, Wayne Luk, Steve McKeever: Towards Adaptable Hierarchical Placement for FPGAs. FPGA 1999: 254
1997
4EEFlorent de Dinechin: Libraries of schedule-free operators in Alpha. ASAP 1997: 239-
3 Florent de Dinechin, T. Risset, Sophie Robert: Hierarchical Static Analysis for Improving the Complexity of Linear Algebra Algorithms. PARCO 1997: 261-268
1996
2EEFlorent de Dinechin, Sophie Robert: Hierarchical Static Analysis Of Structured Systems Of Affine Recurrence Equations. ASAP 1996: 381-
1 Florent de Dinechin, Doran Wilde, Sanjay V. Rajopadhye, Rumen Andonov: A Regular VLSI Array for an Irregular Algorithm. IRREGULAR 1996: 195-200

Coauthor Index

1Rumen Andonov [1]
2Nicolas Brisebarre [29]
3Sylvain Collange [18]
4Laura Cret [28]
5Octavian Cret [27] [28]
6David Defour [10]
7Jérémie Detrey [9] [11] [12] [15] [16] [18] [19] [20] [21] [22] [23] [27]
8Milos D. Ercegovac [26]
9Alexey V. Ershov [14]
10Nicolas Gast [14]
11Christoph Quirin Lauter [17] [24] [25]
12Vincent Lefèvre [7]
13Wayne Luk [5]
14Steve McKeever [5]
15Guillaume Melquiond [17] [25]
16Jean-Michel Muller [26] [29]
17Xavier Pujol [21]
18Sanjay V. Rajopadhye [1]
19Nathalie Revol [26]
20T. Risset [3]
21Sophie Robert [2] [3]
22Arnaud Tisserand [8] [13]
23Ionut Trestian [28]
24Radu Tudoran [27] [28]
25Lucia Vacariu [28]
26Doran Wilde [1]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)