Wim Dehaene

2007
14	EE	Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich: Analog and Digital Circuit Design in 65 nm CMOS: End of the Road? CoRR abs/0710.4709: (2007)
13	EE	Bruno Bougard, Francky Catthoor, Denis C. Daly, Anantha Chandrakasan, Wim Dehaene: Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives CoRR abs/0710.4732: (2007)
2006
12	EE	Yves Vanderperren, Wim Dehaene: From UML/SysML to Matlab/Simulink: current state and future perspectives. DATE 2006: 93
11	EE	Wolfgang Mueller, Alberto Rosti, Sara Bocchio, Elvinia Riccobene, Patrizia Scandurra, Wim Dehaene, Yves Vanderperren: UML for ESL design: basic principles, tools, and applications. ICCAD 2006: 73-80
10	EE	Evelyn Grossar, Michele Stucchi, Karen Maex, Wim Dehaene: Statistically Aware SRAM Memory Array Design. ISQED 2006: 25-30
9	EE	Hua Wang, Miguel Miranda, Francky Catthoor, Wim Dehaene: On the Combined Impact of Soft and Medium Gate Oxide Breakdown and Process Variability on the Parametric Figures of SRAM components. MTDT 2006: 71-76
8	EE	Bruno Bougard, Sofie Pollin, Antoine Dejonghe, Francky Catthoor, Wim Dehaene: Cross-layer power management in wireless networks and consequences on system-level architecture. Signal Processing 86(8): 1792-1803 (2006)
2005
7	EE	Bruno Bougard, Francky Catthoor, Denis C. Daly, Anantha Chandrakasan, Wim Dehaene: Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives. DATE 2005: 196-201
6	EE	Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich: Analog and Digital Circuit Design in 65 nm CMOS: End of the Road? DATE 2005: 36-42
5	EE	Yves Vanderperren, Wim Dehaene: UML 2 and SysML: An Approach to Deal with Complexity in SoC/NoC Design. DATE 2005: 716-717
4	EE	Hua Wang, Miguel Miranda, Wim Dehaene, Francky Catthoor, Karen Maex: Systematic Analysis of Energy and Delay Impact of Very Deep Submicron Process Variability Effects in Embedded SRAM Modules. DATE 2005: 914-919
3	EE	Hua Wang, Miguel Miranda, Antonis Papanikolaou, Francky Catthoor, Wim Dehaene: Variable tapered pareto buffer design and implementation allowing run-time configuration for low-power embedded SRAMs. IEEE Trans. VLSI Syst. 13(10): 1127-1135 (2005)
2004
2	EE	Marian Verhelst, Wim Vereecken, Michiel Steyaert, Wim Dehaene: Architectures for low power ultra-wideband radio receivers in the 3.1-5GHz band for data rates < 10Mbps. ISLPED 2004: 280-285
2003
1	EE	Ali Sayinta, Gorkem Canverdi, Marc Pauwels, Amer Alshawa, Wim Dehaene: A Mixed Abstraction Level Co-Simulation Case Study Using SystemC for System on Chip Verification. DATE 2003: 20095-20100

Coauthor Index

1	Amer Alshawa	[1]
2	Sara Bocchio	[11]
3	Bruno Bougard	[7] [8] [13]
4	Gorkem Canverdi	[1]
5	Francky Catthoor	[3] [4] [7] [8] [9] [13]
6	Anantha Chandrakasan (Anantha P. Chandrakasan)	[7] [13]
7	Phillip Christie	[6] [14]
8	Denis C. Daly	[7] [13]
9	Antoine Dejonghe	[8]
10	Dieter Draxelmayr	[6] [14]
11	Georges G. E. Gielen	[6] [14]
12	Evelyn Grossar	[10]
13	Edmond Janssens	[6] [14]
14	Karen Maex	[4] [6] [10] [14]
15	Miguel Miranda	[3] [4] [9]
16	Wolfgang Mueller	[11]
17	Antonis Papanikolaou	[3]
18	Marc Pauwels	[1]
19	Sofie Pollin	[8]
20	Elvinia Riccobene	[11]
21	Alberto Rosti	[11]
22	Ali Sayinta	[1]
23	Patrizia Scandurra	[11]
24	Michiel Steyaert	[2]
25	Michele Stucchi	[10]
26	Yves Vanderperren	[5] [11] [12]
27	Wim Vereecken	[2]
28	Marian Verhelst	[2]
29	Ted Vucurevich	[6] [14]
30	Hua Wang	[3] [4] [9]

Colors in the list of coauthors