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Vivek De Vis

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*2009
62EEKeith A. Bowman, James Tschanz, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik, Vivek De, Shekhar Y. Borkar: Circuit techniques for dynamic variation tolerance. DAC 2009: 4-7
2008
61EEHamed F. Dadgour, Vivek De, Kaustav Banerjee: Statistical modeling of metal-gate work-function variability in emerging device technologies and implications for circuit design. ICCAD 2008: 270-277
60EEDiaaEldin Khalil, Yehea I. Ismail, Muhammad M. Khellah, Tanay Karnik, Vivek De: Analytical Model for the Propagation Delay of Through Silicon Vias. ISQED 2008: 553-556
2007
59EESteven M. Burns, Mahesh Ketkar, Noel Menezes, Keith A. Bowman, James Tschanz, Vivek De: Comparative Analysis of Conventional and Statistical Design Techniques. DAC 2007: 238-243
58EENavid Azizi, Muhammad M. Khellah, Vivek De, Farid N. Najm: Variations-Aware Low-Power Design and Block Clustering With Voltage Scaling. IEEE Trans. VLSI Syst. 15(7): 746-757 (2007)
2006
57EEYibin Ye, Muhammad M. Khellah, Dinesh Somasekhar, Vivek De: Evaluation of differential vs. single-ended sensing and asymmetric cells in 90 nm logic technology for on-chip caches. ISCAS 2006
56EEMaged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, Vivek De: Reducing the data switching activity of serialized datastreams. ISCAS 2006
55EEKeith A. Bowman, James Tschanz, Muhammad M. Khellah, Maged Ghoneima, Yehea I. Ismail, Vivek De: Time-borrowing multi-cycle on-chip interconnects for delay variation tolerance. ISLPED 2006: 79-84
54EEMaged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, Vivek De: Reducing the Data Switching Activity on Serial Link Buses. ISQED 2006: 425-432
53EEMaryam Ashouei, Abhijit Chatterjee, Adit D. Singh, Vivek De, T. M. Mak: Statistical Estimation of Correlated Leakage Power Variation and Its Application to Leakage-Aware Design. VLSI Design 2006: 606-612
52EEOsman S. Unsal, James Tschanz, Keith A. Bowman, Vivek De, Xavier Vera, Antonio González, Oguz Ergin: Impact of Parameter Variations on Circuits and Microarchitecture. IEEE Micro 26(6): 30-39 (2006)
51EEMaged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, James Tschanz, Vivek De: Formal derivation of optimal active shielding for low-power on-chip buses. IEEE Trans. on CAD of Integrated Circuits and Systems 25(5): 821-836 (2006)
2005
50EENavid Azizi, Muhammad M. Khellah, Vivek De, Farid N. Najm: Variations-aware low-power design with voltage scaling. DAC 2005: 529-534
49EEJames Tschanz, Keith A. Bowman, Vivek De: Variation-tolerant circuits: circuit solutions and techniques. DAC 2005: 762-763
48 Peter Suaris, Taeho Kgil, Keith A. Bowman, Vivek De, Trevor N. Mudge: Total power-optimal pipelining and parallel processing under process variations in nanometer technology. ICCAD 2005: 535-540
47 Maged Ghoneima, Yehea I. Ismail, Muhammad M. Khellah, James Tschanz, Vivek De: Serial-link bus: a low-power on-chip bus architecture. ICCAD 2005: 541-546
46EEMaryam Ashouei, Abhijit Chatterjee, Adit D. Singh, Vivek De: A Dual-Vt Layout Approach for Statistical Leakage Variability Minimization in Nanometer CMOS. ICCD 2005: 567-573
45EEVolkan Kursun, Gerhard Schrom, Vivek De, Eby G. Friedman, Siva Narendra: Cascode buffer for monolithic voltage conversion operating at high input supply voltages. ISCAS (1) 2005: 464-467
44EEYehea I. Ismail, Muhammad M. Khellah, Maged Ghoneima, James Tschanz, Yibin Ye, Vivek De: Skewing adjacent line repeaters to reduce the delay and energy dissipation of on-chip buses. ISCAS (1) 2005: 592-595
43EEJames Tschanz, Siva Narendra, Ali Keshavarzi, Vivek De: Adaptive circuit techniques to minimize variation impacts on microprocessor performance and power. ISCAS (1) 2005: 9-12
42EEAli Keshavarzi, Gerhard Schrom, Stephen Tang, Sean Ma, Keith A. Bowman, Sunit Tyagi, Kevin Zhang, Tom Linton, Nagib Hakim, Steven G. Duvall, John Brews, Vivek De: Measurements and modeling of intrinsic fluctuations in MOSFET threshold voltage. ISLPED 2005: 26-29
41EEVolkan Kursun, Vivek De, Eby G. Friedman, Siva G. Narendra: Monolithic voltage conversion in low-voltage CMOS technologies. Microelectronics Journal 36(9): 863-867 (2005)
2004
40EEArman Vassighi, Ali Keshavarzi, Siva Narendra, Gerhard Schrom, Yibin Ye, Seri Lee, Greg Chrysler, Manoj Sachdev, Vivek De: Design optimizations for microprocessors at low temperature. DAC 2004: 2-5
39EEShekhar Borkar, Tanay Karnik, Vivek De: Design and reliability challenges in nanometer technologies. DAC 2004: 75
38EEGerhard Schrom, Peter Hazucha, Jae-Hong Hahn, Volkan Kursun, Donald S. Gardner, Siva Narendra, Tanay Karnik, Vivek De: Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation. ISLPED 2004: 263-268
37EEVolkan Kursun, Siva Narendra, Vivek De, Eby G. Friedman: High Input Voltage Step-Down DC-DC Converters for Integration in a Low Voltage CMOS Process. ISQED 2004: 517-521
2003
36EEShekhar Borkar, Tanay Karnik, Siva Narendra, James Tschanz, Ali Keshavarzi, Vivek De: Parameter variations and impact on circuits and microarchitecture. DAC 2003: 338-342
35EEWei Zhang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Vivek De: Compiler Support for Reducing Leakage Energy Consumption. DATE 2003: 11146-11147
34EEStephen Tang, Siva Narendra, Vivek De: Temperature and process invariant MOS-based reference current generation circuits for sub-1V operation. ISLPED 2003: 199-204
33EEVolkan Kursun, Siva Narendra, Vivek De, Eby G. Friedman: Monolithic DC-DC Converter Analysis And Mosfet Gate Voltage Optimization. ISQED 2003: 279-
32EEVolkan Kursun, Siva G. Narendra, Vivek De, Eby G. Friedman: Analysis of buck converters for on-chip integration with a dual supply voltage microprocessor. IEEE Trans. VLSI Syst. 11(3): 514-522 (2003)
31EEVivek De, Luca Benini: Guest editorial. IEEE Trans. VLSI Syst. 11(5): 753-754 (2003)
30EEAli Keshavarzi, Kaushik Roy, Charles F. Hawkins, Vivek De: Multiple-parameter CMOS IC testing with increased sensitivity for IDDQ. IEEE Trans. VLSI Syst. 11(5): 863-870 (2003)
2002
29 Kanad Ghose, Patrick H. Madden, Vivek De, Peter M. Kogge: Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, New York, NY, USA, April 18-19, 2002 ACM 2002
28 Vivek De, Mary Jane Irwin, Ingrid Verbauwhede, Christian Piguet: Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002 ACM 2002
27EETanay Karnik, Yibin Ye, James Tschanz, Liqiong Wei, Steven M. Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar: Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors. DAC 2002: 486-491
26EEGeorge Sery, Shekhar Borkar, Vivek De: Life is CMOS: why chase the life after? DAC 2002: 78-83
25EETanay Karnik, Shekhar Borkar, Vivek De: Sub-90nm technologies: challenges and opportunities for CAD. ICCAD 2002: 203-206
24EESiva Narendra, Vivek De, Shekhar Borkar, Dimitri Antoniadis, Anantha Chandrakasan: Full-chip sub-threshold leakage power prediction model for sub-0.18 µm CMOS. ISLPED 2002: 19-23
23EEVivek De: Leakage-tolerant design techniques for high performance processors. ISPD 2002: 28-28
22EERon Wilson, Siva Narendra, Vivek De: Evening Panel Discussion: Process Variation: Is It Too Much to Handle? ISQED 2002: 213-
21EEJaume Segura, Vivek De, Ali Keshavarzi: Challenges in Nanometric Technology Scaling: Trends and Projections. VTS 2002: 447-448
20EEAli Keshavarzi, James Tschanz, Siva Narendra, Vivek De, W. Robert Daasch, Kaushik Roy, Manoj Sachdev, Charles F. Hawkins: Leakage and Process Variation Effects in Current Testing on Future CMOS Circuits. IEEE Design & Test of Computers 19(5): 36-43 (2002)
19EEFatih Hamzaoglu, Yibin Ye, Ali Keshavarzi, Kevin Zhang, Siva Narendra, Shekhar Borkar, Mircea R. Stan, Vivek De: Analysis of dual-VT SRAM cells with full-swing single-ended bit line sensing for on-chip cache. IEEE Trans. VLSI Syst. 10(2): 91-95 (2002)
2001
18 Enrico Macii, Vivek De, Mary Jane Irwin: Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001, Huntington Beach, California, USA, 2001 ACM 2001
17EEJames Tschanz, Siva Narendra, Zhanping Chen, Shekhar Borkar, Manoj Sachdev, Vivek De: Comparative delay and energy of single edge-triggered & dual edge-triggered pulsed flip-flops for high-performance microprocessors. ISLPED 2001: 147-152
16EESiva Narendra, Vivek De, Dimitri Antoniadis, Anantha Chandrakasan, Shekhar Borkar: Scaling of stack effect and its application for leakage reduction. ISLPED 2001: 195-200
15EEAli Keshavarzi, Sean Ma, Siva Narendra, B. Bloechel, K. Mistry, T. Ghani, Shekhar Borkar, Vivek De: Effectiveness of reverse body bias for leakage control in scaled dual Vt CMOS ICs. ISLPED 2001: 207-212
2000
14EEVivek De, Shekhar Borkar: Low power and high performance design challenges in future technologies. ACM Great Lakes Symposium on VLSI 2000: 1-6
13EEDinesh Somasekhar, Seung Hoon Choi, Kaushik Roy, Yibin Ye, Vivek De: Dynamic noise analysis in precharge-evaluate circuits. DAC 2000: 243
12 Ali Keshavarzi, Kaushik Roy, Charles F. Hawkins, Manoj Sachdev, K. Soumyanath, Vivek De: Multiple-parameter CMOS IC testing with increased sensitivity for I_DDQ. ITC 2000: 1051-1059
11EELiqiong Wei, Kaushik Roy, Vivek De: Low Voltage Low Power CMOS Design Techniques for Deep Submicron ICs. VLSI Design 2000: 24-29
1999
10EELiqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye, Vivek De: Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications. DAC 1999: 430-435
9EEVivek De, Shekhar Borkar: Technology and design challenges for low power and high performance. ISLPED 1999: 163-168
8EEAli Keshavarzi, Siva Narendra, Shekhar Borkar, Charles F. Hawkins, Kaushik Roy, Vivek De: Technology scaling behavior of optimum reverse body bias for standby leakage power reduction in CMOS IC's. ISLPED 1999: 252-254
7EELiqiong Wei, Zhanping Chen, Kaushik Roy, Mark C. Johnson, Yibin Ye, Vivek De: Design and optimization of dual-threshold circuits for low-voltage low-power applications. IEEE Trans. VLSI Syst. 7(1): 16-24 (1999)
1998
6EELiqiong Wei, Zhanping Chen, Mark Johnson, Kaushik Roy, Vivek De: Design and Optimization of Low Voltage High Performance Dual Threshold CMOS Circuits. DAC 1998: 489-494
1997
5EEPankaj Pant, Vivek De, Abhijit Chatterjee: Device-Circuit Optimization for Minimal Energy and Power Consumption in CMOS Random Logic Networks. DAC 1997: 403-408
4EEXinghai Tang, Vivek De, James D. Meindl: Intrinsic MOSFET parameter fluctuations due to random dopant placement. IEEE Trans. VLSI Syst. 5(4): 369-376 (1997)
1996
3EEAzeez J. Bhavnagarwala, Vivek De, Blanca Austin, James D. Meindl: Circuit techniques for low-power CMOS GSI. ISLPED 1996: 193-196
2EEXinghai Tang, Vivek De, James D. Meindl: Effects of random MOSFET parameter fluctuations on total power consumption. ISLPED 1996: 233-236
1EEVivek De, James D. Meindl: A dynamic energy recycling logic family for ultra-low-power gigascale integration (GSI). ISLPED 1996: 371-375

Coauthor Index

1Dimitri Antoniadis [16] [24]
2Maryam Ashouei [46] [53]
3Blanca Austin [3]
4Navid Azizi [50] [58]
5Kaustav Banerjee [61]
6Luca Benini [31]
7Azeez J. Bhavnagarwala [3]
8B. Bloechel [15]
9Shekhar Y. Borkar (Shekhar Borkar) [8] [9] [14] [15] [16] [17] [19] [24] [25] [26] [27] [36] [39] [62]
10Keith A. Bowman [42] [48] [49] [52] [55] [59] [62]
11John Brews [42]
12Steven M. Burns [27] [59]
13Anantha Chandrakasan (Anantha P. Chandrakasan) [16] [24]
14Abhijit Chatterjee [5] [46] [53]
15Zhanping Chen [6] [7] [10] [17]
16Seung Hoon Choi [13]
17Greg Chrysler [40]
18W. Robert Daasch [20]
19Hamed F. Dadgour [61]
20Steven G. Duvall [42]
21Oguz Ergin [52]
22Eby G. Friedman [32] [33] [37] [41] [45]
23Donald S. Gardner [38]
24T. Ghani [15]
25Maged Ghoneima [44] [47] [51] [54] [55] [56]
26Kanad Ghose [29]
27Antonio González [52]
28Venkatesh Govindarajulu [27]
29Jae-Hong Hahn [38]
30Nagib Hakim [42]
31Fatih Hamzaoglu [19]
32Charles F. Hawkins [8] [12] [20] [30]
33Peter Hazucha [38]
34Mary Jane Irwin [18] [28] [35]
35Yehea I. Ismail [44] [47] [51] [54] [55] [56] [60]
36Mark Johnson [6]
37Mark C. Johnson [7]
38Mahmut T. Kandemir [35]
39Tanay Karnik [25] [27] [36] [38] [39] [60] [62]
40Ali Keshavarzi [8] [12] [15] [19] [20] [21] [30] [36] [40] [42] [43]
41Mahesh Ketkar [59]
42Taeho Kgil [48]
43DiaaEldin Khalil [60]
44Muhammad M. Khellah [44] [47] [50] [51] [54] [55] [56] [57] [58] [60]
45Peter M. Kogge [29]
46Volkan Kursun [32] [33] [37] [38] [41] [45]
47Seri Lee [40]
48Tom Linton [42]
49Shih-Lien Lu [62]
50Sean Ma [15] [42]
51Enrico Macii [18]
52Patrick H. Madden [29]
53T. M. Mak [53]
54James D. Meindl [1] [2] [3] [4]
55Noel Menezes [59]
56K. Mistry [15]
57Trevor N. Mudge [48]
58Farid N. Najm [50] [58]
59Siva Narendra [8] [15] [16] [17] [19] [20] [22] [24] [33] [34] [36] [37] [38] [40] [43] [45]
60Siva G. Narendra [32] [41]
61Pankaj Pant [5]
62Christian Piguet [28]
63Kaushik Roy [6] [7] [8] [10] [11] [12] [13] [20] [30]
64Manoj Sachdev [12] [17] [20] [40]
65Gerhard Schrom [38] [40] [42] [45]
66Jaume Segura [21]
67George Sery [26]
68Adit D. Singh [46] [53]
69Dinesh Somasekhar [13] [57]
70K. Soumyanath [12]
71Mircea R. Stan [19]
72Peter Suaris (Peter Ramyalal Suaris) [48]
73Stephen Tang [34] [42]
74Xinghai Tang [2] [4]
75James Tschanz [17] [20] [27] [36] [43] [44] [47] [49] [51] [52] [55] [59] [62]
76Sunit Tyagi [42]
77Osman S. Unsal [52]
78Arman Vassighi [40]
79Xavier Vera [52]
80Ingrid Verbauwhede [28]
81Narayanan Vijaykrishnan (Vijaykrishnan Narayanan) [35]
82Liqiong Wei [6] [7] [10] [11] [27]
83Chris Wilkerson [62]
84Ron Wilson [22]
85Yibin Ye [7] [10] [13] [19] [27] [40] [44] [57]
86Kevin Zhang [19] [42]
87Wei Zhang [35]

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)