Luigi Dadda

2007
14	EE	Luigi Dadda: Multioperand Parallel Decimal Adder: A Mixed Binary and BCD Approach. IEEE Trans. Computers 56(10): 1320-1328 (2007)
2005
13	EE	Marco Macchetti, Luigi Dadda: Quasi-Pipelined Hash Circuits. IEEE Symposium on Computer Arithmetic 2005: 222-229
2004
12	EE	Luigi Dadda, Marco Macchetti, Jeff Owen: An ASIC design for a high speed implementation of the hash function SHA-256 (384, 512). ACM Great Lakes Symposium on VLSI 2004: 421-425
11	EE	Luigi Dadda, Marco Macchetti, Jeff Owen: The Design of a High Speed ASIC Unit for the Hash Function SHA-256 (384, 512). DATE 2004: 70-75
1998
10	EE	Luca Breveglieri, Luigi Dadda: A VLSI inner product macrocell. IEEE Trans. VLSI Syst. 6(2): 292-298 (1998)
1997
9	EE	Luca Breveglieri, Luigi Dadda, Vincenzo Piuri: Fast Arithmetic and Fault Tolerance in the FERMI System. ASAP 1997: 374-383
1996
8		Luigi Dadda, Vincenzo Piuri: Pipelined Adders. IEEE Trans. Computers 45(3): 348-356 (1996)
1995
7	EE	Luca Breveglieri, Luigi Dadda, Vincenzo Piuri: Column Compression Pipelined Multipliers. ASAP 1995: 93-103
1994
6		Luigi Dadda, Vincenzo Piuri: Fault-Tolerant Modular Convolves. DFT 1994: 37-45
1993
5		A. Dell'Acqua, M. Hansen, S. Inkinen, B. Lofstedt, J. P. Vanuxem, Christer Svensson, Jiren Yuan, H. Hentzell, L. Del Buono, J. David, J. F. Genat, H. Lebbolo, O. LeDortz, P. Nayman, A. Savoy-Navarro, R. Zitoun, Cesare Alippi, Luca Breveglieri, Luigi Dadda, Vincenzo Piuri, Fabio Salice, Mariagiovanna Sami, Renato Stefanelli, P. Cattaneo, G. Fumagalli, G. Goggi, S. Brigati, Umberto Gatti, Franco Maloberti, Guido Torelli, P. Carlson, A. Kerek, Goran Appelquist, S. Berglund, C. Bohm, Magnus Engström, N. Yamdagni, Rolf Sundblad, I. Höglund, S. T. Persson: System Level Policies for Fault Tolerance Issues in the FERMI Project. DFT 1993: 1-8
4	EE	Luigi Dadda, Vincenzo Piuri, Renato Stefanelli: Multi-parallel convolvers. IEEE Symposium on Computer Arithmetic 1993: 70-77
3		Luigi Dadda: A Simplified High Speed Parallel Input Convolver. VLSI Design 1993: 160-165
1989
2		Luigi Dadda: On Serial-Input Multipliers for Two's Complement Numbers. IEEE Trans. Computers 38(9): 1341-1345 (1989)
1980
1		Luigi Dadda: Composite Parallel Counters. IEEE Trans. Computers 29(10): 942-946 (1980)

Coauthor Index

1	Cesare Alippi	[5]
2	Goran Appelquist	[5]
3	S. Berglund	[5]
4	C. Bohm	[5]
5	Luca Breveglieri	[5] [7] [9] [10]
6	S. Brigati	[5]
7	L. Del Buono	[5]
8	P. Carlson	[5]
9	P. Cattaneo	[5]
10	J. David	[5]
11	A. Dell'Acqua	[5]
12	Magnus Engström	[5]
13	G. Fumagalli	[5]
14	Umberto Gatti	[5]
15	J. F. Genat	[5]
16	G. Goggi	[5]
17	M. Hansen	[5]
18	H. Hentzell	[5]
19	I. Höglund	[5]
20	S. Inkinen	[5]
21	A. Kerek	[5]
22	O. LeDortz	[5]
23	H. Lebbolo	[5]
24	B. Lofstedt	[5]
25	Marco Macchetti	[11] [12] [13]
26	Franco Maloberti	[5]
27	P. Nayman	[5]
28	Jeff Owen	[11] [12]
29	S. T. Persson	[5]
30	Vincenzo Piuri	[4] [5] [6] [7] [8] [9]
31	Fabio Salice	[5]
32	Mariagiovanna Sami	[5]
33	A. Savoy-Navarro	[5]
34	Renato Stefanelli	[4] [5]
35	Rolf Sundblad	[5]
36	Christer Svensson	[5]
37	Guido Torelli	[5]
38	J. P. Vanuxem	[5]
39	N. Yamdagni	[5]
40	Jiren Yuan	[5]
41	R. Zitoun	[5]