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David Cyrluk Vis

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*1997
10EEDavid Cyrluk, M. Oliver Möller, Harald Rueß: An Efficient Decision Procedure for the Theory of Fixed-Sized Bit-Vectors. CAV 1997: 60-71
9 Mandayam K. Srivas, Harald Rueß, David Cyrluk: Hardware Verification Using PVS. Formal Hardware Verification 1997: 156-205
8 David Cyrluk, John M. Rushby, Mandayam K. Srivas: Systematic Formal Verification of Interpreters. ICFEM 1997: 140-
1996
7EEDavid Cyrluk, Patrick Lincoln, Natarajan Shankar: On Shostak's Decision Procedure for Combinations of Theories. CADE 1996: 463-477
6 David Cyrluk: Inverting the Abstraction Mapping: A Methodology for Hardware Verification. FMCAD 1996: 172-186
1995
5EEDavid Cyrluk, Mandayam K. Srivas: Theorem proving: not an esoteric diversion, but the unifying framework for industrial verification. ICCD 1995: 538-
1994
4EEDavid Cyrluk, Paliath Narendran: Ground Temporal Logic: A Logic for Hardware Verification. CAV 1994: 247-259
3 David Cyrluk, S. Rajan, Natarajan Shankar, Mandayam K. Srivas: Effective Theorem Proving for Hardware Verification. TPCD 1994: 203-222
1988
2EEDavid Cyrluk, Richard M. Harris, Deepak Kapur: GEOMETER: A Theorem Prover for Algebraic Geometry. CADE 1988: 770-771
1 Michele Barry, David Cyrluk, Deepak Kapur, Joseph L. Mundy, Van-Duc Nguyen: A Multi-Level Geometric Reasoning System for Vision. Artif. Intell. 37(1-3): 291-332 (1988)

Coauthor Index

1Michele Barry [1]
2Richard M. Harris [2]
3Deepak Kapur [1] [2]
4Patrick Lincoln [7]
5M. Oliver Möller [10]
6Joseph L. Mundy [1]
7Paliath Narendran [4]
8Van-Duc Nguyen [1]
9S. Rajan [3]
10Harald Rueß [9] [10]
11John M. Rushby [8]
12Natarajan Shankar [3] [7]
13Mandayam K. Srivas [3] [5] [8] [9]

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)