| 1997 |
|---|
| 9 | | David Cyrluk,
M. Oliver Möller,
Harald Rueß:
An Efficient Decision Procedure for the Theory of Fixed-Sized Bit-Vectors.
CAV 1997: 60-71 |
| 8 | | Mandayam K. Srivas,
Harald Rueß,
David Cyrluk:
Hardware Verification Using PVS.
Formal Hardware Verification 1997: 156-205 |
| 7 | | David Cyrluk,
John M. Rushby,
Mandayam K. Srivas:
Systematic Formal Verification of Interpreters.
ICFEM 1997: 140- |
| 1996 |
|---|
| 6 | | David Cyrluk,
Patrick Lincoln,
Natarajan Shankar:
On Shostak's Decision Procedure for Combinations of Theories.
CADE 1996: 463-477 |
| 5 | | David Cyrluk:
Inverting the Abstraction Mapping: A Methodology for Hardware Verification.
FMCAD 1996: 172-186 |
| 1994 |
|---|
| 4 | | David Cyrluk,
Paliath Narendran:
Ground Temporal Logic: A Logic for Hardware Verification.
CAV 1994: 247-259 |
| 3 | | David Cyrluk,
S. Rajan,
Natarajan Shankar,
Mandayam K. Srivas:
Effective Theorem Proving for Hardware Verification.
TPCD 1994: 203-222 |
| 1988 |
|---|
| 2 | | David Cyrluk,
Richard M. Harris,
Deepak Kapur:
GEOMETER: A Theorem Prover for Algebraic Geometry.
CADE 1988: 770-771 |
| 1 | | Michele Barry,
David Cyrluk,
Deepak Kapur,
Joseph L. Mundy,
Van-Duc Nguyen:
A Multi-Level Geometric Reasoning System for Vision.
Artif. Intell. 37(1-3): 291-332 (1988) |
