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Oliver Chiu-sing Choy Vis

Chiu-sing Choy

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*2008
42EEMin Zhang, Chiu-sing Choy: Low-Cost VC Allocator Design for Virtual Channel Wormhole Routers in Networks-on-Chip. NOCS 2008: 207-208
41EEKe Xu, Chiu-sing Choy: A Five-Stage Pipeline, 204 Cycles/MB, Single-Port SRAM-Based Deblocking Filter for H.264/AVC. IEEE Trans. Circuits Syst. Video Techn. 18(3): 363-374 (2008)
40EEKe Xu, Oliver Chiu-sing Choy: A Power-Efficient and Self-Adaptive Prediction Engine for H.264/AVC Decoding. IEEE Trans. VLSI Syst. 16(3): 302-313 (2008)
2007
39EEKe Xu, Chiu-sing Choy: Low-power H.264/AVC baseline decoder for portable applications. ISLPED 2007: 256-261
38EEWei Han, Kwok-Wai Hon, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A Speech Recognition IC Using Hidden Markov Models with Continuous Observation Densities. VLSI Signal Processing 47(3): 223-232 (2007)
2006
37EEWang-Chi Cheng, Cheong-fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy: Sub-1 V Current Mode CMOS Integrated Receiver Front-end for GPS System. APCCAS 2006: 195-198
36EEKing-Keung Mok, Ka-Hung Tsang, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: Adiabatic Smart Card. APCCAS 2006: 287-290
35EEWang-Chi Cheng, Cheong-fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy: 0.8 V GPS band CMOS VCO with 29% Tuning Range. APCCAS 2006: 522-525
34EEXiao-Yong He, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan: A 0.5V fully differential OTA with local common feedback. ISCAS 2006
33EEChi-Hong Chan, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A 6-digit CMOS current-mode analog-to-quaternary converter with RSD error correction algorithm. ISCAS 2006
32EESiu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan: A fully differential low noise amplifier with real-time channel hopping for ultra-wideband wireless applications. ISCAS 2006
31EEAlex Wong, Kong-Pang Pun, Yuan-Ting Zhang, Oliver Chiu-sing Choy: An ECG measurement IC using driven-right-leg circuit. ISCAS 2006
30EEWei Han, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: An efficient MFCC extraction method in speech recognition. ISCAS 2006
29EEPak-Keung Leung, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: An optimal normal basis elliptic curve cryptoprocessor for inductive RFID application. ISCAS 2006
28EEKe Xu, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder. ISCAS 2006
2005
27EEPui-Tak So, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: Ramp voltage supply using adiabatic charging principle. ISCAS (3) 2005: 2152-2155
26EENang-Ching Yeung, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan: Active RC filter with reduced capacitance by current division technique. ISCAS (4) 2005: 3279-3282
25EEChi-Leung San, Chiu-sing Choy, Pak-Kee Chan, Cheong-fat Chan, Kong-Pang Pun: Realization of card-centric framework: a card-centric computer [smart cards]. ISCAS (5) 2005: 4999-5002
24EEWei Han, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: A speech recognizer with selectable model parameters. ISCAS (6) 2005: 5842-5845
2004
23EEChun-Pong Yu, Chiu-sing Choy, Hao Min, Cheong-fat Chan, Kong-Pang Pun: A low power asynchronous Java processor for contactless smart card. ASP-DAC 2004: 553-554
22 Pak-Kee Chan, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: Card-Centric Framework - Providing I/O Resources for Smart Cards. CARDIS 2004: 225-240
21EEWang Tung Cheng, Kong-Pang Pun, Cheong-fat Chan, Chiu-sing Choy: An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharing. ISCAS (1) 2004: 1140-1143
20 Wing-Kin Chan, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: An asynchronous SOVA decoder for wireless communication application. ISCAS (2) 2004: 517-520
19EEJing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Pipelines in Dynamic Dual-Rail Circuits. PATMOS 2004: 701-710
18EEJing-ling Yang, Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: A high-efficiency strongly self-checking asynchronous datapath. IEEE Trans. on CAD of Integrated Circuits and Systems 23(10): 1484-1494 (2004)
17EEHongwei Wang, Cheong-fat Chan, Chiu-sing Choy: High Speed Curve Interpolating D/A Converter. VLSI Signal Processing 38(1): 5-11 (2004)
2003
16EEW. K. Yeung, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: Clock recovery circuit with adiabatic technology (quasi-static CMOS logic). ISCAS (2) 2003: 185-187
15EEWei Han, Kwok-Wai Hon, Cheong-fat Chan, Tan Lee, Chiu-sing Choy, Kong-Pang Pun, Pak-Chung Ching: An HMM-based speech recognition IC. ISCAS (2) 2003: 744-747
14EEPak-Keung Leung, Chiu-sing Choy, Cheong-fat Chan, Kong-Pang Pun: A low power asynchronous GF(2/sup 173/) ALU for elliptic curve crypto-processor. ISCAS (5) 2003: 337-340
13EEJing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Design for Self-Checking and Self-Timed Datapath. VTS 2003: 417-430
2002
12EEWang-Chi Cheng, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A 900 MHz 1.2 V CMOS mixer with high linearity. APCCAS (1) 2002: 1-4
11EEJing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: A Totally Self-Checking Dynamic Asynchronous Datapath. Asian Test Symposium 2002: 27-32
10EEKin-Pui Ho, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun: A CMOS current feedback operational amplifier with active current mode compensation. ISCAS (1) 2002: 709-712
9EEHongwei Wang, Cheong-fat Chan, Chiu-sing Choy: A 12-bit 80 Ms/s 110 mW floating analog-to-digital converter. ISCAS (3) 2002: 137-140
8EEKong-Pang Pun, Chiu-sing Choy, Cheong-fat Chan, José E. Franca: A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators. ISCAS (4) 2002: 221-224
7EEWang-Chi Cheng, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun: A 1.2 V 900 MHz CMOS mixer. ISCAS (5) 2002: 365-368
2001
6EEPui-Lam Siu, Chiu-sing Choy, Jan Butas, Cheong-fat Chan: A low power asynchronous DES. ISCAS (4) 2001: 538-541
5EELai-Kan Leung, Cheong-fat Chan, Oliver Chiu-sing Choy: A giga-hertz CMOS digital controlled oscillator. ISCAS (4) 2001: 610-613
4EEChi-Wai Lee, Chiu-sing Choy, Jan Butas, Cheong-fat Chan: A pipelined dataflow small micro-coded asynchronous processor and its application to DCT. ISCAS (4) 2001: 910-913
3EEOliver Chiu-sing Choy, Jan Butas, Juraj Povazanec, Cheong-fat Chan: A New Control Circuit for Asynchronous Micropipelines. IEEE Trans. Computers 50(9): 992-997 (2001)
1999
2 Juraj Povazanec, Oliver Chiu-sing Choy, Cheong-fat Chan, Jan Butas, Yeu-qiu Zhang, Jing-ling Yang, Tin-yan Tang: Pipelined Dataflow Architecture of a Small Processor. PDPTA 1999: 1217-1223
1998
1EEOliver Chiu-sing Choy, Tin-chak Pang, Juraj Povazanec, Cheong-fat Chan: A Useful Micropipeline Architecture to Implement DSP Algorithms. EUROMICRO 1998: 10212-

Coauthor Index

1Jan Butas [2] [3] [4] [6]
2Cheong-fat Chan [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [29] [30] [32] [33] [34] [35] [36] [37] [38]
3Chi-Hong Chan [33]
4Pak-Kee Chan [22] [25]
5Wing-Kin Chan [20]
6Wang Tung Cheng [21]
7Wang-Chi Cheng [7] [12] [35] [37]
8Pak-Chung Ching [15]
9José E. Franca [8]
10Wei Han [15] [24] [30] [38]
11Xiao-Yong He [34]
12Kin-Pui Ho [10]
13Kwok-Wai Hon [15] [38]
14Chi-Wai Lee [4]
15Tan Lee [15]
16Lai-Kan Leung [5]
17Pak-Keung Leung [14] [29]
18Hao Min [23]
19King-Keung Mok [36]
20Tin-chak Pang [1]
21Juraj Povazanec [1] [2] [3]
22Kong-Pang Pun [7] [8] [10] [12] [14] [15] [16] [20] [21] [22] [23] [24] [25] [26] [27] [29] [30] [31] [32] [33] [34] [35] [36] [37] [38]
23Kong-Pong Pun [11] [13] [18] [19] [28]
24Chi-Leung San [25]
25Pui-Lam Siu [6]
26Pui-Tak So [27]
27Siu-Kei Tang [32]
28Tin-yan Tang [2]
29Ka-Hung Tsang [36]
30Hongwei Wang [9] [17]
31Alex Wong [31]
32Ke Xu [28] [39] [40] [41]
33Jing-ling Yang [2] [11] [13] [18] [19]
34Nang-Ching Yeung [26]
35W. K. Yeung [16]
36Chun-Pong Yu [23]
37Min Zhang [42]
38Yeu-qiu Zhang [2]
39Yuan-Ting Zhang [31]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)