| |
| * | 2001 | |
|---|---|---|
| 4 | EE | Li-minn Ang, Hon Nin Cheung: Hardware implementation of the depth first search bit stream SPIHT system. ISCAS (4) 2001: 518-521 |
| 2000 | ||
| 3 | EE | Hon Nin Cheung, Li-minn Ang, Kamran Eshraghian: Parallel Architecture for the Implementation of the Embedded Zerotree Wavelet Algorithm. ACAC 2000: 3-8 |
| 1999 | ||
| 2 | EE | Maolin Tang, Kamran Eshraghian, Hon Nin Cheung: An Efficient Aopproach to Constrained Via Minimization for Two-Layer VLSI Routing. ASP-DAC 1999: 149-152 |
| 1 | EE | Li-minn Ang, Hon Nin Cheung, Kamran Eshraghian: VLSI decoder architecture for embedded zerotree wavelet algorithm. ISCAS (1) 1999: 141-144 |
| 1 | Li-minn Ang | [1] [3] [4] |
| 2 | Kamran Eshraghian | [1] [2] [3] |
| 3 | Maolin Tang | [2] |