dblp.uni-trier.dewww.uni-trier.de

Abhijit Chatterjee Vis

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo

*2009
200EEAbhilash Goyal, Madhavan Swaminathan, Abhijit Chatterjee: A novel self-healing methodology for RF Amplifier circuits based on oscillation principles. DATE 2009: 1656-1661
199EEAbhijit Chatterjee: Cognitive self-adaptive computing and communication systems: Test, control and adaptation. DDECS 2009: 2
198EEShyam Kumar Devarakond, Shreyas Sen, Abhijit Chatterjee: BIST assisted wideband digital compensation for MB-UWB transmitters. DDECS 2009: 84-89
197EEMuhammad Mudassar Nisar, Abhijit Chatterjee: Environment and Process Adaptive Low Power Wireless Baseband Signal Processing Using Dual Real-Time Feedback. VLSI Design 2009: 57-62
2008
196EEShreyas Sen, Vishwanath Natarajan, Rajarajan Senguttuvan, Abhijit Chatterjee: Pro-VIZOR: process tunable virtually zero margin low power adaptive RF for wireless systems. DAC 2008: 492-497
195EEHyun Choi, Abhijit Chatterjee: Digital bit stream jitter testing using jitter expansion. DATE 2008: 1468-1473
194EEShreyas Sen, Abhijit Chatterjee: Design of process variation tolerant radio frequency low noise amplifier. ISCAS 2008: 392-395
193EEMaryam Ashouei, Adit D. Singh, Abhijit Chatterjee: Reconfiguring CMOS as Pseudo N/PMOS for Defect Tolerance in Nano-Scale CMOS. VLSI Design 2008: 27-32
192EERajarajan Senguttuvan, Shreyas Sen, Abhijit Chatterjee: Concurrent Multi-Dimensional Adaptation for Low-Power Operation in Wireless Devices. VLSI Design 2008: 65-70
191EEMuhammad Mudassar Nisar, Rajarajan Senguttuvan, Abhijit Chatterjee: Adaptive Signal Scaling Driven Critical Path Modulation for Low Power Baseband OFDM Processors. VLSI Design 2008: 71-76
190EERajarajan Senguttuvan, Soumendu Bhattacharya, Abhijit Chatterjee: Fast Accurate Tests for Multi-Carrier Transceiver Specifications: EVM and Noise. VTS 2008: 175-180
189EEVishwanath Natarajan, Rajarajan Senguttuvan, Shreyas Sen, Abhijit Chatterjee: ACT: Adaptive Calibration Test for Performance Enhancement and Increased Testability of Wireless RF Front-Ends. VTS 2008: 215-220
188EEMuhammad Mudassar Nisar, Abhijit Chatterjee: Test Enabled Process Tuning for Adaptive Baseband OFDM Processor. VTS 2008: 9-16
187EEGanesh Srinivasan, Friedrich Taenzler, Abhijit Chatterjee: Loopback DFT for Low-Cost Test of Single-VCO-Based Wireless Transceivers. IEEE Design & Test of Computers 25(2): 150-159 (2008)
186EEAchintya Halder, Soumendu Bhattacharya, Abhijit Chatterjee: System-Level Specification Testing Of Wireless Transceivers. IEEE Trans. VLSI Syst. 16(3): 263-276 (2008)
185EERamyanshu Datta, Jacob A. Abraham, Abdulkadir Utku Diril, Abhijit Chatterjee, Kevin J. Nowka: Performance-Optimized Design for Parametric Reliability. J. Electronic Testing 24(1-3): 129-141 (2008)
184EEShalabh Goyal, Abhijit Chatterjee: Linearity Testing of A/D Converters Using Selective Code Measurement. J. Electronic Testing 24(6): 567-576 (2008)
2007
183EESelim Sermet Akbay, Abhijit Chatterjee: Fault-based alternate test of RF components. ICCD 2007: 518-525
182EERajarajan Senguttuvan, Shreyas Sen, Abhijit Chatterjee: VIZOR: Virtually zero margin adaptive RF for ultra low power wireless communication. ICCD 2007: 580-586
181EEMuhammad Mudassar Nisar, Maryam Ashouei, Abhijit Chatterjee: Probabilistic Concurrent Error Compensation in Nonlinear Digital Filters Using Linearized Checksums. IOLTS 2007: 173-182
180EEMaryam Ashouei, Muhammad Mudassar Nisar, Abhijit Chatterjee, Adit D. Singh, Abdulkadir Utku Diril: Probabilistic Self-Adaptation of Nanoscale CMOS Circuits: Yield Maximization under Increased Intra-Die Variations. VLSI Design 2007: 711-716
179EEHyun Choi, Donghoon Han, Abhijit Chatterjee: Enhanced Resolution Jitter Testing Using Jitter Expansion. VTS 2007: 104-109
178EEMaryam Ashouei, Soumendu Bhattacharya, Abhijit Chatterjee: Probabilistic Compensation for Digital Filters Using Pervasive Noise-Induced Operator Errors. VTS 2007: 125-130
177EERajarajan Senguttuvan, Abhijit Chatterjee: Alternate Diagnostic Testing and Compensation of RF Transmitter Performance Using Response Detection. VTS 2007: 395-400
176EEYuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee: Soft-Error Tolerance Analysis and Optimization of Nanometer Circuits CoRR abs/0710.4720: (2007)
175EEShalabh Goyal, Abhijit Chatterjee, Michael Purtell: A Low-Cost Test Methodology for Dynamic Specification Testing of High-Speed Data Converters. J. Electronic Testing 23(1): 95-106 (2007)
174EEYuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee: Delay-Assignment-Variation Based Optimization of Digital CMOS Circuits for Low Power Consumption. J. Low Power Electronics 3(1): 78-95 (2007)
2006
173EEGanesh Srinivasan, Friedrich Taenzler, Abhijit Chatterjee: Online RF checkers for diagnosing multi-gigahertz automatic test boards on low cost ATE platforms. DATE 2006: 658-663
172EERamyanshu Datta, Jacob A. Abraham, Abdulkadir Utku Diril, Abhijit Chatterjee, Kevin J. Nowka: Adaptive Design for Performance-Optimized Robustness. DFT 2006: 3-11
171EEShalabh Goyal, Abhijit Chatterjee, Mike Atia: Reducing Sampling Clock Jitter to Improve SNR Measurement of A/D Converters in Production Test. European Test Symposium 2006: 165-172
170EEDonghoon Han, Shalabh Goyal, Soumendu Bhattacharya, Abhijit Chatterjee: Low Cost Parametric Failure Diagnosis of RF Transceivers. European Test Symposium 2006: 205-212
169EEMaryam Ashouei, Soumendu Bhattacharya, Abhijit Chatterjee: Improving SNR for DSM Linear Systems Using Probabilistic Error Correction and State Restoration: A Comparative Study. European Test Symposium 2006: 35-42
168EEAbhijit Chatterjee: Application of the Reactivity Index to Propose Intra and Intermolecular Reactivity in Catalytic Materials. International Conference on Computational Science (3) 2006: 77-81
167EEAchintya Halder, Abhijit Chatterjee: Low-Cost Production Testing of Wireless Transmitters. VLSI Design 2006: 437-442
166EEMaryam Ashouei, Abhijit Chatterjee, Adit D. Singh, Vivek De, T. M. Mak: Statistical Estimation of Correlated Leakage Power Variation and Its Application to Leakage-Aware Design. VLSI Design 2006: 606-612
165EESoumendu Bhattacharya, Vishwanath Natarajan, Abhijit Chatterjee, Sankar Nair: Efficient DNA Sensing with Fabricated Silicon Nanopores: Diagnosis Methodology and Algorithms. VLSI Design 2006: 729-733
164EEVishwanath Natarajan, Soumendu Bhattacharya, Abhijit Chatterjee: Alternate Electrical Tests for Extracting Mechanical Parameters of MEMS Accelerometer Sensors. VTS 2006: 192-199
163EEMaryam Ashouei, Soumendu Bhattacharya, Abhijit Chatterjee: Design of Soft Error Resilient Linear Digital Filters Using Checksum-Based Probabilistic Error Correction. VTS 2006: 208-213
162EEGanesh Srinivasan, Abhijit Chatterjee, Friedrich Taenzler: Alternate Loop-Back Diagnostic Tests for Wafer-Level Diagnosis of Modern Wireless Transceivers using Spectral Signatures. VTS 2006: 222-227
161EESoumendu Bhattacharya, Abhijit Chatterjee: A DFT Approach for Testing Embedded Systems Using DC Sensors. IEEE Design & Test of Computers 23(6): 464-475 (2006)
160EEYuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee, Adit D. Singh: Analysis and Optimization of Nanometer CMOS Circuits for Soft-Error Tolerance. IEEE Trans. VLSI Syst. 14(5): 514-524 (2006)
159EEXiangdong Xuan, Adit D. Singh, Abhijit Chatterjee: Lifetime Prediction and Design-for-Reliability of IC Interconnections with Electromigration Induced Degradation in the Presence of Manufacturing Defects. J. Electronic Testing 22(4-6): 471-482 (2006)
2005
158EEAbdulkadir Utku Diril, Yuvraj Singh Dhillon, Abhijit Chatterjee, Adit D. Singh: Low-power domino circuits using NMOS pull-up on off-critical paths. ASP-DAC 2005: 533-538
157EEDonghoon Han, Abhijit Chatterjee: Robust Built-In Test of RF ICs Using Envelope Detectors. Asian Test Symposium 2005: 2-7
156EEAchintya Halder, Abhijit Chatterjee: Low-cost Production Test of BER for Wireless Receivers. Asian Test Symposium 2005: 64-69
155 Chung-Seok (Andy) Seo, Abhijit Chatterjee, Timothy J. Drabik, Behnam S. Arad, Reena Patel: Prototyping an Embedded Bus-Based Parallel System. Computers and Their Applications 2005: 314-319
154EEYuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee: Soft-Error Tolerance Analysis and Optimization of Nanometer Circuits. DATE 2005: 288-293
153EEMaryam Ashouei, Abhijit Chatterjee, Adit D. Singh, Vivek De: A Dual-Vt Layout Approach for Statistical Leakage Variability Minimization in Nanometer CMOS. ICCD 2005: 567-573
152EEDonghoon Han, Selim Sermet Akbay, Soumendu Bhattacharya, Abhijit Chatterjee, William R. Eisenstadt: On-Chip Self-Calibration of RF Circuits Using Specification-Driven Built-In Self Test (S-BIST). IOLTS 2005: 106-111
151EEJosé Manuel Cazeaux, Daniele Rossi, Martin Omaña, Cecilia Metra, Abhijit Chatterjee: On Transistor Level Gate Sizing for Increased Robustness to Transient Faults. IOLTS 2005: 23-28
150EEYuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee, Cecilia Metra: Load and Logic Co-Optimization for Design of Soft-Error Resistant Nanometer CMOS Circuits. IOLTS 2005: 35-40
149EEChung-Seok (Andy) Seo, Abhijit Chatterjee, Nan M. Jokerst: This paper presents a cost-effective area-IO DRAM A CAD Tool and Algorithms. ISQED 2005: 567-572
148EEAbhijit Chatterjee, Ali Keshavarzi, Amit Patra, Siddhartha Mukhopadhyay: Test Methodologies in the Deep Submicron Era -- Analog, Mixed-Signal, and RF. VLSI Design 2005: 12-13
147EEAbdulkadir Utku Diril, Yuvraj Singh Dhillon, Abhijit Chatterjee, Adit D. Singh: Level-Shifter Free Design of Low Power Dual Supply Voltage CMOS Circuits Using Dual Threshold Voltages. VLSI Design 2005: 159-164
146EEAchintya Halder, Soumendu Bhattacharya, Ganesh Srinivasan, Abhijit Chatterjee: A System-Level Alternate Test Approach for Specification Test of RF Transceivers in Loopback Mode. VLSI Design 2005: 289-294
145EESoumendu Bhattacharya, Abhijit Chatterjee: Production Test Methods for Measuring 'Out-of-Band' Interference of Ultra Wide Band (UWB) Devices. VTS 2005: 137-142
144EESelim Sermet Akbay, Abhijit Chatterjee: Built-In Test of RF Components Using Mapped Feature Extraction Sensors. VTS 2005: 243-248
143EEAchintya Halder, Abhijit Chatterjee: Low-Cost Alternate EVM Test for Wireless Receiver Systems. VTS 2005: 255-260
142EEAbdulkadir Utku Diril, Yuvraj Singh Dhillon, Abhijit Chatterjee, Adit D. Singh: Design of Adaptive Nanometer Digital Systems for Effective Control of Soft Error Tolerance. VTS 2005: 298-303
141EESoumendu Bhattacharya, Abhijit Chatterjee: Optimized wafer-probe and assembled package test design for analog circuits. ACM Trans. Design Autom. Electr. Syst. 10(2): 303-329 (2005)
140EEAbhijit Chatterjee, Kapil Mayawala, Jeremy S. Edwards, Dionisios G. Vlachos: Time accelerated Monte Carlo simulations of biological networks using the binomial r-leap method. Bioinformatics 21(9): 2136-2137 (2005)
139EEAbdulkadir Utku Diril, Yuvraj Singh Dhillon, Abhijit Chatterjee, Adit D. Singh: Level-shifter free design of low power dual supply voltage CMOS circuits using dual threshold voltages. IEEE Trans. VLSI Syst. 13(9): 1103-1107 (2005)
138EESoumendu Bhattacharya, Achintya Halder, Ganesh Srinivasan, Abhijit Chatterjee: Alternate Testing of RF Transceivers Using Optimized Test Stimulus for Accurate Prediction of System Specifications. J. Electronic Testing 21(3): 323-339 (2005)
137EEAbdulkadir Utku Diril, Yuvraj Singh Dhillon, Abhijit Chatterjee, Adit D. Singh: Pseudo Dual Supply Voltage Domino Logic Design. J. Low Power Electronics 1(2): 145-152 (2005)
136EEAchintya Halder, Abhijit Chatterjee: Test generation for specification test of analog circuits using efficient test response observation methods. Microelectronics Journal 36(9): 820-832 (2005)
2004
135EEChung-Seok (Andy) Seo, Abhijit Chatterjee, Sang-Yeon Cho, Nan M. Jokerst: Design and optimization of board-level optical clock distribution network for high-performance optoelectronic system-on-a-packages. ACM Great Lakes Symposium on VLSI 2004: 292-297
134EEGanesh Srinivasan, Shalabh Goyal, Abhijit Chatterjee: Reconfiguration for Enhanced ALternate Test (REALTest) of Analog Circuits. Asian Test Symposium 2004: 302-307
133EEDonghoon Han, Abhijit Chatterjee: Device Resizing Based Optimization of Analog Circuits for Reduced Test Cost: Cost Metric and Case Study. Asian Test Symposium 2004: 420-425
132EESoumendu Bhattacharya, Abhijit Chatterjee: A Built-In Loopback Test Methodology for RF Transceiver Circuits Using Embedded Sensor Circuits. Asian Test Symposium 2004: 68-73
131 Chung-Seok (Andy) Seo, Abhijit Chatterjee, Timothy J. Drabik: Optically Interconnected Intelligent RAM Multiprocessor: Gigascale Opto-IRAM. Computers and Their Applications 2004: 256-260
130EEGanesh Srinivasan, Soumendu Bhattacharya, Sasikumar Cherubal, Abhijit Chatterjee: Efficient Test Strategy for TDMA Power Amplifiers Using Transient Current Measurements: Uses and Benefit. DATE 2004: 280-285
129EESoumendu Bhattacharya, Ganesh Srinivasan, Sasikumar Cherubal, Abhijit Chatterjee: Test Time Reduction for ACPR Measurement of Wireless Transceivers Using Periodic Bit-Stream Sequences. DELTA 2004: 372-377
128EEYuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee, Adit D. Singh: Sizing CMOS Circuits for Increased Transient Error Tolerance. IOLTS 2004: 11-16
127EEAchintya Halder, Abhijit Chatterjee: Automated Test Generation and Test Point Selection for Specification Test of Analog Circuits. ISQED 2004: 401-406
126EEAshwin Raghunathan, Ji Hwan (Paul) Chun, Jacob A. Abraham, Abhijit Chatterjee: Quasi-Oscillation Based Test for Improved Prediction of Analog Performance Parameters. ITC 2004: 252-261
125EESoumendu Bhattacharya, Abhijit Chatterjee: Use of Embedded Sensors for Built-In-Test of RF Circuits. ITC 2004: 801-809
124EEDonghoon Han, Abhijit Chatterjee: Simulation-in-the-Loop Analog Circuit Sizing Method using Adaptive Model-based Simulated Annealing. IWSOC 2004: 127-130
123EEYuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee, Adit D. Singh: Low-power dual Vth pseudo dual Vdd domino circuits. SBCCI 2004: 273-277
122EESasikumar Cherubal, Ramakrishna Voorakaranam, Abhijit Chatterjee, John Mclaughlin, Jason L. Smith, David M. Majernik: Concurrent RF Test Using Optimized Modulated RF Stimuli. VLSI Design 2004: 1017-1022
121EESoumendu Bhattacharya, Ganesh Srinivasan, Sasikumar Cherubal, Achintya Halder, Abhijit Chatterjee: System-level Testing of RF Transmitter Specifications Using Optimized Periodic Bitstreams. VTS 2004: 229-236
120EESelim Sermet Akbay, Abhijit Chatterjee: Feature Extraction Based Built-In Alternate Test of RF Components Using a Noise Reference. VTS 2004: 273-290
119EEAshwin Raghunathan, Hongjoong Shin, Jacob A. Abraham, Abhijit Chatterjee: Prediction of Analog Performance Parameters Using Oscillation Based Test. VTS 2004: 377-382
118EERajesh Pendurkar, Abhijit Chatterjee, Yervant Zorian: Distributed Diagnosis of Interconnections in SoC and MCM Designs. J. Electronic Testing 20(3): 291-307 (2004)
2003
117EEXiangdong Xuan, Abhijit Chatterjee, Adit D. Singh, Namsoo P. Kim, Mark T. Chisa: IC Reliability Simulator ARET and Its Application in Design-for-Reliability. Asian Test Symposium 2003: 18-23
116EEYuvraj Singh Dhillon, Abdulkadir Utku Diril, Abhijit Chatterjee, Hsien-Hsin S. Lee: Algorithm for Achieving Minimum Energy Consumption in CMOS Circuits Using Multiple Supply and Threshold Voltages at the Module Level. ICCAD 2003: 693-700
115EEKyu-won Choi, Abhijit Chatterjee: UDSM (ultra-deep sub-micron)-aware post-layout power optimization for ultra low-power CMOS VLSI. ISLPED 2003: 72-77
114EEAbdulkadir Utku Diril, Yuvraj Singh Dhillon, Kyu-won Choi, Abhijit Chatterjee: An O(N)Supply Voltage Assignment Algorithm for Low-Energy Serially Connected CMOS Modules and a Heuristic Extension to Acyclic Data Flow Graphs. ISVLSI 2003: 173-182
113EERamakrishna Voorakaranam, Randy Newby, Sasikumar Cherubal, Bob Cometta, Thomas Kuehl, David M. Majernik, Abhijit Chatterjee: Production Deployment of a Fast Transient Testing Methodology for Analog Circuits : Case Study and Results. ITC 2003: 1174-1181
112EEAbhijit Chatterjee: Seamless Research Between Academia And Industry To Facilitate Test Of Integrated High-Speed Wireless Systems: Is This An Illusion? ITC 2003: 1287
111EEAchintya Halder, Soumendu Bhattacharya, Abhijit Chatterjee: Automatic Multitone Alternate Test Generation For RF Circuits Using Behavioral Models. ITC 2003: 665-673
110EEChung-Seok (Andy) Seo, Abhijit Chatterjee: Free-Space Optical Interconnect for High-Performance MCM Systems. IWSOC 2003: 294-298
109EESoumendu Bhattacharya, Abhijit Chatterjee: High Coverage Analog Wafer-Probe Test Design and Co-optimization with Assembled-Package Test to Minimize Overall Test Cost. VTS 2003: 89-100
108EEJunwei Hou, Abhijit Chatterjee: Concurrent transient fault simulation for analog circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 22(10): 1385-1398 (2003)
2002
107EERamakrishna Voorakaranam, Sasikumar Cherubal, Abhijit Chatterjee: A Signature Test Framework for Rapid Production Testing of RF Circuits. DATE 2002: 186-191
106EESoumendu Bhattacharya, Abhijit Chatterjee: Constrained Specification-Based Test Stimulus Generation for Analog Circuits Using Nonlinear Performance Prediction Models. DELTA 2002: 25-32
105EEChung-Seok (Andy) Seo, Abhijit Chatterjee: A CAD Tool for System-on-Chip Placement and Routing with Free-Space Optical Interconnect. ICCD 2002: 24-29
104EEHuy Nguyen, Abhijit Chatterjee: Design of Real-Number Checksum Codes Using Shared Partial Computation for CED in Linear DSP Systems. IOLTW 2002: 61-
103EEKyu-won Choi, Abhijit Chatterjee: HA2TSD: hierarchical time slack distribution for ultra-low power CMOS VLSI. ISLPED 2002: 207-212
102EEAbhijit Chatterjee, Peeter Ellervee, Vincent John Mooney III, Jun-Cheol Park, Kyu-won Choi, Kiran Puttaswamy: System Level Power-Performance Trade-Offs in Embedded Systems Using Voltage and Frequency Scaling of Off-Chip Buses and Memory. ISSS 2002: 225-230
101EEKyu-won Choi, Abhijit Chatterjee: PA-ZSA (Power-Aware Zero-Slack Algorithm): A Graph-Based Timing Analysis for Ultra-Low Power CMOS VLSI. PATMOS 2002: 178-187
100EEAchintya Halder, Abhijit Chatterjee, Pramodchandran N. Variyam, John Ridley: Measuring Stray Capacitance on Tester Hardware. VTS 2002: 351-356
99EEPramodchandran N. Variyam, Sasikumar Cherubal, Abhijit Chatterjee: Prediction of analog performance parameters using fast transienttesting. IEEE Trans. on CAD of Integrated Circuits and Systems 21(3): 349-361 (2002)
2001
98EEAchintya Halder, Abhijit Chatterjee: Specification Based Digital Compatible Built-in Test of Embedded Analog Circuits. Asian Test Symposium 2001: 344-
97EEBiranchinath Sahu, Abhijit Chatterjee: Automatic Test Generation for Analog Circuits Using Compact Test Transfer Function Models. Asian Test Symposium 2001: 405-410
96EEAlfred V. Gomes, Abhijit Chatterjee: Distance Constrained Dimensionality Reduction for Parametric Fault Test Generator. Asian Test Symposium 2001: 411-416
95EESasikumar Cherubal, Abhijit Chatterjee: Test generation based diagnosis of device parameters for analog circuits. DATE 2001: 596-602
94EEXiangdong Xuan, Abhijit Chatterjee: Sensitivity and Reliability Evaluation for Mixed-Signal ICs under Electromigration and Hot-Carrier Effects. DFT 2001: 323-328
93 Kyu-won Choi, Abhijit Chatterjee: Efficient instruction-level optimization methodology for low-power embedded systems. ISSS 2001: 147-152
92 Sasikumar Cherubal, Abhijit Chatterjee: A high-resolution jitter measurement technique using ADC sampling. ITC 2001: 838-847
91EEKoppolu Sasidhar, Abhijit Chatterjee, Yervant Zorian: Boundary Scan-Based Relay Wave Propagation Test of Arrays of Identical Structures. IEEE Trans. Computers 50(10): 1007-1019 (2001)
90EEKoppolu Sasidhar, Abhijit Chatterjee: Hierarchical Diagnosis of Identical Units in a System. IEEE Trans. Computers 50(2): 186-191 (2001)
89EEPankaj Pant, Yuan-Chieh Hsu, Sandeep K. Gupta, Abhijit Chatterjee: Path delay fault diagnosis in combinational circuits with implicitfault enumeration. IEEE Trans. on CAD of Integrated Circuits and Systems 20(10): 1226-1235 (2001)
88EERajesh Pendurkar, Abhijit Chatterjee, Yervant Zorian: Switching activity generation with automated BIST synthesis forperformance testing of interconnects. IEEE Trans. on CAD of Integrated Circuits and Systems 20(9): 1143-1158 (2001)
2000
87EESasikumar Cherubal, Abhijit Chatterjee: Test generation for fault isolation in analog circuits using behavioral models. Asian Test Symposium 2000: 19-24
86 Sudip Chakrabarti, Abhijit Chatterjee: Partial Simulation-Driven ATPG for Detection and Diagnosis of Faults in Analog Circuits. ICCAD 2000: 562-567
85EEJunwei Hou, Abhijit Chatterjee: Analog Transient Concurrent Fault Simulation with Dynamic Fault Grouping. ICCD 2000: 35-41
84 Pankaj Pant, Abhijit Chatterjee: Path-delay fault diagnosis in non-scan sequential circuits with at-speed test application. ITC 2000: 245-252
83 Sasikumar Cherubal, Abhijit Chatterjee: Optimal INL/DNL testing of A/D converters using a linear model. ITC 2000: 358-366
82EESasikumar Cherubal, Abhijit Chatterjee: An Efficient Hierarchical Fault Isolation Technique for Mixed-Signal Boards. VLSI Design 2000: 550-555
81EERamakrishna Voorakaranam, Abhijit Chatterjee: Test Generation for Accurate Prediction of Analog Specifications. VTS 2000: 137-142
80EEPramodchandran N. Variyam, Abhijit Chatterjee: Digital-Compatible BIST for Analog Circuits Using Transient Response Sampling. IEEE Design & Test of Computers 17(3): 106-115 (2000)
79EEPramodchandran N. Variyam, Abhijit Chatterjee: Specification-driven test generation for analog circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 19(10): 1189-1201 (2000)
1999
78EESudip Chakrabarti, Abhijit Chatterjee: Compact Fault Dictionary Construction for Efficient Isolation of Faults in Analog and Mixed-Signal Circuits. ARVLSI 1999: 327-341
77EERamakrishna Voorakaranam, Abhijit Chatterjee: Feedback Driven Backtrace of Analog Signals and its Application to Circuit Verification and Test. ARVLSI 1999: 342-357
76EEAlfred V. Gomes, Abhijit Chatterjee: Minimal Length Diagnostic Tests for Analog Circuits using Test History. DATE 1999: 189-194
75EESasikumar Cherubal, Abhijit Chatterjee: Parametric Fault Diagnosis for Analog Systems Using Functional Mapping. DATE 1999: 195-
74EESasikumar Cherubal, Abhijit Chatterjee: A Methodology for Efficient Simulation and Diagnosis of Mixed-Signal Systems Using Error Waveforms. DFT 1999: 357-
73EEAlfred V. Gomes, Abhijit Chatterjee: Robust optimization based backtrace method for analog circuits. ICCAD 1999: 304-308
72EEPankaj Pant, Abhijit Chatterjee: Efficient diagnosis of path delay faults in digital logic circuits. ICCAD 1999: 471-476
71EEJunwei Hou, William H. Kao, Abhijit Chatterjee: A novel concurrent fault simulation method for mixed-signal circuits. ISCAS (2) 1999: 448-451
70 Sudip Chakrabarti, Abhijit Chatterjee: On-line fault detection in DSP circuits using extrapolated checksums with minimal test points. ITC 1999: 955-963
69EESudip Chakrabarti, Abhijit Chatterjee: Diagnostic Test Pattern Generation for Analog Circuits Using Hierarchical Models. VLSI Design 1999: 518-523
68EEPramodchandran N. Variyam, Junwei Hou, Abhijit Chatterjee: Test Generation for Analog Circuits Using Partial Numerical Simulation. VLSI Design 1999: 597-602
67 Manuel d'Arbreu, Abhijit Chatterjee: Manufacturability of Mixed Signal Systems. VLSI Design 1999: 608
66EEPramodchandran N. Variyam, Junwei Hou, Abhijit Chatterjee: Efficient Test Generation for Transient Testing of Analog Circuits Using Partial Numerical Simulation. VTS 1999: 214-219
65EERamakrishna Voorakaranam, Abhijit Chatterjee: Hierarchical Test Generation for Analog Circuits Using Incremental Test Development. VTS 1999: 296-303
64EERajesh Pendurkar, Craig A. Tovey, Abhijit Chatterjee: Single-probe traversal optimization for testing of MCM substrate interconnections. IEEE Trans. on CAD of Integrated Circuits and Systems 18(8): 1178-1191 (1999)
63EEHuy Nguyen, Rabindra K. Roy, Abhijit Chatterjee: Partial Reset Methodology and Experiments for Improving Random-Pattern Testability and BIST of Sequential Circuits. J. Electronic Testing 14(3): 259-272 (1999)
62EEHeebyung Yoon, Junwei Hou, Swapan K. Bhattacharya, Abhijit Chatterjee, Madhavan Swaminathan: Fault Detection and Automated Fault Diagnosis for Embedded Integrated Electrical Passives. VLSI Signal Processing 21(3): 265-276 (1999)
1998
61EEPramodchandran N. Variyam, Abhijit Chatterjee: Specification-Driven Test Design for Analog Circuits. DFT 1998: 335-340
60EEAlfred V. Gomes, Ramakrishna Voorakaranam, Abhijit Chatterjee: Modular Fault Simulation of Mixed Signal Circuits with Fault Ranking by Severity. DFT 1998: 341-348
59EEJunwei Hou, Abhijit Chatterjee: CONCERT: a concurrent transient fault simulator for nonlinear analog circuits. ICCAD 1998: 384-391
58EERajesh Pendurkar, Abhijit Chatterjee, Yervant Zorian: Synthesis of BIST hardware for performance testing of MCM interconnections. ICCAD 1998: 69-73
57EERajesh Pendurkar, Abhijit Chatterjee, Yervant Zorian: A distributed BIST technique for diagnosis of MCM interconnections. ITC 1998: 214-221
56EEBruce C. Kim, David C. Keezer, Abhijit Chatterjee: A high throughput test methodology for MCM substrates. ITC 1998: 234-
55 Huy Nguyen, Rabindra K. Roy, Abhijit Chatterjee: Partial Reset Methodologies for Improving Random-Pattern Testability and BIST of Sequential Circuits. VLSI Design 1998: 199-204
54EEPramodchandran N. Variyam, Abhijit Chatterjee: Enhancing Test Effectiveness for Analog Circuits Using Synthesized Measurements. VTS 1998: 132-137
53EEHeebyung Yoon, Pramodchandran N. Variyam, Abhijit Chatterjee, Naveena Nagi: Hierarchical Statistical Inference Model for Specification Based Testing of Analog Circuits. VTS 1998: 145-151
52EEKoppolu Sasidhar, Leon Alkalai, Abhijit Chatterjee: Testing NASA's 3D-Stack MCM Space Flight Computer. IEEE Design & Test of Computers 15(3): 44-55 (1998)
51EENaveena Nagi, Abhijit Chatterjee, Heebyung Yoon, Jacob A. Abraham: Signature analysis for analog and mixed-signal circuit test response compaction. IEEE Trans. on CAD of Integrated Circuits and Systems 17(6): 540-546 (1998)
50EEHuy T. Nguyen, Abhijit Chatterjee, Rabindra K. Roy: Activity Measures for Fast Relative Power Estimation in Numerical Transformation for Low Power DSP Synthesis. VLSI Signal Processing 18(1): 25-38 (1998)
1997
49EEPankaj Pant, Vivek De, Abhijit Chatterjee: Device-Circuit Optimization for Minimal Energy and Power Consumption in CMOS Random Logic Networks. DAC 1997: 403-408
48EEPramodchandran N. Variyam, Abhijit Chatterjee: Test generation for comprehensive testing of linear analog circuits using transient response sampling. ICCAD 1997: 382-385
47 Ramakrishna Voorakaranam, Sudip Chakrabarti, Junwei Hou, Alfred V. Gomes, Sasikumar Cherubal, Abhijit Chatterjee, William H. Kao: Hierarchical Specification-Driven Analog Fault Modeling for Efficient Fault Simulation and Diagnosis. ITC 1997: 903-912
46EEAbhijit Chatterjee, Naveena Nagi: Design for Testability and Built-In Self-Test of Mixed-Signal Circuits: A Tutorial. VLSI Design 1997: 388-392
45EEHeebyung Yoon, Abhijit Chatterjee, Joseph L. A. Hughes: Optimal Design of Checksum-Based Checkers for Fault Detection in Linear Analog Circuits. VLSI Design 1997: 393-397
44EEPramodchandran N. Variyam, Abhijit Chatterjee: FLYER: Fast Fault Simulation of Linear Analog Circuits Using Polynomial Waveform and Perturbed State Representation. VLSI Design 1997: 408-412
43EEHuy Nguyen, Abhijit Chatterjee, Rabindra K. Roy: Impact of Partial Reset on Fault Independent Testing and BIST. VLSI Design 1997: 537-539
42EEPramodchandran N. Variyam, Abhijit Chatterjee, Naveena Nagi: Low-cost and efficient digital-compatible BIST for analog circuits using pulse response sampling. VTS 1997: 261-266
41 Abhijit Chatterjee, Rabindra K. Roy: Concurrent Error Detection in Nonlinear Digital Circuits Using Time-Freeze Linearization. IEEE Trans. Computers 46(11): 1208-1218 (1997)
40EEMadhavan Swaminathan, Bruce Kim, Abhijit Chatterjee: A Survey of Test Techniques for MCM Substrates. J. Electronic Testing 10(1-2): 27-38 (1997)
1996
39EERajesh Pendurkar, Abhijit Chatterjee, Craig A. Tovey: Optimal single probe traversal algorithm for testing of MCM substrat. ICCD 1996: 396-
38 Koppolu Sasidhar, Abhijit Chatterjee, Yervant Zorian: Optimal Multiple Chain Relay Testing Scheme for MCMs on Large Area Substrates. ITC 1996: 818-827
37EEAbhijit Chatterjee, Bruce C. Kim, Naveena Nagi: Low-cost DC built-in self-test of linear analog circuits using checksums. VLSI Design 1996: 230-233
36EEKoppolu Sasidhar, Abhijit Chatterjee: Hierarchical Probablistic Diagnosis of MCMs on Large-Area Substrates. VLSI Design 1996: 65-68
35EEBruce C. Kim, Abhijit Chatterjee, Madhavan Swaminathan: Low-cost diagnosis of defects in MCM substrate interconnections. VTS 1996: 260-265
34EEAbhijit Chatterjee, Rathish Jayabharathi, Pankaj Pant, Jacob A. Abraham: Non-robust tests for stuck-fault detection using signal waveform analysis: feasibility and advantages. VTS 1996: 354-361
33EEAbhijit Chatterjee, Bruce C. Kim, Naveena Nagi: DC Built-In Self-Test for Linear Analog Circuits. IEEE Design & Test of Computers 13(2): 26-33 (1996)
32EEAshok Balivada, Hong Zheng, Naveena Nagi, Abhijit Chatterjee, Jacob A. Abraham: A unified approach for fault simulation of linear mixed-signal circuits. J. Electronic Testing 9(1-2): 29-41 (1996)
1995
31EEHuy Nguyen, Abhijit Chatterjee: OPTIMUS: a new program for OPTIMizing linear circuits with number-splitting and shift-and-add decompositions. ARVLSI 1995: 258-271
30 Bruce C. Kim, Abhijit Chatterjee, Madhavan Swaminathan, David E. Schimmel: A Novel Low-Cost Approach to MCM Interconnect Test. ITC 1995: 184-192
29 Koppolu Sasidhar, Abhijit Chatterjee, Vinod K. Agarwal, Joseph L. A. Hughes: Distributed Probabilistic Diagnosis of MCMs on Large Area. ITC 1995: 208-216
28EENaveena Nagi, Abhijit Chatterjee, Ashok Balivada, Jacob A. Abraham: Efficient multisine testing of analog circuits. VLSI Design 1995: 234-238
27EEAbhijit Chatterjee, Charles F. Machala III, Ping Yang: A submicron DC MOSFET model for simulation of analog circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 14(10): 1193-1207 (1995)
1994
26EEAbhijit Chatterjee, Jacob A. Abraham: RAFT191486: a novel program for rapid-fire test and diagnosis of digital logic for marginal delays and delay faults. ICCAD 1994: 340-343
25 Naveena Nagi, Abhijit Chatterjee, Jacob A. Abraham: A Signature Analyzer for Analog and Mixed-signal Circuits. ICCD 1994: 284-287
24 Abhijit Chatterjee, Rabindra K. Roy: Synthesis of Low Power Linear DSP Circuits Using Activity Metrics. VLSI Design 1994: 265-270
23 Kaushik Roy, Abhijit Chatterjee: Guest Editors' Introduction: Low-Power VLSI Design. IEEE Design & Test of Computers 11(4): 6-7 (1994)
1993
22EEAbhijit Chatterjee, Rabindra K. Roy: An Architectural Transformation Program for Optimization of Digital Systems by Multi-Level Decomposition. DAC 1993: 343-348
21EENaveena Nagi, Abhijit Chatterjee, Jacob A. Abraham: DRAFTS: Discretized Analog Circuit Fault Simulator. DAC 1993: 509-514
20EENaveena Nagi, Abhijit Chatterjee, Ashok Balivada, Jacob A. Abraham: Fault-based automatic test generator for linear analog circuits. ICCAD 1993: 88-91
19 Naveena Nagi, Abhijit Chatterjee, Jacob A. Abraham: MIXER: Mixed-Signal Fault Simulator. ICCD 1993: 568-571
18 Abhijit Chatterjee, Rabindra K. Roy: Concurrent Error Detection in Nonlinear Digital Circuits with Applications to Adaptive Filters. ICCD 1993: 606-609
17 Abhijit Chatterjee, Rabindra K. Roy, Manuel A. d'Abreu: Greedy Hardware Optimization for Linear Digital Systems Using Number Splitting. VLSI Design 1993: 154-159
16 Abhijit Chatterjee, Manuel A. d'Abreu: The Design of Fault-Tolerant Linear Digital State Variable Systems: Theory and Techniques. IEEE Trans. Computers 42(7): 794-808 (1993)
15EEAbhijit Chatterjee, Rabindra K. Roy, Manuel A. d'Abreu: Greedy hardware optimization for linear digital circuits using number splitting and refactorization. IEEE Trans. VLSI Syst. 1(4): 423-431 (1993)
14EENaveena Nagi, Abhijit Chatterjee, Jacob A. Abraham: Fault simulation of linear analog circuits. J. Electronic Testing 4(4): 345-360 (1993)
13EEAbhijit Chatterjee, P. P. Das, Soumendu Bhattacharya: Visualization in linear programming using parallel coordinates. Pattern Recognition 26(11): 1725-1736 (1993)
1992
12EERabindra K. Roy, Abhijit Chatterjee, Janak H. Patel, Jacob A. Abraham, Manuel A. d'Abreu: Automatic test generation for linear digital systems with bi-level search using matrix transform methods. ICCAD 1992: 224-228
11 Abhijit Chatterjee: A New Approach to Fault-Tolerance in Linear Analog Systems Based on Checksum-Coded State Space Representations. ICCD 1992: 478-481
1991
10 Abhijit Chatterjee, Manuel A. d'Abreu: Concurrent Error Detection and Fault-Tolerance in Linear Digital State Variable Systems. FTCS 1991: 136-143
9 Abhijit Chatterjee, Manuel A. d'Abreu: Syndrome-Based Functional Delay Fault Location in Linear Digital Data-Flow Graphs. ICCD 1991: 212-215
8 Abhijit Chatterjee: Concurrent Error Detection in Linear Analog and Switched-Capacitor State Variable Systems Using Continuous Checksums. ITC 1991: 582-591
7EERichard I. Hartley, Kenneth Welles II, Michael Hartman, Abhijit Chatterjee, Paul Delano, Barbara Molnar, Colin Rafferty: A Rapid-Prototyping Environment for Digital-Signal Processors. IEEE Design & Test of Computers 8(2): 11-25 (1991)
6 Abhijit Chatterjee, Jacob A. Abraham: Test Generation for Iterative Logic Arrays Based on an N-Cube of Cell States Model. IEEE Trans. Computers 40(10): 1133-1148 (1991)
5EEAbhijit Chatterjee, Jacob A. Abraham: Test generation, design-for-testability and built-in self-test for arithmetic units based on graph labeling. J. Electronic Testing 2(4): 351-372 (1991)
1990
4EEAbhijit Chatterjee, Richard I. Hartley: A New Simultaneous Circuit Partitioning and Chip Placement Approach Based on Simulated Annealing. DAC 1990: 36-39
3EERichard I. Hartley, Kenneth Welles II, Michael Hartman, Paul Delano, Abhijit Chatterjee: Rapid prototyping using high density interconnects. EURO-DAC 1990: 439-443
2 Abhijit Chatterjee, Jacob A. Abraham: The Testability of Generalized Counters Under Multiple Faulty Cells. IEEE Trans. Computers 39(11): 1378-1385 (1990)
1987
1EEAbhijit Chatterjee, Jacob A. Abraham: On the C-Testability of Generalized Counters. IEEE Trans. on CAD of Integrated Circuits and Systems 6(5): 713-726 (1987)

Coauthor Index

1Jacob A. Abraham [1] [2] [5] [6] [12] [14] [19] [20] [21] [25] [26] [28] [32] [34] [51] [119] [126] [172] [185]
2Vinod K. Agarwal [29]
3Selim Sermet Akbay [120] [144] [152] [183]
4Leon Alkalai [52]
5Behnam S. Arad [155]
6Maryam Ashouei [153] [163] [166] [169] [178] [180] [181] [193]
7Mike Atia [171]
8Ashok Balivada [20] [28] [32]
9Soumendu Bhattacharya [13] [106] [109] [111] [121] [125] [129] [130] [132] [138] [141] [145] [146] [152] [161] [163] [164] [165] [169] [170] [178] [186] [190]
10Swapan K. Bhattacharya [62]
11José Manuel Cazeaux [151]
12Sudip Chakrabarti [47] [69] [70] [78] [86]
13Sasikumar Cherubal [47] [74] [75] [82] [83] [87] [92] [95] [99] [107] [113] [121] [122] [129] [130]
14Mark T. Chisa [117]
15Sang-Yeon Cho [135]
16Hyun Choi [179] [195]
17Kyu-won Choi [93] [101] [102] [103] [114] [115]
18Ji Hwan (Paul) Chun [126]
19Bob Cometta [113]
20P. P. Das [13]
21Ramyanshu Datta [172] [185]
22Vivek De [49] [153] [166]
23Paul Delano [3] [7]
24Shyam Kumar Devarakond [198]
25Yuvraj Singh Dhillon [114] [116] [123] [128] [137] [139] [142] [147] [150] [154] [158] [160] [174] [176]
26Abdulkadir Utku Diril [114] [116] [123] [128] [137] [139] [142] [147] [150] [154] [158] [160] [172] [174] [176] [180] [185]
27Timothy J. Drabik [131] [155]
28Jeremy S. Edwards [140]
29William R. Eisenstadt [152]
30Peeter Ellervee [102]
31Alfred V. Gomes [47] [60] [73] [76] [96]
32Abhilash Goyal [200]
33Shalabh Goyal [134] [170] [171] [175] [184]
34Sandeep K. Gupta [89]
35Achintya Halder [98] [100] [111] [121] [127] [136] [138] [143] [146] [156] [167] [186]
36Donghoon Han [124] [133] [152] [157] [170] [179]
37Richard I. Hartley [3] [4] [7]
38Michael Hartman [3] [7]
39Junwei Hou [47] [59] [62] [66] [68] [71] [85] [108]
40Yuan-Chieh Hsu [89]
41Joseph L. A. Hughes [29] [45]
42Rathish Jayabharathi [34]
43Nan M. Jokerst [135] [149]
44William H. Kao [47] [71]
45David C. Keezer [56]
46Ali Keshavarzi [148]
47Bruce Kim [40]
48Bruce C. Kim [30] [33] [35] [37] [56]
49Namsoo P. Kim [117]
50Thomas Kuehl [113]
51Hsien-Hsin S. Lee [116]
52Charles F. Machala III [27]
53David M. Majernik [113] [122]
54T. M. Mak [166]
55Kapil Mayawala [140]
56John Mclaughlin [122]
57Cecilia Metra [150] [151]
58Barbara Molnar [7]
59Vincent John Mooney III (Vincent John Mooney) [102]
60Siddhartha Mukhopadhyay [148]
61Naveena Nagi [14] [19] [20] [21] [25] [28] [32] [33] [37] [42] [46] [51] [53]
62Sankar Nair [165]
63Vishwanath Natarajan [164] [165] [189] [196]
64Randy Newby [113]
65Huy Nguyen [31] [43] [55] [63] [104]
66Huy T. Nguyen [50]
67Muhammad Mudassar Nisar [180] [181] [188] [191] [197]
68Kevin J. Nowka [172] [185]
69Martin Omaña [151]
70Pankaj Pant [34] [49] [72] [84] [89]
71Jun-Cheol Park [102]
72Janak H. Patel [12]
73Reena Patel [155]
74Amit Patra [148]
75Rajesh Pendurkar [39] [57] [58] [64] [88] [118]
76Michael Purtell [175]
77Kiran Puttaswamy [102]
78Colin Rafferty [7]
79Ashwin Raghunathan [119] [126]
80John Ridley [100]
81Daniele Rossi [151]
82Kaushik Roy [23]
83Rabindra K. Roy [12] [15] [17] [18] [22] [24] [41] [43] [50] [55] [63]
84Biranchinath Sahu [97]
85Koppolu Sasidhar [29] [36] [38] [52] [90] [91]
86David E. Schimmel [30]
87Shreyas Sen [182] [189] [192] [194] [196] [198]
88Rajarajan Senguttuvan [177] [182] [189] [190] [191] [192] [196]
89Chung-Seok (Andy) Seo [105] [110] [131] [135] [149] [155]
90Hongjoong Shin [119]
91Adit D. Singh [117] [123] [128] [137] [139] [142] [147] [153] [158] [159] [160] [166] [180] [193]
92Jason L. Smith [122]
93Ganesh Srinivasan [121] [129] [130] [134] [138] [146] [162] [173] [187]
94Madhavan Swaminathan [30] [35] [40] [62] [200]
95Friedrich Taenzler [162] [173] [187]
96Craig A. Tovey [39] [64]
97Pramodchandran N. Variyam [42] [44] [48] [53] [54] [61] [66] [68] [79] [80] [99] [100]
98Dionisios G. Vlachos [140]
99Ramakrishna Voorakaranam [47] [60] [65] [77] [81] [107] [113] [122]
100Kenneth Welles II [3] [7]
101Xiangdong Xuan [94] [117] [159]
102Ping Yang [27]
103Heebyung Yoon [45] [51] [53] [62]
104Hong Zheng [32]
105Yervant Zorian [38] [57] [58] [88] [91] [118]
106Manuel A. d'Abreu [9] [10] [12] [15] [16] [17]
107Manuel d'Arbreu [67]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)