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Tian-Sheuan Chang Vis

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*2009
26EEYu-Kun Lin, Chun-Wei Ku, De-Wei Li, Tian-Sheuan Chang: A 140-MHz 94 K Gates HD1080p 30-Frames/s Intra-Only Profile H.264 Encoder. IEEE Trans. Circuits Syst. Video Techn. 19(3): 432-436 (2009)
2008
25EEYu-Kun Lin, De-Wei Li, Chia-Chun Lin, Tzu-Yun Kuo, Sian-Jin Wu, Wei-Cheng Tai, Wei-Cheng Chang, Tian-Sheuan Chang: A 242mW, 10mm21080p H.264/AVC high profile encoder chip. DAC 2008: 78-83
24EEJing-Chu Chan, Nelson Yen-Chung Chang, Tian-Sheuan Chang: ISID : In-order scan and indexed diffusion segmentation algorithm for stereo vision. ISCAS 2008: 3478-3481
23EETsung-Hsien Tsai, Nelson Yen-Chung Chang, Tian-Sheuan Chang: Data reuse analysis of local stereo matching. ISCAS 2008: 812-815
22EESin-Bor Wang, Tian-Sheuan Chang: Adaptive De-Interlacing With Robust Overlapped Block Motion Compensation. IEEE Trans. Circuits Syst. Video Techn. 18(10): 1437-1440 (2008)
21EEHui-Cheng Hsu, Kun-Bin Lee, Nelson Yen-Chung Chang, Tian-Sheuan Chang: Architecture Design of Shape-Adaptive Discrete Cosine Transform and Its Inverse for MPEG-4 Video Coding. IEEE Trans. Circuits Syst. Video Techn. 18(3): 375-386 (2008)
2007
20EEYu-Cheng Tseng, Nelson Yen-Chung Chang, Tian-Sheuan Chang: Low Memory Cost Block-Based Belief Propagation for Stereo Correspondence. ICME 2007: 1415-1418
19EENelson Yen-Chung Chang, Ting-Min Lin, Tsung-Hsien Tsai, Yu-Cheng Tseng, Tian-Sheuan Chang: Real-Time DSP Implementation on Local Stereo Matching. ICME 2007: 2090-2093
18EEGuo-Shiuan Yu, Tian-Sheuan Chang: Optimal Data Mapping for Motion Compensation in H.264 Video Decoding. SiPS 2007: 505-508
2006
17EETzu-Yun Kuo, Yu-Kun Lin, Tian-Sheuan Chang: A Memory Bandwidth Optimized Interpolator for Motion Compensation in the H.264 Video Decoding. APCCAS 2006: 1244-1247
16EEChia-Chun Lin, Yu-Kun Lin, Tian-Sheuan Chang: A Fast Algorithm and Its Architecture for Motion Estimation in MPEG-4 AVC/H.264 Video Coding. APCCAS 2006: 1248-1251
15EEJia-Bin Huang, Yu-Kun Lin, Tian-Sheuan Chang: A Display Order Oriented Scalable Video Decoder. APCCAS 2006: 1976-1979
14EEMin-Chi Tsai, Tian-Sheuan Chang: High Performance Context Adaptive Variable Length Coding Encoder for MPEG-4 AVC/H.264 Video Coding. APCCAS 2006: 586-589
13EEHung-Chih Lin, Yu-Jen Wang, Kai-Ting Cheng, Shang-Yu Yeh, Wei-Nien Chen, Chia-Yang Tsai, Tian-Sheuan Chang, Hsueh-Ming Hang: Algorithms and DSP implementation of H.264/AVC. ASP-DAC 2006: 742-749
12EEChao-Chung Cheng, Chun-Wei Ku, Tian-Sheuan Chang: A 1280×720 pixels 30 frames/s H.264/MPEG-4 AVC intra encoder. ISCAS 2006
11EEYu-Jen Wang, Chao-Chung Cheng, Tian-Sheuan Chang: A fast fractional pel motion estimation algorithm for H.264/MPEG-4 AVC. ISCAS 2006
10EEGuo-Shiuan Yu, Tian-Sheuan Chang: A zero-skipping multi-symbol CAVLC decoder for MPEG-4 AVC/H.264. ISCAS 2006
9EENelson Yen-Chung Chang, Tian-Sheuan Chang: Combined Frame Memory Motion Compensation for Video Coding. IEEE Trans. Circuits Syst. Video Techn. 16(10): 1280-1285 (2006)
2005
8EEHao-Yun Chin, Chao-Chung Cheng, Yu-Kun Lin, Tian-Sheuan Chang: A bandwidth efficient subsampling-based block matching architecture for motion estimation. ASP-DAC 2005: 7-8
7EEYu-Kun Lin, Tian-Sheuan Chang: Fast block type decision algorithm for intra prediction in H.264 FRext. ICIP (1) 2005: 585-588
6EEChao-Chung Cheng, Tian-Sheuan Chang: Fast three step intra prediction algorithm for 4×4 blocks in H.264. ISCAS (2) 2005: 1509-1512
5EENelson Yen-Chung Chang, Tian-Sheuan Chang: Combined frame memory architecture for motion compensation in video decoding. ISCAS (2) 2005: 1806-1809
4EEHun-Chen Chen, Jiun-In Guo, Tian-Sheuan Chang, Chein-Wei Jen: A memory-efficient realization of cyclic convolution and its application to discrete cosine transform. IEEE Trans. Circuits Syst. Video Techn. 15(3): 445-453 (2005)
3EEHun-Chen Chen, Tian-Sheuan Chang, Jiun-In Guo, Chein-Wei Jen: The Long Length DHT Design with a New Hardware Efficient Distributed Arithmetic Approach and Cyclic Preserving Partitioning. IEICE Transactions 88-C(5): 1061-1069 (2005)
2002
2 Jen-Chieh Tuan, Tian-Sheuan Chang, Chein-Wei Jen: On the data reuse and memory bandwidth analysis for full-search block-matching VLSI architecture. IEEE Trans. Circuits Syst. Video Techn. 12(1): 61-72 (2002)
2000
1 Tian-Sheuan Chang, Chin-Sheng Kung, Chein-Wei Jen: A simple processor core design for DCT/IDCT. IEEE Trans. Circuits Syst. Video Techn. 10(3): 439-447 (2000)

Coauthor Index

1Jing-Chu Chan [24]
2Nelson Yen-Chung Chang [5] [9] [19] [20] [21] [23] [24]
3Wei-Cheng Chang [25]
4Hun-Chen Chen [3] [4]
5Wei-Nien Chen [13]
6Chao-Chung Cheng [6] [8] [11] [12]
7Kai-Ting Cheng [13]
8Hao-Yun Chin [8]
9Jiun-In Guo [3] [4]
10Hsueh-Ming Hang [13]
11Hui-Cheng Hsu [21]
12Jia-Bin Huang [15]
13Chein-Wei Jen [1] [2] [3] [4]
14Chun-Wei Ku [12] [26]
15Chin-Sheng Kung [1]
16Tzu-Yun Kuo [17] [25]
17Kun-Bin Lee [21]
18De-Wei Li [25] [26]
19Chia-Chun Lin [16] [25]
20Hung-Chih Lin [13]
21Ting-Min Lin [19]
22Yu-Kun Lin [7] [8] [15] [16] [17] [25] [26]
23Wei-Cheng Tai [25]
24Chia-Yang Tsai [13]
25Min-Chi Tsai [14]
26Tsung-Hsien Tsai [19] [23]
27Yu-Cheng Tseng [19] [20]
28Jen-Chieh Tuan [2]
29Sin-Bor Wang [22]
30Yu-Jen Wang [11] [13]
31Sian-Jin Wu [25]
32Shang-Yu Yeh [13]
33Guo-Shiuan Yu [10] [18]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)