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Suresh Chalasani Vis

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*2007
44EESuresh Chalasani, Rajendra V. Boppana: Data Architectures for RFID Transactions. IEEE Trans. Industrial Informatics 3(3): 246-257 (2007)
2005
43EEJayavel Sounderpandian, Nancy Frank, Suresh Chalasani: A support system for mediating brownfields redevelopment negotiations. Industrial Management and Data Systems 105(2): 237-254 (2005)
42EESuresh Chalasani, Rajendra V. Boppana: Adaptive Multimodule Routers for Multiprocessor Architectures. Information Systems Frontiers 7(3): 317-327 (2005)
2004
41EESuresh Chalasani, Robert Barber: Architectures for Java-based bioinformatics applications. Industrial Management and Data Systems 104(7): 578-588 (2004)
2003
40EERajendra V. Boppana, Rajesh Boppana, Suresh Chalasani: Designing SANs to Support Low-Fanout Multicasts. HiPC 2003: 217-227
2002
39EESuresh Chalasani, Rajendra V. Boppana: Software Architectures for E-Commerce Computing Systems with External Hosting. ITCC 2002: 504-511
1999
38EERajendra V. Boppana, Suresh Chalasani: Fault-Tolerant Communication with Partitioned Dimension-Order Routers. IEEE Trans. Parallel Distrib. Syst. 10(10): 1026-1039 (1999)
1998
37 Suresh Chalasani, Parameswaran Ramanathan: Parallel FFT on ATM-based networks of workstations. Cluster Computing 1(1): 13-26 (1998)
36EERajendra V. Boppana, Suresh Chalasani, C. S. Raghavendra: Resource Deadlocks and Performance of Wormhole Multicast Routing Algorithms. IEEE Trans. Parallel Distrib. Syst. 9(6): 535-549 (1998)
1997
35EESuresh Chalasani, Parameswaran Ramanathan: Parallel FFT on ATM-based Networks of Workstations. HPDC 1997: 2-11
34 Suresh Chalasani: A New Parallel Algorithm for Time-Slot Assignment in Hierarchical Switching Systems. IEEE Trans. Computers 46(12): 1387-1395 (1997)
33 Suresh Chalasani, Rajendra V. Boppana: Communication in Multicomputers with Nonconvex Faults. IEEE Trans. Computers 46(5): 616-622 (1997)
1996
32EESuresh Chalasani, Rajendra V. Boppana: Fault-Tolerance with Multimodule Routers. HPCA 1996: 201-210
31 Monika ten Bruggencate, Suresh Chalasani: Equivalence Between SP2 High-Performance Switches and Three-Stage CLOS Networks. ICPP, Vol. 1 1996: 1-8
30EERajendra V. Boppana, Suresh Chalasani: A Framework for Designing Deadlock-Free Wormhole Routing Algorithms. IEEE Trans. Parallel Distrib. Syst. 7(2): 169-183 (1996)
29EEFotios K. Liotopoulos, Suresh Chalasani: Semi-rearrangeably nonblocking operation of Clos networks in the multirate environment. IEEE/ACM Trans. Netw. 4(2): 281-291 (1996)
1995
28EESuresh Chalasani, Rajendra V. Boppana: Communication in Multicomputers with Nonconvex Faults. Euro-Par 1995: 673-684
27 Rajendra V. Boppana, Suresh Chalasani: Fault-Tolerant Multicast Communication for Multicomputers. ICPP (1) 1995: 118-125
26 Fotios K. Liotopoulos, Suresh Chalasani: Strictly nonblocking operation of 3-stage Clos switching networks. Modelling and Evaluation of ATM Networks 1995: 269-286
25EEMonika ten Bruggencate, Suresh Chalasani: Parallel Implementations of the Power System Transient Stability Problem on Clusters of Workstations. SC 1995
24 Rajendra V. Boppana, Suresh Chalasani: Fault-Tolerant Wormhole Routing Algorithms for Mesh Networks. IEEE Trans. Computers 44(7): 848-864 (1995)
23EEParameswaran Ramanathan, Suresh Chalasani: Resource Placement with Multiple Adjacency Constraints in k-ary n-Cubes. IEEE Trans. Parallel Distrib. Syst. 6(5): 511-519 (1995)
1994
22 James Puthukattukaran, Suresh Chalasani, Periannan Senapathy: Design and Implementation of Parallel Algorithms for Gene-Finding. HPDC 1994: 186-193
21 Fotios K. Liotopoulos, Suresh Chalasani: Nonblocking Operation of Asymmetrical Clos Networks. ICPP (1) 1994: 101-108
20EESuresh Chalasani, Rajendra V. Boppana: Fault-tolerant wormhole routing in tori. International Conference on Supercomputing 1994: 146-155
19 Fotios K. Liotopoulos, Suresh Chalasani: Semi-centralized routing algorithm for 3-stage Clos networks. Modelling and Evaluation of ATM Networks 1994: 147-176
18EERajendra V. Boppana, Suresh Chalasani: Fault-tolerant routing with non-adaptive wormhole algorithms in mesh networks. SC 1994: 693-702
17 Suresh Chalasani, C. S. Raghavendra, Anujan Varma: Fault-Tolerant Routing in MIN-Based Supercomputers. J. Parallel Distrib. Comput. 22(2): 154-167 (1994)
16 Ge-Ming Chiu, Suresh Chalasani, C. S. Raghavendra: Flexible Routing Criteria for Circuit-Switched Hypercubes. J. Parallel Distrib. Comput. 22(2): 279-294 (1994)
1993
15 Gebre A. Gessesse, Suresh Chalasani: New Degree Four Networks: Properties and Performance. IPPS 1993: 168-172
14 Rajendra V. Boppana, Suresh Chalasani: New Wormhole Routing Algorithms for Multicomputers. IPPS 1993: 419-423
13 Rajendra V. Boppana, Suresh Chalasani: A Comparison of Adaptive Wormhole Routing Algorithms. ISCA 1993: 351-360
1992
12 Parameswaran Ramanathan, Suresh Chalasani: Resource Placement in k-Ary n-Cubes. ICPP (2) 1992: 133-140
11 Anujan Varma, Suresh Chalasani: Asymmetrical Multiconnection Three-Stage Clos Networks. IPPS 1992: 411-414
10 Anujan Varma, Suresh Chalasani: An Incremental Algorithm for TDM Switching Assignments in Satellite and Terrestrial Networks. IEEE Journal on Selected Areas in Communications 10(2): 364-377 (1992)
9 Anujan Varma, Suresh Chalasani: Fault-Tolerance Analysis of One-Sided Crosspoint Switching Networks. IEEE Trans. Computers 41(2): 143-158 (1992)
8EESuresh Chalasani, Anujan Varma: Evaluation of Two Traffic Distribution Strategies for a Dual-Network Multiprocessor System. IEEE Trans. Parallel Distrib. Syst. 3(3): 375-384 (1992)
1991
7EEGe-Ming Chiu, Suresh Chalasani, Cauligi S. Raghavendra: Flexible, fault-tolerant routing criteria for circuit-switched hypercubes. ICDCS 1991: 582-589
6 Suresh Chalasani, Anujan Varma: Efficient Time-Slot Assignment Algorithms for SS/TDMA Systems with Variable-Bandwidth Beams. INFOCOM 1991: 658-667
5 C. S. Raghavendra, Suresh Chalasani, Rajendra V. Boppana: Improved Algorithms for Load Balancing in Circuit-Switched Hypercubes. IPPS 1991: 537-542
1990
4 Suresh Chalasani, Anujan Varma: Fast Parallel Time-Slot Assignment Algorithms for TDM Switching Systems. ICPP (3) 1990: 154-161
3 Suresh Chalasani, Anujan Varma: Analysis and Simalation of Multistage Interconnection Networks under Non-Uniform Traffic. PARBASE / Architectures 1990: 68-87
2EESuresh Chalasani, Anujan Varma, C. S. Raghavendra: Fault-tolerant routing in MIN-based supercomputers. SC 1990: 244-253
1989
1 Anujan Varma, Suresh Chalasani: Reduction of Crosspoints in One-Sided Crosspoint Switching Networks. INFOCOM 1989: 943-952

Coauthor Index

1Robert Barber [41]
2Rajendra V. Boppana [5] [13] [14] [18] [20] [24] [27] [28] [30] [32] [33] [36] [38] [39] [40] [42] [44]
3Rajesh Boppana [40]
4Monika ten Bruggencate [25] [31]
5Ge-Ming Chiu [7] [16]
6Nancy Frank [43]
7Gebre A. Gessesse [15]
8Fotios K. Liotopoulos [19] [21] [26] [29]
9James Puthukattukaran [22]
10Cauligi S. Raghavendra (C. S. Raghavendra) [2] [5] [7] [16] [17] [36]
11Parameswaran Ramanathan (Parmesh Ramanathan) [12] [23] [35] [37]
12Periannan Senapathy [22]
13Jayavel Sounderpandian [43]
14Anujan Varma [1] [2] [3] [4] [6] [8] [9] [10] [11] [17]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)