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P. P. Chakrabarti Vis

Partha Pratim Chakrabarti

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*2009
114EEAritra Hazra, Priyankar Ghosh, Pallab Dasgupta, Partha Pratim Chakrabarti: Inline Assertions - Embedding Formal Properties in a Test Bench. VLSI Design 2009: 71-76
113EEArnab Sinha, Pallab Dasgupta, Bhaskar Pal, Sayantan Das, Prasenjit Basu, P. P. Chakrabarti: Design intent coverage revisited. ACM Trans. Design Autom. Electr. Syst. 14(1): (2009)
112EEDipankar Das, P. P. Chakrabarti, Rajeev Kumar: Scenario-based timing verification of multiprocessor embedded applications. ACM Trans. Design Autom. Electr. Syst. 14(3): (2009)
111EESandip Aine, Rajeev Kumar, P. P. Chakrabarti: Adaptive parameter control of evolutionary algorithms to improve quality-time trade-off. Appl. Soft Comput. 9(2): 527-540 (2009)
2008
110EEAnsuman Banerjee, Sayak Ray, Pallab Dasgupta, Partha Pratim Chakrabarti, S. Ramesh, P. Vignesh V. Ganesan: A Dynamic Assertion-Based Verification Platform for Validation of UML Designs. ATVA 2008: 222-227
109EEAritra Hazra, Ansuman Banerjee, Srobona Mitra, Pallab Dasgupta, Partha Pratim Chakrabarti, Chunduri Rama Mohan: Cohesive Coverage Management for Simulation and Formal Property Verification. ISVLSI 2008: 251-256
108EEAnsuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti: Auxiliary state machines + context-triggered properties in verification. ACM Trans. Design Autom. Electr. Syst. 13(4): (2008)
107EES. K. Panda, Arnab Roy, P. P. Chakrabarti, Rajeev Kumar: Simulation-based verification using Temporally Attributed Boolean Logic. ACM Trans. Design Autom. Electr. Syst. 13(4): (2008)
106EEPravanjan Choudhury, Rajeev Kumar, P. P. Chakrabarti: Hybrid Scheduling of Dynamic Task Graphs with Selective Duplication for Multiprocessors under Memory and Time Constraints. IEEE Trans. Parallel Distrib. Syst. 19(7): 967-980 (2008)
105EESuchismita Roy, P. P. Chakrabarti, Pallab Dasgupta: Satisfiability Models for Maximum Transition Power. IEEE Trans. VLSI Syst. 16(8): 941-951 (2008)
2007
104EEArijit Mondal, P. P. Chakrabarti, Pallab Dasgupta: Timing Analysis of Sequential Circuits Using Symbolic Event Propagation. ICCTA 2007: 151-157
103EESandip Aine, P. P. Chakrabarti, Rajeev Kumar: AWA* - A Window Constrained Anytime Heuristic Search Algorithm. IJCAI 2007: 2250-2255
102EESuchismita Roy, P. P. Chakrabarti, Pallab Dasgupta: Bounded Delay Timing Analysis Using Boolean Satisfiability. VLSI Design 2007: 295-302
101EES. K. Panda, Arnab Roy, P. P. Chakrabarti, Rajeev Kumar: Simulation Based Verification using Temporally Attributed Boolean Logic. VLSI Design 2007: 57-62
100EEPravanjan Choudhury, P. P. Chakrabarti, Rajeev Kumar: Online Dynamic Voltage Scaling using Task Graph Mapping Analysis for Multiprocessors. VLSI Design 2007: 89-94
99EESayak Ray, Pallab Dasgupta, P. P. Chakrabarti: A New Pseudo-Boolean Satisfiability based approach to Power Mode Schedulability Analysis. VLSI Design 2007: 95-102
98EETathagato Rai Dastidar, P. P. Chakrabarti: A verification system for transient response of analog circuits. ACM Trans. Design Autom. Electr. Syst. 12(3): (2007)
97EESuchismita Roy, P. P. Chakrabarti, Pallab Dasgupta: Event propagation for accurate circuit delay calculation using SAT. ACM Trans. Design Autom. Electr. Syst. 12(3): (2007)
96EEDipankar Das, P. P. Chakrabarti, Rajeev Kumar: Functional verification of task partitioning for multiprocessor embedded systems. ACM Trans. Design Autom. Electr. Syst. 12(4): (2007)
95EEAbhishek Somani, P. P. Chakrabarti, Amit Patra: An Evolutionary Algorithm-Based Approach to Automated Design of Analog and RF Circuits Using Adaptive Normalized Cost Functions. IEEE Trans. Evolutionary Computation 11(3): 336-353 (2007)
94EESandip Aine, P. P. Chakrabarti, Rajeev Kumar: An Automated Meta-Level Control Framework for Optimizing the Quality-Time Tradeoff of VLSI Algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 26(11): 1992-2008 (2007)
93EEBhaskar Pal, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti: BUSpec: A framework for generation of verification aids for standard bus protocol specifications. Integration 40(3): 285-304 (2007)
2006
92EEDipankar Das, Rajeev Kumar, P. P. Chakrabarti: Timing Verification of UML Activity Diagram Based Code Block Level Models for Real Time Multiprocessor System-on-Chip Applications. APSEC 2006: 199-208
91EEPrasenjit Basu, Sayantan Das, Pallab Dasgupta, Partha Pratim Chakrabarti: Discovering the input assumptions in specification refinement coverage. ASP-DAC 2006: 13-18
90EESayantan Das, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti: What lies between design intent coverage and model checking? DATE 2006: 1217-1222
89EESayantan Das, Rizi Mohanty, Pallab Dasgupta, P. P. Chakrabarti: Synthesis of system verilog assertions. DATE Designers' Forum 2006: 70-75
88EERajeev Kumar, Rahul Chaudhry, Dipankar Das, Vibha Rathi, S. K. Panda, P. P. Chakrabarti: SystemC Modeling and Validation of A RISC Processor System. FDL 2006: 189-197
87EEAbhishek Somani, P. P. Chakrabarti, Amit Patra: A model-based hybrid evolutionary algorithm for fast yield-inclusive design space exploration of analog circuits. ISCAS 2006
86EEAnsuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti: Formal methods for checking realizability of coalitions in 3-party systems. MEMOCODE 2006: 198
85EEDiganchal Chakraborty, P. P. Chakrabarti, Arijit Mondal, Pallab Dasgupta: A Framework for Estimating Peak Power in Gate-Level Circuits. PATMOS 2006: 573-582
84EESamik Das, P. P. Chakrabarti, Pallab Dasgupta: Instruction-Set-Extension Exploration Using Decomposable Heuristic Search. VLSI Design 2006: 293-298
83EEArnab Sarkar, P. P. Chakrabarti, Rajeev Kumar: Frame Based Fair Multiprocessor Scheduler: A Fast Fair Algorithm for Real-Time Embedded Systems. VLSI Design 2006: 677-682
82EESandip Aine, P. P. Chakrabarti, Rajeev Kumar: Improving the Performance of CAD Optimization Algorithms Using On-Line Meta-Level Control. VLSI Design 2006: 683-688
81EEArnab Sarkar, P. P. Chakrabarti, Rajeev Kumar: Frame-Based Proportional Round-Robin. IEEE Trans. Computers 55(9): 1121-1129 (2006)
80EEPrasenjit Basu, Sayantan Das, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni: Design-Intent Coverage - A New Paradigm for Formal Property Verification. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 1922-1934 (2006)
79EEArijit Mondal, P. P. Chakrabarti: Reasoning about timing behavior of digital circuits using symbolic event propagation and temporal logic. IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1793-1814 (2006)
2005
78EESandip Aine, Rajeev Kumar, P. P. Chakrabarti: An Adaptive Framework for Solving Multiple Hard Problems Under Time Constraints. CIS (1) 2005: 57-64
77EEAbhishek Somani, Partha Pratim Chakrabarti, Amit Patra: Mixing Global and Local Competition in Genetic Optimization based Design Space Exploration of Analog Circuits. DATE 2005: 1064-1069
76EERajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti: Multiobjective EA Approach for Improved Quality of Solutions for Spanning Tree Problem. EMO 2005: 811-825
75 Suchismita Roy, Sayantan Das, Prasenjit Basu, Pallab Dasgupta, Partha Pratim Chakrabarti: SAT based solutions for consistency problems in formal property specifications for open systems. ICCAD 2005: 885-888
74 Sandip Aine, Rajeev Kumar, P. P. Chakrabarti: Adaptive Control of Anytime Algorithm Parameters. IICAI 2005: 72-87
73EETathagato Rai Dastidar, P. P. Chakrabarti: A Verification System for Transient Response of Analog Circuits Using Model Checking. VLSI Design 2005: 195-200
72EESayantan Das, Ansuman Banerjee, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix: Formal Methods for Analyzing the Completeness of an Assertion Suite against a High-Level Fault Model. VLSI Design 2005: 201-206
71EEPrasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti: Syntactic Transformation of Assume-Guarantee Assertions: From Sub-Modules to Modules. VLSI Design 2005: 213-218
70EEAbhishek Somani, P. P. Chakrabarti, Amit Patra: A Hierarchical Cost Tree Mutation Approach to Optimization of Analog Circuits. VLSI Design 2005: 535-538
69EEDipankar Das, Rajeev Kumar, P. P. Chakrabarti: Dictionary Based Code Compression for Variable Length Instruction Encodings. VLSI Design 2005: 545-550
68EEArnab Roy, S. K. Panda, Rajeev Kumar, P. P. Chakrabarti: A framework for systematic validation and debugging of pipeline simulators. ACM Trans. Design Autom. Electr. Syst. 10(3): 462-491 (2005)
67EETathagato Rai Dastidar, P. P. Chakrabarti, Partha Ray: A synthesis system for analog circuits based on evolutionary search and topological reuse. IEEE Trans. Evolutionary Computation 9(2): 211-224 (2005)
66EERajeev Kumar, Amit Gupta, B. S. Pankaj, Mrinmoy Ghosh, P. P. Chakrabarti: Post-compilation optimization for multiple gains with pattern matching. SIGPLAN Notices 40(12): 14-23 (2005)
2004
65EEArijit Mondal, P. P. Chakrabarti, Chittaranjan A. Mandal: A New Approach to Timing Analysis Using Event Propagation and Temporal Logic. DATE 2004: 1198-1203
64EEPrasenjit Basu, Sayantan Das, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix: Formal Verification Coverage: Are the RTL-Properties Covering the Design's Architectural Intent? DATE 2004: 668-669
63EERajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti: Improved Quality of Solutions for Multiobjective Spanning Tree Problem Using Distributed Evolutionary Algorithm. HiPC 2004: 494-503
62EESayantan Das, Prasenjit Basu, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni: Formal verification coverage: computing the coverage gap between temporal specifications. ICCAD 2004: 198-203
61EERajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti: Multiobjective Genetic Search for Spanning Tree Problem. ICONIP 2004: 218-223
60EEKrishnendu Chatterjee, Pallab Dasgupta, P. P. Chakrabarti: Complexity of Compositional Model Checking of Computation Tree Logic on Simple Structures. IWDC 2004: 102-113
59EERajeev Kumar, Pramod Kumar Singh, P. P. Chakrabarti: Distributed Evolutionary Algorithm Search for Multiobjective Spanning Tree Problem. IWDC 2004: 538
58EEBhaskar Pal, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti: The BUSpec platform for automated generation of verification aids for standard bus protocols. MEMOCODE 2004: 119-128
57EEAnsuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti: Formal Verification of Modules under Real Time Environment Constraints. VLSI Design 2004: 103-108
56EEPrasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan: Property Refinement Techniques for Enhancing Coverage of Formal Property Verification. VLSI Design 2004: 109-114
55EEKrishnendu Chatterjee, Pallab Dasgupta, P. P. Chakrabarti: The power of first-order quantification over states in branching and linear time temporal logics. Inf. Process. Lett. 91(5): 201-210 (2004)
2003
54EEAnsuman Banerjee, Pallab Dasgupta, Partha Pratim Chakrabarti: Open computation tree logic with fairness. ISCAS (5) 2003: 249-252
53 Krishnendu Chatterjee, Pallab Dasgupta, P. P. Chakrabarti: A Branching Time Temporal Framework for Quantitative Reasoning. J. Autom. Reasoning 30(2): 205-232 (2003)
2002
52EEArindam Chakrabarti, Pallab Dasgupta, P. P. Chakrabarti, Ansuman Banerjee: Formal verification of module interfaces against real time specifications. DAC 2002: 141-145
51EEB. Rajendran, V. Kheterpal, A. Das, J. Majumder, Chittaranjan A. Mandal, P. P. Chakrabarti: Timing analysis of tree-like RLC circuits. ISCAS (4) 2002: 838-841
50EEPallab Dasgupta, Arindam Chakrabarti, P. P. Chakrabarti: Open Computation Tree Logic for Formal Verification of Modules. VLSI Design 2002: 735-740
49EEPallab Dasgupta, P. P. Chakrabarti, Arnab Dey, Sujoy Ghose, Wolfgang Bibel: Solving Constraint Optimization Problems from CLP-Style Specifications Using Heuristic Search Techniques. IEEE Trans. Knowl. Data Eng. 14(2): 353-368 (2002)
48EEAnindya C. Patthak, Indrajit Bhattacharya, Anirban Dasgupta, Pallab Dasgupta, P. P. Chakrabarti: Quantified Computation Tree Logic. Inf. Process. Lett. 82(3): 123-129 (2002)
2001
47EEPallab Dasgupta, P. P. Chakrabarti, Amit Nandi, Sekar Krishna, Arindam Chakrabarti: Abstraction of word-level linear arithmetic functions from bit-level component descriptions. DATE 2001: 4-8
46EES. Sriram, R. Tandon, Pallab Dasgupta, P. P. Chakrabarti: Symbolic verification of Boolean constraints over partially specified functions. ISCAS (5) 2001: 113-116
45EEJatindra Kumar Deka, S. Chaki, Pallab Dasgupta, P. P. Chakrabarti: Abstractions for model checking of event timings. ISCAS (5) 2001: 125-128
44EEPallab Dasgupta, P. P. Chakrabarti, Jatindra Kumar Deka, Sriram Sankaranarayanan: Min-max Computation Tree Logic. Artif. Intell. 127(1): 137-162 (2001)
2000
43EEChittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose: GABIND: a GA approach to allocation and binding for the high-level synthesis of data paths. IEEE Trans. VLSI Syst. 8(6): 747-750 (2000)
42EEPallab Dasgupta, Jatindra Kumar Deka, Partha Pratim Chakrabarti: Model checking on timed-event structures. IEEE Trans. on CAD of Integrated Circuits and Systems 19(5): 601-611 (2000)
1999
41EEPartha Pratim Chakrabarti, Pallab Dasgupta, Partha Pratim Das, Arnob Roy, Shuvendu K. Lahiri, Mrinal Bose: Controlling State Explosion in Static Simulation by Selective Composition. VLSI Design 1999: 226-231
40EEJatindra Kumar Deka, Pallab Dasgupta, P. P. Chakrabarti: An Efficiently Checkable Subset of TCTL for Formal Verification of Transition Systems with Delays. VLSI Design 1999: 294-299
39EEPankaj Chauhan, Pallab Dasgupta, P. P. Chakrabarti: Exploiting Isomorphism for Compaction and Faster Simulation of Binary Decision Diagrams. VLSI Design 1999: 324-
38 P. P. Chakrabarti: Partial Precedence Constrained Scheduling. IEEE Trans. Computers 48(10): 1127-1130 (1999)
37EEChittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose: A design space exploration scheme for data-path synthesis. IEEE Trans. VLSI Syst. 7(3): 331-338 (1999)
1998
36EESudeshna Sarkar, P. P. Chakrabarti, Sujoy Ghose: A Framework for Learning in Search-Based Systems. IEEE Trans. Knowl. Data Eng. 10(4): 563-575 (1998)
35 Sudeshna Sarkar, P. P. Chakrabarti, Sujoy Ghose: Learning while solving problems in best first search. IEEE Transactions on Systems, Man, and Cybernetics, Part A 28(4): 535-541 (1998)
1997
34EEChittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose: Design Space Exploration for Data Path Synthesis. VLSI Design 1997: 166-173
1996
33EEPallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: A New Competitive Algorithm for Agent Searching in Unknown Streets. FSTTCS 1996: 147-155
32EEChittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose: Allocation and Binding in Data Path Synthesis Using a Genetic Algorithm Approach. VLSI Design 1996: 122-125
31EEPallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: Searching Game Trees under a Partial Order. Artif. Intell. 82(1-2): 237-257 (1996)
30EEChunduri Rama Mohan, Partha Pratim Chakrabarti: EARTH: combined state assignment of PLA-based FSM's targeting area and testability. IEEE Trans. on CAD of Integrated Circuits and Systems 15(7): 727-731 (1996)
29EEPallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: Agent Search in Uniform b-Ary Trees: Multiple Goals and Unequal Costs. Inf. Process. Lett. 58(6): 311-318 (1996)
28 Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: Multiobjektive Heuristic Search in AND/OR Graphs. J. Algorithms 20(2): 282-311 (1996)
1995
27EEPallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: A Near Optimal Algorithm for the Extended Cow-Path Problem in the Presence of Relative Errors. FSTTCS 1995: 22-36
26EEChunduri Rama Mohan, Partha Pratim Chakrabarti: Combined optimization of area and testability during state assignment of PLA-based FSM's. VLSI Design 1995: 408-413
25EEPallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: A Correction to "Agent Searching in a Tree and the Optimality of Iterative Deepening". Artif. Intell. 77(1): 173-176 (1995)
24EEPallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: Utility of Pathmax in Partial Order Heuristic Search. Inf. Process. Lett. 55(6): 317-322 (1995)
1994
23EEChunduri Rama Mohan, Partha Pratim Chakrabarti: A new approach for factorizing FSM's. ICCAD 1994: 698-701
22 Chunduri Rama Mohan, Partha Pratim Chakrabarti: A New Approach to Synthesis of PLA-Based FSM's. VLSI Design 1994: 373-378
21 Pallab Dasgupta, Prasenjit Mitra, P. P. Chakrabarti, S. C. De Sarkar: Multiobjective Search in VLSI Design. VLSI Design 1994: 395-400
20 P. P. Chakrabarti: Algorithms for Searching Explicit AND/OR Graphs and their Applications to Problem Reduction Search. Artif. Intell. 65(2): 329-345 (1994)
19 Pallab Dasgupta, P. P. Chakrabarti, S. C. De Sarkar: Agent Searching in a Tree and the Optimality of Iterative Deepening. Artif. Intell. 71(1): 195-208 (1994)
18 U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Improving Greedy Algorithms by Lookahead-Search. J. Algorithms 16(1): 1-23 (1994)
1993
17 Chunduri Rama Mohan, Partha Pratim Chakrabarti, Sujoy Ghose: Combining State Assignment with PLA Folding. VLSI Design 1993: 9-14
1992
16 Prabir K. Biswas, Jayanta Mukherjee, B. N. Chatterji, Partha Pratim Chakrabarti: Qualitative Description of Three-Dimensional Scenes. IJPRAI 6(4): 651-672 (1992)
15 U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Effective Use of Memory in Iterative Deepening Search. Inf. Process. Lett. 42(1): 47-52 (1992)
14 U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: A Simple 0.5-Bounded Greedy Algorithm for the 0/1 Knapsack Problem. Inf. Process. Lett. 42(3): 173-177 (1992)
13EEP. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Generalized best first search using single and multiple heuristics. Inf. Sci. 60(1-2): 145-175 (1992)
12 P. P. Chakrabarti, Sujoy Ghose: A General Best First Search Algorithm in AND/OR Graphs. J. Algorithms 13(2): 177-187 (1992)
1991
11 U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Reducing Reexpansions in Iterative-Deepening Search by Controlling Cutoff Bounds. Artif. Intell. 50(2): 207-221 (1991)
10 U. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Multiple Stack Branch and Bound. Inf. Process. Lett. 37(1): 43-48 (1991)
1989
9EEU. K. Sarkar, P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Pruning by Upperbounds in Heuristic Search: Use of Approximate Algorithms. KBCS 1989: 451-461
8 P. P. Chakrabarti, Sujoy Ghose, Arup Acharya, S. C. De Sarkar: Heuristic Search in Restricted Memory. Artif. Intell. 41(2): 197-221 (1989)
7 P. P. Chakrabarti, Sujoy Ghose, A. Pandey, S. C. De Sarkar: Increasing Search Efficiency Using Multiple Heuristics. Inf. Process. Lett. 30(1): 33-36 (1989)
6 P. P. Chakrabarti, Sujoy Ghose, A. Pandey, S. C. De Sarkar: Increasing Search Efficiency Using Multiple Heuristics. Inf. Process. Lett. 32(5): 275-275 (1989)
1988
5EEP. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Best first search in and/or graphs. ACM Conference on Computer Science 1988: 256-261
1987
4 P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Admissibility of A0* when Heuristics Overestimate. Artif. Intell. 34(1): 97-113 (1987)
3EEPartha Pratim Das, P. P. Chakrabarti, Biswanath N. Chatterji: Generalized distances in digital geometry. Inf. Sci. 42(1): 51-67 (1987)
2EEPartha Pratim Das, P. P. Chakrabarti, Biswanath N. Chatterji: Distance functions in digital geometry. Inf. Sci. 42(2): 113-136 (1987)
1986
1 P. P. Chakrabarti, Sujoy Ghose, S. C. De Sarkar: Heuristic Search Through Islands. Artif. Intell. 29(3): 339-347 (1986)

Coauthor Index

1Arup Acharya [8]
2Sandip Aine [74] [78] [82] [94] [103] [111]
3Roy Armoni [62] [80]
4Ansuman Banerjee [52] [54] [57] [58] [62] [72] [80] [86] [93] [108] [109] [110]
5Prasenjit Basu [56] [62] [64] [71] [72] [75] [80] [90] [91] [113]
6Indrajit Bhattacharya [48]
7Wolfgang Bibel [49]
8Prabir Kumar Biswas (Prabir K. Biswas) [16]
9Mrinal Bose [41]
10S. Chaki [45]
11Arindam Chakrabarti [47] [50] [52]
12Diganchal Chakraborty [85]
13Krishnendu Chatterjee [53] [55] [60]
14Biswanath N. Chatterji (B. N. Chatterji) [2] [3] [16]
15Rahul Chaudhry [88]
16Pankaj Chauhan [39]
17Pravanjan Choudhury [100] [106]
18A. Das [51]
19Dipankar Das [69] [88] [92] [96] [112]
20Partha Pratim Das [2] [3] [41]
21Samik Das [84]
22Sayantan Das [62] [64] [72] [75] [80] [89] [90] [91] [113]
23Anirban Dasgupta [48]
24Pallab Dasgupta [19] [21] [24] [25] [27] [28] [29] [31] [33] [39] [40] [41] [42] [44] [45] [46] [47] [48] [49] [50] [52] [53] [54] [55] [56] [57] [58] [60] [62] [64] [71] [72] [75] [80] [84] [85] [86] [89] [90] [91] [93] [97] [99] [102] [104] [105] [108] [109] [110] [113] [114]
25Tathagato Rai Dastidar [67] [73] [98]
26Jatindra Kumar Deka [40] [42] [44] [45]
27Arnab Dey [49]
28Limor Fix [62] [64] [72] [80]
29P. Vignesh V. Ganesan [110]
30Sujoy Ghose [1] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [17] [18] [32] [34] [35] [36] [37] [43] [49]
31Mrinmoy Ghosh [66]
32Priyankar Ghosh [114]
33Amit Gupta [66]
34Aritra Hazra [109] [114]
35V. Kheterpal [51]
36Sekar Krishna [47]
37Rajeev Kumar [59] [61] [63] [66] [68] [69] [74] [76] [78] [81] [82] [83] [88] [92] [94] [96] [100] [101] [103] [106] [107] [111] [112]
38Shuvendu K. Lahiri [41]
39J. Majumder [51]
40Chittaranjan A. Mandal (Chitta Mandal) [32] [34] [37] [43] [51] [65]
41Prasenjit Mitra [21]
42Srobona Mitra [109]
43Chunduri Rama Mohan [17] [22] [23] [26] [30] [56] [62] [64] [72] [80] [109]
44Rizi Mohanty [89]
45Arijit Mondal [65] [79] [85] [104]
46Jayanta Mukherjee [16]
47Amit Nandi [47]
48Bhaskar Pal [58] [93] [113]
49S. K. Panda [68] [88] [101] [107]
50A. Pandey [6] [7]
51B. S. Pankaj [66]
52Amit Patra [70] [77] [87] [95]
53Anindya C. Patthak [48]
54B. Rajendran [51]
55S. Ramesh (Sethu Ramesh) [110]
56Vibha Rathi [88]
57Partha Ray [67]
58Sayak Ray [99] [110]
59Arnab Roy [68] [101] [107]
60Arnob Roy [41]
61Suchismita Roy [75] [97] [102] [105]
62Sriram Sankaranarayanan [44]
63Arnab Sarkar [81] [83]
64S. C. De Sarkar [1] [4] [5] [6] [7] [8] [9] [10] [11] [13] [14] [15] [18] [19] [21] [24] [25] [27] [28] [29] [31] [33]
65Sudeshna Sarkar [35] [36]
66U. K. Sarkar [9] [10] [11] [14] [15] [18]
67Pramod Kumar Singh [59] [61] [63] [76]
68Arnab Sinha [113]
69Abhishek Somani [70] [77] [87] [95]
70S. Sriram [46]
71R. Tandon [46]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)