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Francisco J. Cazorla Vis

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*2009
27EEMarco Paolieri, Eduardo Quiñones, Francisco J. Cazorla, Guillem Bernat, Mateo Valero: Hardware support for WCET analysis of hard real-time multicore systems. ISCA 2009: 57-68
2008
26EECarlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, Mateo Valero: Soft Real-Time Scheduling on SMT Processors with Explicit Resource Allocation. ARCS 2008: 173-187
25EEPedro A. Castillo, Antonio Miguel Mora, Juan Julián Merelo Guervós, Juan Luís Jiménez Laredo, Miquel Moretó, Francisco J. Cazorla, Mateo Valero, Sally A. McKee: Architecture Performance Prediction Using Evolutionary Artificial Neural Networks. EvoWorkshops 2008: 175-183
24EEMiquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero: MLP-Aware Dynamic Cache Partitioning. HiPEAC 2008: 337-352
23EECarmelo Acosta, Francisco J. Cazorla, Alex Ramírez, Mateo Valero: MFLUSH: Handling Long-Latency Loads in SMT On-Chip Multiprocessors. ICPP 2008: 173-181
22EEPedro A. Castillo Valdivieso, Juan Julián Merelo Guervós, Miquel Moretó, Francisco J. Cazorla, Mateo Valero, Antonio Miguel Mora, Juan Luís Jiménez Laredo, Sally A. McKee: Evolutionary system for prediction and optimization of hardware architecture performance. IEEE Congress on Evolutionary Computation 2008: 1941-1948
21EECarlos Boneti, Roberto Gioiosa, Francisco J. Cazorla, Julita Corbalán, Jesús Labarta, Mateo Valero: Balancing HPC applications through smart allocation of resources in MT processors. IPDPS 2008: 1-12
20EEMiquel Pericàs, Adrián Cristal, Francisco J. Cazorla, Ruden González, Alexander V. Veidenbaum, Daniel A. Jiménez, Mateo Valero: A Two-Level Load/Store Queue Based on Execution Locality. ISCA 2008: 25-36
19EECarlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Chen-Yong Cher, Mateo Valero: Software-Controlled Priority Characterization of POWER5 Processor. ISCA 2008: 415-426
18EECarlos Boneti, Roberto Gioiosa, Francisco J. Cazorla, Mateo Valero: A dynamic scheduler for balancing HPC applications. SC 2008: 41
2007
17EEMiquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero: Online Prediction of Applications Cache Utility. ICSAMOS 2007: 169-177
16EEFrancisco J. Cazorla, Enrique Fernández, Peter M. W. Knijnenburg, Alex Ramírez, Rizos Sakellariou, Mateo Valero: On the Problem of Minimizing Workload Execution Time in SMT Processors. ICSAMOS 2007: 66-73
15EEMiquel Pericàs, Adrián Cristal, Francisco J. Cazorla, Ruben Gonzalez, Daniel A. Jiménez, Mateo Valero: A Flexible Heterogeneous Multi-Core Architecture. PACT 2007: 13-24
14EEJavier Vera, Francisco J. Cazorla, Alex Pajuelo, Oliverio J. Santana, Enrique Fernández, Mateo Valero: FAME: FAirly MEasuring Multithreaded Architectures. PACT 2007: 305-316
13EEMiquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero: MLP-Aware Dynamic Cache Partitioning. PACT 2007: 418
12EEMiquel Moretó, Francisco J. Cazorla, Alex Ramírez, Mateo Valero: Explaining Dynamic Cache Partitioning Speed Ups. Computer Architecture Letters 6(1): 1-4 (2007)
2006
11EEFrancisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero: Predictable Performance in SMT Processors: Synergy between the OS and SMTs. IEEE Trans. Computers 55(7): 785-799 (2006)
2005
10EEFrancisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero: Architectural support for real-time task scheduling in SMT processors. CASES 2005: 166-176
9EEAdrián Cristal, Oliverio J. Santana, Francisco J. Cazorla, Marco Galluzzi, Tanausú Ramírez, Miquel Pericàs, Mateo Valero: Kilo-Instruction Processors: Overcoming the Memory Wall. IEEE Micro 25(3): 48-57 (2005)
2004
8EEFrancisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero: Predictable performance in SMT processors. Conf. Computing Frontiers 2004: 433-443
7EEFrancisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero: Implicit vs. Explicit Resource Allocation in SMT Processors. DSD 2004: 44-51
6EEFrancisco J. Cazorla, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández, Alex Ramírez, Mateo Valero: Feasibility of QoS for SMT. Euro-Par 2004: 535-540
5EEFrancisco J. Cazorla, Alex Ramírez, Mateo Valero, Enrique Fernández: DCache Warn: An I-Fetch Policy to Increase SMT Efficiency. IPDPS 2004
4EEFrancisco J. Cazorla, Alex Ramírez, Mateo Valero, Enrique Fernández: Dynamically Controlled Resource Allocation in SMT Processors. MICRO 2004: 171-182
3EEFrancisco J. Cazorla, Alex Ramírez, Mateo Valero, Peter M. W. Knijnenburg, Rizos Sakellariou, Enrique Fernández: QoS for High-Performance SMT Processors in Embedded Systems. IEEE Micro 24(4): 24-31 (2004)
2EEFrancisco J. Cazorla, Alex Ramírez, Mateo Valero, Enrique Fernández: Optimising long-latency-load-aware fetch policies for SMT processors. IJHPCN 2(1): 45-54 (2004)
2003
1EEFrancisco J. Cazorla, Enrique Fernández, Alex Ramírez, Mateo Valero: Improving Memory Latency Aware Fetch Policies for SMT Processors. ISHPC 2003: 70-85

Coauthor Index

1Carmelo Acosta [23]
2Guillem Bernat [27]
3Carlos Boneti [18] [19] [21] [26]
4Alper Buyuktosunoglu [19]
5Chen-Yong Cher [19]
6Julita Corbalán [21]
7Adrián Cristal [9] [15] [20]
8Enrique Fernández [1] [2] [3] [4] [5] [6] [7] [8] [10] [11] [14] [16]
9Marco Galluzzi [9]
10Roberto Gioiosa [18] [19] [21] [26]
11Ruben Gonzalez [15]
12Ruden González [20]
13Juan Julián Merelo Guervós (Juan J. Merelo Guervós) [22] [25]
14Daniel A. Jiménez [15] [20]
15Peter M. W. Knijnenburg [3] [6] [7] [8] [10] [11] [16]
16Jesús Labarta [21]
17Juan Luís Jiménez Laredo [22] [25]
18Sally A. McKee [22] [25]
19Antonio Miguel Mora (Antonio Mora) [22] [25]
20Miquel Moretó [12] [13] [17] [22] [24] [25]
21Alex Pajuelo [14]
22Marco Paolieri [27]
23Miquel Pericàs [9] [15] [20]
24Eduardo Quiñones [27]
25Alex Ramírez [1] [2] [3] [4] [5] [6] [7] [8] [10] [11] [12] [13] [16] [17] [23] [24]
26Tanausú Ramírez [9]
27Rizos Sakellariou [3] [6] [7] [8] [10] [11] [16]
28Oliverio J. Santana [9] [14]
29Pedro A. Castillo Valdivieso (Pedro A. Castillo) [22] [25]
30Mateo Valero [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27]
31Alexander V. Veidenbaum [20]
32Javier Vera [14]

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)