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Steven M. Burns Vis

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*2007
14EESteven M. Burns, Mahesh Ketkar, Noel Menezes, Keith A. Bowman, James Tschanz, Vivek De: Comparative Analysis of Conventional and Statistical Design Techniques. DAC 2007: 238-243
2002
13EETanay Karnik, Yibin Ye, James Tschanz, Liqiong Wei, Steven M. Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar: Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors. DAC 2002: 486-491
12EEJordi Cortadella, Michael Kishinevsky, Steven M. Burns, Alex Kondratyev, Luciano Lavagno, Ken S. Stevens, Alexander Taubin, Alexandre Yakovlev: Lazy transition systems and asynchronous circuit synthesis withrelative timing assumptions. IEEE Trans. on CAD of Integrated Circuits and Systems 21(2): 109-130 (2002)
1999
11EEKen S. Stevens, Shai Rotem, Steven M. Burns, Jordi Cortadella, Ran Ginosar, Michael Kishinevsky, Marly Roncken: CAD Directions for High Performance Asynchronous Circuits. DAC 1999: 116-121
10EEJordi Cortadella, Michael Kishinevsky, Steven M. Burns, Ken S. Stevens: Synthesis of asynchronous control circuits with automatically generated relative timing assumptions. ICCAD 1999: 324-331
1997
9 Henrik Hulgaard, Steven M. Burns: Bounded Delay Timing Analysis of a Class of CSP Programs. Formal Methods in System Design 11(3): 265-294 (1997)
1995
8EEHenrik Hulgaard, Steven M. Burns: Efficient Timing Analysis of a Class of Petri Nets. CAV 1995: 423-436
7EEHenrik Hulgaard, Steven M. Burns, Tod Amon, Gaetano Borriello: An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems. IEEE Trans. Computers 44(11): 1306-1317 (1995)
6EECarl Ebeling, Larry McMurchie, Scott Hauck, Steven M. Burns: Placement and routing tools for the Triptych FPGA. IEEE Trans. VLSI Syst. 3(4): 473-482 (1995)
5EEGaetano Borriello, Carl Ebeling, Scott Hauck, Steven M. Burns: The Triptych FPGA architecture. IEEE Trans. VLSI Syst. 3(4): 491-501 (1995)
1994
4 Scott Hauck, Steven M. Burns, Gaetano Borriello, Carl Ebeling: An FPGA for Implementing Asynchronous Circuits. IEEE Design & Test of Computers 11(3): 60-69 (1994)
1993
3EEHenrik Hulgaard, Steven M. Burns, Tod Amon, Gaetano Borriello: Practical applications of an efficient time separation of events algorithm. ICCAD 1993: 146-151
2 Tod Amon, Henrik Hulgaard, Steven M. Burns, Gaetano Borriello: An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems. ICCD 1993: 166-173
1992
1 Scott Hauck, Gaetano Borriello, Steven M. Burns, Carl Ebeling: MONTAGNE: An FPL for Synchronous and Asynchronous Circuits. FPL 1992: 44-51

Coauthor Index

1Tod Amon [2] [3] [7]
2Shekhar Y. Borkar (Shekhar Borkar) [13]
3Gaetano Borriello [1] [2] [3] [4] [5] [7]
4Keith A. Bowman [14]
5Jordi Cortadella [10] [11] [12]
6Vivek De [13] [14]
7Carl Ebeling [1] [4] [5] [6]
8Ran Ginosar [11]
9Venkatesh Govindarajulu [13]
10Scott Hauck [1] [4] [5] [6]
11Henrik Hulgaard [2] [3] [7] [8] [9]
12Tanay Karnik [13]
13Mahesh Ketkar [14]
14Michael Kishinevsky [10] [11] [12]
15Alex Kondratyev [12]
16Luciano Lavagno [12]
17Larry McMurchie [6]
18Noel Menezes [14]
19Marly Roncken [11]
20Shai Rotem [11]
21Ken S. Stevens [10] [11] [12]
22Alexander Taubin [12]
23James Tschanz [13] [14]
24Liqiong Wei [13]
25Alexandre Yakovlev [12]
26Yibin Ye [13]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)