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Erik Brunvand Vis

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*2009
30EEJosef B. Spjut, Andrew E. Kensler, Erik Brunvand: Hardware-accelerated gradient noise for graphics. ACM Great Lakes Symposium on VLSI 2009: 457-462
2008
29EEJosef B. Spjut, Solomon Boulos, Daniel Kopta, Erik Brunvand, Spencer Kellis: TRaX: A Multi-Threaded Architecture for Real-Time Ray Tracing. SASP 2008: 108-114
28EEPeter Shirley, Kelvin Sung, Erik Brunvand, Alan L. Davis, Steven G. Parker, Solomon Boulos: Fast ray tracing and the potential effects on graphics and gaming courses. Computers & Graphics 32(2): 260-267 (2008)
2005
27EEGaurav Gulati, Erik Brunvand: Design of a cell library for asynchronous microengines. ACM Great Lakes Symposium on VLSI 2005: 385-389
2004
26EEDave Nellans, Vamshi Krishna Kadaru, Erik Brunvand: ARCS: an architectural level communication driven simulator. ACM Great Lakes Symposium on VLSI 2004: 73-77
2003
25EEJung-Lin Yang, Erik Brunvand: Using dynamic domino circuits in self-timed systems. ACM Great Lakes Symposium on VLSI 2003: 253-256
24EEJung-Lin Yang, Erik Brunvand: Self-Timed Design with Dynamic Domino Circuits. ISVLSI 2003: 217-219
2000
23EEHans M. Jacobson, Erik Brunvand, Ganesh Gopalakrishnan, Prabhakar Kudva: High-Level Asynchronous System Design Using the ACK Framework. ASYNC 2000: 93-103
1999
22EEErik Brunvand, Steven M. Nowick, Kenneth Y. Yun: Practical Advances in Asynchronous Design and in Asynchronous/Synchronous Interfaces. DAC 1999: 104-109
21EEJohn B. Carter, Wilson C. Hsieh, Leigh Stoller, Mark R. Swanson, Lixin Zhang, Erik Brunvand, Al Davis, Chen-Chi Kuo, Ravindra Kuramkote, Michael Parker, Lambert Schaelicke, Terry Tateyama: Impulse: Building a Smarter Memory Controller. HPCA 1999: 70-79
20EEGanesh Gopalakrishnan, Prabhakar Kudva, Erik Brunvand: Peephole optimization of asynchronous macromodule networks. IEEE Trans. VLSI Syst. 7(1): 30-37 (1999)
1998
19EEJohn B. Carter, Wilson C. Hsieh, Mark R. Swanson, Lixin Zhang, Erik Brunvand, Al Davis, Chen-Chi Kuo, Ravindra Kuramkote, Michael Parker, Lambert Schaelicke, Leigh Stoller, Terry Tateyama: Memory System Support for Irregular Applications. LCR 1998: 17-26
1997
18 Erik Brunvand, Steven M. Nowick, Kenneth Y. Yun: Practical Advances in Asynchronous Design. ICCD 1997: 662-668
17 Ajay Khoche, Erik Brunvand: ACT: A DFT Tool for Self-Timed Circuits. ITC 1997: 829-837
16EEAjay Khoche, Erik Brunvand: Critical hazard free test generation for asynchronous circuits. VTS 1997: 203-209
1996
15EEV. Chandramouli, Erik Brunvand, Kent F. Smith: Self-Timed Design in GaAs - Case Study of a High-Speed, Parallel Multiplier. IEEE Trans. VLSI Syst. 4(1): 146 (1996)
1995
14EEErik Brunvand: Low latency self-timed flow-through FIFOs. ARVLSI 1995: 76-90
13EEAjay Khoche, Erik Brunvand: Testing self-timed circuits using partial scan. ASYNC 1995: 160-169
12EESandeep Pagey, Ajay Khoche, Erik Brunvand: DFT for fast testing of self-timed control circuits. Asian Test Symposium 1995: 382-386
11EEJae-Tack Yoo, Erik Brunvand, Kent F. Smith: Automatic rapid prototyping of semi-custom VLSI circuits using Actel FPGAs. Great Lakes Symposium on VLSI 1995: 148-151
10EEWilliam F. Richardson, Erik Brunvand: Precise exception handling for a self-timed processor. ICCD 1995: 32-37
9EEAjay Khoche, Erik Brunvand: A partial scan methodology for testing self-timed circuits. VTS 1995: 283-289
1994
8 Prabhakar Kudva, Ganesh Gopalakrishnan, Erik Brunvand, Venkatesh Akella: Performance Analysis and Optimization of Asynchronous Circuits. ICCD 1994: 221-224
7 Ganesh Gopalakrishnan, Prabhakar Kudva, Erik Brunvand: Peephole Optimization of Asynchronous Macromodule Networks. ICCD 1994: 442-446
6EEGanesh Gopalakrishnan, Erik Brunvand, Nick Michell, Steven M. Nowick: A correctness criterion for asynchronous circuit validation and optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 13(11): 1309-1318 (1994)
5EEErik Brunvand: Designing self-timed systems using concurrent programs. VLSI Signal Processing 7(1-2): 47-59 (1994)
1993
4EEErik Brunvand: Using FPGAs to implement self-timed systems. VLSI Signal Processing 6(2): 173-190 (1993)
1992
3 Erik Brunvand: Using FPLs to Prototoype a Self-Timed Computer. FPL 1992: 192-198
2 Erik Brunvand, Nick Michell, Kent F. Smith: A Comparison of Self-Timed Design Using FPGA, CMOS, and GaAs Technologies. ICCD 1992: 76-80
1991
1 Erik Brunvand, M. Starkey: An Integrated Environment for the Design and Simulation of Self-Timed Systems. VLSI 1991: 137-146

Coauthor Index

1Venkatesh Akella [8]
2Solomon Boulos [28] [29]
3John B. Carter [19] [21]
4V. Chandramouli [15]
5Al Davis (Alan L. Davis) [19] [21] [28]
6Ganesh Gopalakrishnan [6] [7] [8] [20] [23]
7Gaurav Gulati [27]
8Wilson C. Hsieh [19] [21]
9Hans M. Jacobson [23]
10Vamshi Krishna Kadaru [26]
11Spencer Kellis [29]
12Andrew E. Kensler [30]
13Ajay Khoche [9] [12] [13] [16] [17]
14Daniel Kopta [29]
15Prabhakar Kudva [7] [8] [20] [23]
16Chen-Chi Kuo [19] [21]
17Ravindra Kuramkote [19] [21]
18Nick Michell [2] [6]
19Dave Nellans [26]
20Steven M. Nowick [6] [18] [22]
21Sandeep Pagey [12]
22Michael Parker [19] [21]
23Steven G. Parker [28]
24William F. Richardson [10]
25Lambert Schaelicke [19] [21]
26Peter Shirley [28]
27Kent F. Smith [2] [11] [15]
28Josef B. Spjut [29] [30]
29M. Starkey [1]
30Leigh Stoller [19] [21]
31Kelvin Sung [28]
32Mark R. Swanson [19] [21]
33Terry Tateyama [19] [21]
34Jung-Lin Yang [24] [25]
35Jae-Tack Yoo [11]
36Kenneth Y. Yun [18] [22]
37Lixin Zhang [19] [21]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)