dblp.uni-trier.dewww.uni-trier.de

Gordon J. Brebner Vis

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo

*2007
37EEGordon J. Brebner, Samarjit Chakraborty, Weng-Fai Wong: Editorial for the Special Issue on Field Programmable Technology. VLSI Signal Processing 47(1): 1-2 (2007)
2006
36 Peter M. Athanas, Jürgen Becker, Gordon J. Brebner, Jürgen Teich: Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006 Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany 2006
35EEChidamber Kulkarni, Gordon J. Brebner: Memory centric thread synchronization on platform FPGAs. DATE 2006: 959-964
34EEJürgen Becker, Jürgen Teich, Gordon J. Brebner, Peter M. Athanas: 06141 Abstracts Collection -- Dynamically Reconfigurable Architectures. Dynamically Reconfigurable Architectures 2006
33EEJürgen Becker, Jürgen Teich, Gordon J. Brebner, Peter M. Athanas: 06141 Executive Summary -- Dynamically Reconfigurable Architectures. Dynamically Reconfigurable Architectures 2006
32EEMichael Attig, Gordon J. Brebner: Systematic Characterization of Programmable Packet Processing Pipelines. FCCM 2006: 195-204
31EEJike Chong, Chidamber Kulkarni, Gordon J. Brebner: Building a flexible and scalable DRAM interface for networking applications on FPGAs. FPGA 2006: 233
30EEChidamber Kulkarni, Gordon J. Brebner: Micro-Coded Datapaths: Populating the Space Between Finite State Machine and Processor. FPL 2006: 1-6
2005
29 Gordon J. Brebner, Samarjit Chakraborty, Weng-Fai Wong: Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, FPT 2005, 11-14 December 2005, Singagore IEEE 2005
28EETodd S. Sproull, Gordon J. Brebner, Christopher E. Neely: Mutable Codesign for Embedded Protocol Processing. FCCM 2005: 299-300
27 Todd S. Sproull, Gordon J. Brebner, Christopher E. Neely: Mutable Codesign for Embedded Protocol Processing. FPL 2005: 51-56
2004
26EEGordon J. Brebner, Philip James-Roxby, Eric Keller, Chidamber Kulkarni: Hyper-Programmable Architectures for Adaptable Networked Systems. ASAP 2004: 328-338
25EEChidamber Kulkarni, Gordon J. Brebner, Graham Schelle: Mapping a domain specific language to a platform FPGA. DAC 2004: 924-927
24EEPhilip James-Roxby, Gordon J. Brebner, Dennis Bemmann: Time-Critical Software Deceleration in an FCCM. FCCM 2004: 3-12
23EEPhilip James-Roxby, Gordon J. Brebner: Multithreading in a Hyper-programmable Platform for Networked Systems. FPL 2004: 1017-1021
22EEGordon J. Brebner: Programmable Logic Has More Computational Power than Fixed Logic. FPL 2004: 404-413
2003
21EEGordon J. Brebner: Eccentric SoC Architectures as the Future Norm. DSD 2003: 2-9
20EEEric Keller, Gordon J. Brebner, Philip James-Roxby: Software Decelerators. FPL 2003: 385-395
2002
19EEGordon J. Brebner: Single-Chip Gigabit Mixed-Version IP Router on Virtex-II Pro. FCCM 2002: 35-44
18EEGordon J. Brebner: Multithreading for Logic-Centric Systems. FPL 2002: 5-14
17EEGordon J. Brebner: Workshop Introduction. IPDPS 2002
2001
16 Gordon J. Brebner, Roger Woods: Field-Programmable Logic and Applications, 11th International Conference, FPL 2001, Belfast, Northern Ireland, UK, August 27-29, 2001, Proceedings Springer 2001
15EEGordon J. Brebner, Oliver Diessel: Chip-Based Reconfigurable Task Management. FPL 2001: 182-191
1999
14 Tim Kempster, Gordon J. Brebner, Peter Thanisch: A Transactional Approach to Configuring Telecommunications Services. Databases in Telecommunications 1999: 40-53
13 Gordon J. Brebner, Neil W. Bergmann: Reconfigurable Computing in Remote and Harsh Environments. FPL 1999: 195-204
1998
12EEGordon J. Brebner, Rob Pooley: ECOLE: A Configurable Environment for a Local Optical Network of Workstations. CANPC 1998: 45-58
11EEGordon J. Brebner: Circlets: Circuits as Applets. FCCM 1998: 300-301
10EEGordon J. Brebner: An Interactive Datasheet for the Xilinx XC6200. FPL 1998: 401-405
9EEGordon J. Brebner: Field-Programmable Logic: Catalyst for New Computing Paradigms. FPL 1998: 49-58
8 Gordon J. Brebner, Adam Donlin: Runtime Reconfigurable Routing. IPPS/SPDP Workshops 1998: 25-30
1997
7EEGordon J. Brebner: The swappable logic unit: a paradigm for virtual hardware. FCCM 1997: 77-86
6 Gordon J. Brebner: Automatc identification of swappable logic units in XC6200 circuitry. FPL 1997: 173-182
1996
5 Gordon J. Brebner: A Virtual Hardware Operating System for the Xilinx XC6200. FPL 1996: 327-336
1995
4 Gordon J. Brebner, John Gray: Use of Reconfigurability in Variable-Length Code Detection at Video Rates. FPL 1995: 429-438
1993
3 Gordon J. Brebner: A CCS-based Investigation of Deadlock in a Multi-process Electronic Mail System. Formal Asp. Comput. 5(5): 467-478 (1993)
2EEGordon J. Brebner: Configurable array logic circuits for computing network error detection codes. VLSI Signal Processing 6(2): 101-117 (1993)
1981
1 Leslie G. Valiant, Gordon J. Brebner: Universal Schemes for Parallel Communication STOC 1981: 263-277

Coauthor Index

1Peter M. Athanas (Peter Athanas) [33] [34] [36]
2Michael Attig [32]
3Jürgen Becker [33] [34] [36]
4Dennis Bemmann [24]
5Neil W. Bergmann [13]
6Samarjit Chakraborty [29] [37]
7Jike Chong [31]
8Oliver Diessel [15]
9Adam Donlin [8]
10John Gray [4]
11Philip James-Roxby [20] [23] [24] [26]
12Eric Keller [20] [26]
13Tim Kempster [14]
14Chidamber Kulkarni [25] [26] [30] [31] [35]
15Christopher E. Neely [27] [28]
16Rob Pooley (R. J. Pooley) [12]
17Graham Schelle [25]
18Todd S. Sproull [27] [28]
19Jürgen Teich [33] [34] [36]
20Peter Thanisch [14]
21Leslie G. Valiant [1]
22Weng-Fai Wong [29] [37]
23Roger Woods (Roger F. Woods) [16]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)