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Lars Bengtsson Vis

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*2009
14EEÅke Walldius, Yngve Sundblad, Lars Bengtsson, Bengt L. Sandblad, Jan Gulliksen: User certification of workplace software: assessing both artefact and usage. Behaviour & IT 28(2): 101-120 (2009)
2008
13EEBjörn Nilsson, Lars Bengtsson, Bertil Svensson: Selecting back off algorithm in active RFID CSMA/CA based medium-access protocols. SIES 2008: 265-270
2007
12EEMinh Quang Do, Mindaugas Drazdziulis, Per Larsson-Edefors, Lars Bengtsson: Leakage-Conscious Architecture-Level Power Estimation for Partitioned and Power-Gated SRAM Arrays. ISQED 2007: 185-191
11EEBjörn Nilsson, Lars Bengtsson, Per-Arne Wiberg, Bertil Svensson: Protocols for Active RFID - The Energy Consumption Aspect. SIES 2007: 41-48
2006
10EEMinh Quang Do, Mindaugas Drazdziulis, Per Larsson-Edefors, Lars Bengtsson: Parameterizable Architecture-Level SRAM Power Model Using Circuit-Simulation Backend for Leakage Calibration. ISQED 2006: 557-563
2005
9EENiklas Therning, Lars Bengtsson: Jalapeno: secentralized grid computing using peer-to-peer technology. Conf. Computing Frontiers 2005: 59-65
8EEAndreas Lindahl, Lars Bengtsson: A Low-Power FIR Filter Using Combined Residue and Radix-2 Signed-Digit Representation. DSD 2005: 42-47
2004
7EEMinh Quang Do, Per Larsson-Edefors, Lars Bengtsson: Table-Based Total Power Consumption Estimation of Memory Arrays for Architects. PATMOS 2004: 869-878
2003
6 Minh Quang Do, Lars Bengtsson, Per Larsson-Edefors: DSP-PP: A Simulator/Estimator of Power Consumption and Performance for Parallel DSP Architectures. Applied Informatics 2003: 767-772
5EEAnders Lindström, Michael Nordseth, Lars Bengtsson, Amos Omondi: Arithmetic Circuits Combining Residue and Signed-Digit Representations. Asia-Pacific Computer Systems Architecture Conference 2003: 246-257
4 Lars Bengtsson: A VLSI Array Architecture for Artificial Neural Networks. Neural Networks and Computational Intelligence 2003: 50-57
2001
3EEStefan Lund, Lars Bengtsson: Synchronizing a High-Speed SIMD Processor Array. DSD 2001: 376-381
1999
2 Lars Bengtsson: Clock Speed Limitation and Timing in a Radar Signal Processing Architecture. SIP 1999: 372-377
1993
1EELars Bengtsson, Kenneth Nilsson, Bertil Svensson: A processor array module for distributed, massively parallel, embedded computing. Microprocessing and Microprogramming 38(1-5): 529-537 (1993)

Coauthor Index

1Minh Quang Do [6] [7] [10] [12]
2Mindaugas Drazdziulis [10] [12]
3Jan Gulliksen [14]
4Per Larsson-Edefors [6] [7] [10] [12]
5Andreas Lindahl [8]
6Anders Lindström [5]
7Stefan Lund [3]
8Björn Nilsson [11] [13]
9Kenneth Nilsson [1]
10Michael Nordseth [5]
11Amos Omondi [5]
12Bengt L. Sandblad [14]
13Yngve Sundblad [14]
14Bertil Svensson [1] [11] [13]
15Niklas Therning [9]
16Åke Walldius [14]
17Per-Arne Wiberg [11]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)