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Nikolaos Bellas Vis

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*2009
15EEKonstantis Daloukas, Christos D. Antonopoulos, Nikolaos Bellas: Implementation of a wide-angle lens distortion correction algorithm on the cell broadband engine. ICS 2009: 4-13
2008
14EESeda Ogrenci Memik, Nikolaos Bellas, Somsubhra Mondal: Presynthesis Area Estimation of Reconfigurable Streaming Accelerators. IEEE Trans. on CAD of Integrated Circuits and Systems 27(11): 2027-2038 (2008)
2007
13EENikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan Linzmeier: An Architectural Framework for Automated Streaming Kernel Selection. IPDPS 2007: 1-7
2006
12EESomsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas: Pre-synthesis Queue Size Estimation of Streaming Data Flow Graphs. FCCM 2006: 325-326
11EENikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan Linzmeier: Template-Based Generation of Streaming Accelators from a High Level Presentation. FCCM 2006: 345-346
10EESomsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas: Pre-Synthesis Area Estimation of Reconfigurable Streaming Accelerators. FPL 2006: 1-4
9EENikolaos Bellas, Arnold Yanof: An Image Processing Pipeline with Digital Compensation of Low Cost Optics for Mobile Telephony. ICME 2006: 1249-1252
8EENikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan Linzmeier: FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators. IPDPS 2006
2005
7EEGeorgios I. Stamoulis, Maria G. Koziri, Ioannis Katsavounidis, Nikolaos Bellas: A Low - Power VLSI Architecture for Intra Prediction in H.264. Panhellenic Conference on Informatics 2005: 633-640
2000
6EENikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos, G. Stamoulis: Architectural and compiler techniques for energy reduction in high-performance microprocessors. IEEE Trans. VLSI Syst. 8(3): 317-326 (2000)
5EENikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos: Using dynamic cache management techniques to reduce energy in general purpose processors. IEEE Trans. VLSI Syst. 8(6): 693-708 (2000)
1999
4EENikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos, George D. Stamoulis: Energy and Performance Improvements in Microprocessor Design Using a Loop Cache. ICCD 1999: 378-383
3EENikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos: An analytical, transistor-level energy model for SRAM-based caches. ISCAS (6) 1999: 198-201
2EENikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos: Using dynamic cache management techniques to reduce energy in a high-performance processor. ISLPED 1999: 64-69
1998
1EENikolaos Bellas, Ibrahim N. Hajj, George D. Stamoulis, Constantine D. Polychronopoulos: Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors. ISLPED 1998: 70-75

Coauthor Index

1Christos D. Antonopoulos [15]
2Sek M. Chai [8] [11] [13]
3Konstantis Daloukas [15]
4Malcolm Dwyer [8] [11] [13]
5Ibrahim N. Hajj [1] [2] [3] [4] [5] [6]
6Ioannis Katsavounidis [7]
7Maria G. Koziri [7]
8Dan Linzmeier [8] [11] [13]
9Seda Ogrenci Memik (Seda Ogrenci) [10] [12] [14]
10Somsubhra Mondal [10] [12] [14]
11Constantine D. Polychronopoulos [1] [2] [3] [4] [5] [6]
12G. Stamoulis [6]
13George D. Stamoulis [1] [4]
14Georgios I. Stamoulis [7]
15Arnold Yanof [9]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)