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Mary L. Bailey Vis

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*1997
17EEPrasenjit Sarkar, Mary L. Bailey: Adapting the Network Interface for High-Performance Computing: The CNI Approach. The Journal of Supercomputing 11(2): 181-200 (1997)
1996
16EEPrasenjit Sarkar, Mary L. Bailey: CNI: A High-Performance Network Interface for Workstation Clusters. HPDC 1996: 151-160
15EEWilkey Richardson, Mary L. Bailey, William H. Sanders: Using ZPL to Develop a Parallel Chaos Router Simulator. Winter Simulation Conference 1996: 809-816
1994
14 Mary L. Bailey, Burra Gopal, Michael A. Pagels, Larry L. Peterson, Prasenjit Sarkar: PathFinder: A Pattern-Based Packet Classifier. OSDI 1994: 115-123
13EEMary L. Bailey, Shane Walker: Towards "on the fly" performance models for conservative asynchronous protocols. Winter Simulation Conference 1994: 1431-1434
12 Mary L. Bailey, Jack V. Briner Jr., Roger D. Chamberlain: Parallel Logic Simulation of VLSI Systems. ACM Comput. Surv. 26(3): 255-294 (1994)
11EEMary L. Bailey, Michael A. Pagels: Empirical Measurements of Overheads in Conservative Asynchronous Simulations. ACM Trans. Model. Comput. Simul. 4(4): 350-367 (1994)
1993
10EEMary L. Bailey: A delay-based model for circuit parallelism. IEEE Trans. on CAD of Integrated Circuits and Systems 12(12): 1903-1912 (1993)
1992
9EEMary L. Bailey: How circuit size affects parallelism. IEEE Trans. on CAD of Integrated Circuits and Systems 11(2): 208-215 (1992)
8EEMary L. Bailey: A time-based model for investigating parallel logic-level simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 11(7): 816-824 (1992)
1991
7EEMary L. Bailey, Michael A. Pagels: Measuring the overhead in conservative parallel simulations of multicomputer programs. Winter Simulation Conference 1991: 627-636
1990
6 Yi-Bing Lin, Edward D. Lazowska, Mary L. Bailey: Comparing Synchronization Protocols for Parallel Logic-Level Simulation. ICPP (3) 1990: 223-227
1989
5 Tony DeRose, Mary L. Bailey, Bill Barnard, Robert Cypher, David Dobrikin, Carl Ebeling, Smaragda Konstantinidou, Larry McMurchie, Haim Mizrahi, Bill Yost: Apex: two architectures for generating parametric curves and surfaces. The Visual Computer 5(5): 264-276 (1989)
1988
4EEMary L. Bailey, Lawrence Snyder: An Empirical Study of On-chip Parallelism. DAC 1988: 160-165
3 Mary L. Bailey, David Socha, David Notkin: Debugging Parallel Programs using Graphical Views. ICPP (2) 1988: 46-49
2 David Notkin, Lawrence Snyder, David Socha, Mary L. Bailey, Bruce Forstall, Kevin Gates, Raymond Greenlaw, William G. Griswold, Thomas J. Holman, Richard Korry, Gemini Lasswell, Robert Mitchell, Philip A. Nelson: Experiences with Poker. PPOPP/PPEALS 1988: 10-20
1 David Socha, Mary L. Bailey, David Notkin: Voyeur: Graphical Views of Parallel Programs. Workshop on Parallel and Distributed Debugging 1988: 206-216

Coauthor Index

1Bill Barnard [5]
2Jack V. Briner Jr. [12]
3Roger D. Chamberlain [12]
4Robert Cypher [5]
5Tony DeRose [5]
6David Dobrikin [5]
7Carl Ebeling [5]
8Bruce Forstall [2]
9Kevin Gates [2]
10Burra Gopal [14]
11Raymond Greenlaw [2]
12William G. Griswold [2]
13Thomas J. Holman [2]
14Smaragda Konstantinidou [5]
15Richard Korry [2]
16Gemini Lasswell [2]
17Edward D. Lazowska [6]
18Yi-Bing Lin (Jason Yi-Bing Lin) [6]
19Larry McMurchie [5]
20Robert Mitchell [2]
21Haim Mizrahi [5]
22Philip A. Nelson [2]
23David Notkin [1] [2] [3]
24Michael A. Pagels [7] [11] [14]
25Larry L. Peterson [14]
26Wilkey Richardson [15]
27William H. Sanders [15]
28Prasenjit Sarkar [14] [16] [17]
29Lawrence Snyder (Larry Snyder) [2] [4]
30David Socha [1] [2] [3]
31Shane Walker [13]
32Bill Yost [5]

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Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)