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Debabrata Bagchi Vis

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*2004
6 Prithviraj Banerjee, Malay Haldar, Anshuman Nayak, Victor Kim, Vikram Saxena, Steven Parkes, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, David Zaretsky, R. Anderson, J. R. Uribe: Overview of a compiler for synthesizing MATLAB programs onto FPGAs. IEEE Trans. VLSI Syst. 12(3): 312-324 (2004)
2003
5EEPrithviraj Banerjee, Debabrata Bagchi, Malay Haldar, Anshuman Nayak, Victor Kim, R. Uribe: Automatic Conversion of Floating Point MATLAB Programs into Fixed Point FPGA Based Hardware Design. FCCM 2003: 263-264
4EEPrithviraj Banerjee, Vikram Saxena, J. R. Uribe, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, R. Anderson: Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs. FPGA 2003: 237
2002
3EEAlex K. Jones, Debabrata Bagchi, Satrajit Pal, Xiaoyong Tang, Alok N. Choudhary, Prithviraj Banerjee: PACT HDL: a C compiler targeting ASICs and FPGAs with power and performance optimizations. CASES 2002: 188-197
2EEPrithviraj Banerjee, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi: A Behavioral Synthesis Tool for Exploiting Fine Grain Parallelism in FPGAs. IWDC 2002: 246-256
2001
1EEDebabrata Bagchi, Dipanwita Roy Chowdhury, Joy Mukherjee, Santanu Chattopadhyay: A Novel Strategy to Test Core Based Designs. VLSI Design 2001: 122-127

Coauthor Index

1R. Anderson [4] [6]
2Prithviraj Banerjee (Prith Banerjee) [2] [3] [4] [5] [6]
3Santanu Chattopadhyay [1]
4Alok N. Choudhary [3]
5Dipanwita Roy Chowdhury [1]
6Malay Haldar [2] [4] [5] [6]
7Alex K. Jones [3]
8Victor Kim [2] [4] [5] [6]
9Joy Mukherjee [1]
10Anshuman Nayak [2] [4] [5] [6]
11Satrajit Pal [2] [3] [4] [6]
12Steven Parkes [6]
13Vikram Saxena [4] [6]
14Xiaoyong Tang [3]
15Nikhil Tripathi [2] [4] [6]
16J. R. Uribe [4] [6]
17R. Uribe [5]
18David Zaretsky [6]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)