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Kwang-Hyun Baek Vis

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*2008
18EEJae-Jin Jung, Kwang-Hyun Baek, Shin-Il Lim, Suki Kim, Sung-Mo Kang: Design of a 6 bit 1.25 GS/s DAC for WPAN. ISCAS 2008: 2262-2265
17EEYun-Jeong Kim, Jong-Ho Lee, Ja-Hyun Koo, Kwang-Hyun Baek, Suki Kim: 6-bit 1.6-GS/s 85-mW Flash Analog to Digital Converter Using Symmetric Three-Input Comparator. IEICE Transactions 91-C(3): 392-395 (2008)
2007
16EEChris Masone, Kwang-Hyun Baek, Sean W. Smith: WSKE: Web Server Key Enabled Cookies. Financial Cryptography 2007: 294-306
15EESoon-Ik Cho, Suki Kim, Shin-Il Lim, Kwang-Hyun Baek: A 6-bit 2.5GSample/s Flash ADC using Immanent C2MOS Comparator in 0.18um CMOS. ISCAS 2007: 3379-3382
14EEYoungkwon Jo, Hoyoung Park, Sanghyuk Yang, Suki Kim, Kwang-Hyun Baek: Digitally Controlled Duty Cycle Corrector with 1 ps Resolution. IEICE Transactions 90-C(9): 1841-1843 (2007)
2005
13EEBo Hu, Zhao Li, Lili Zhou, C.-J. Richard Shi, Kwang-Hyun Baek, Myung-Jun Choe: Model-compiler based efficient statistical circuit analysis: an industry case study of a 4 GHz/6-bit ADC/DAC/DEMUX ASIC. ISCAS (6) 2005: 5621-5624
12EEGe Yang, Seong-Ook Jung, Kwang-Hyun Baek, Soo Hwan Kim, Suki Kim, Sung-Mo Kang: A 32-bit carry lookahead adder using dual-path all-N logic. IEEE Trans. VLSI Syst. 13(8): 992-996 (2005)
11EEEdward Merlo, Kwang-Hyun Baek: High-Speed Low-Power Small-Area Accumulator Designs for Direct Digital Frequency Synthesizers. IEICE Transactions 88-A(5): 1373-1378 (2005)
10EEKwang-Hyun Baek: Addressing a High-Speed D/A Converter Design for Mixed-Mode VLSI Systems. IEICE Transactions 88-C(5): 1053-1060 (2005)
2004
9 Ge Yang, Seong-Ook Jung, Kwang-Hyun Baek, Soo Hwan Kim, Suki Kim, Sung-Mo Kang: A low-power 1.85 GHz 32-bit carry lookahead adder using Dual Path All-N-Logic. ISCAS (2) 2004: 781-784
2003
8EEEdward Merlo, Kwang-Hyun Baek, Myung-Jun Choe: Exponential split accumulator for high-speed reduced area low-power direct digital frequency synthesizers. ACM Great Lakes Symposium on VLSI 2003: 249-252
7EEKwang-Hyun Baek, Myung-Jun Choe, Edward Merlo, Sung-Mo Kang: 1-GS/s, 12-bit SiGe BiCMOS D/A converter for high-speed DDFs. ISCAS (1) 2003: 901-904
6EEKwang-Hyun Baek, Myung-Jun Choe, Sung-Mo Kang: An Efficient Calibration Technique for Systematic Current-Mismatch of D/A Converters. ISVLSI 2003: 80-86
5EEYong Sin Kim, Soo Hwan Kim, Kwang-Hyun Baek, Suki Kim, Sung-Mo Kang: Multiple Trigonometric Approximation of Sine-Amplitude with Small ROM Size for Direct Digital Frequency Synthesizers. VLSI Design 2003: 261-
2002
4EEKwang-Hyun Baek, Myung-Jun Choe, Sung-Mo Kang: A low-voltage high-speed BiCMOS current switch with enhanced-spectral performance. ISCAS (5) 2002: 53-56
2001
3EESeung-Moon Yoo, Chulwoo Kim, Seong-Ook Jung, Kwang-Hyun Baek, Sung-Mo Kang: New current-mode sense amplifiers for high density DRAM and PIM architectures. ISCAS (4) 2001: 938-941
2000
2 Ki-Wook Kim, Kwang-Hyun Baek, Naresh R. Shanbhag, C. L. Liu, Sung-Mo Kang: Coupling-Driven Signal Encoding Scheme for Low-Power Interface Design. ICCAD 2000: 318-321
1EEChulwoo Kim, Jaesik Lee, Kwang-Hyun Baek, Eric Martina, Sung-Mo Kang: High-Performance, Low-Power Skewed Static Logic in Very Deep-Submicron (VDSM) Technology. ICCD 2000: 59-64

Coauthor Index

1Soon-Ik Cho [15]
2Myung-Jun Choe [4] [6] [7] [8] [13]
3Bo Hu [13]
4Youngkwon Jo [14]
5Jae-Jin Jung [18]
6Seong-Ook Jung [3] [9] [12]
7Sung-Mo Kang [1] [2] [3] [4] [5] [6] [7] [9] [12] [18]
8Chulwoo Kim [1] [3]
9Ki-Wook Kim [2]
10Soo Hwan Kim [5] [9] [12]
11Suki Kim [5] [9] [12] [14] [15] [17] [18]
12Yong Sin Kim [5]
13Yun-Jeong Kim [17]
14Ja-Hyun Koo [17]
15Jaesik Lee [1]
16Jong-Ho Lee [17]
17Zhao Li [13]
18Shin-Il Lim [15] [18]
19C. L. Liu (Chung Laung (Dave) Liu) [2]
20Eric Martina [1]
21Chris Masone [16]
22Edward Merlo [7] [8] [11]
23Hoyoung Park [14]
24Naresh R. Shanbhag [2]
25C.-J. Richard Shi [13]
26Sean W. Smith [16]
27Ge Yang [9] [12]
28Sanghyuk Yang [14]
29Seung-Moon Yoo [3]
30Lili Zhou [13]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)