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Iuliana Bacivarov Vis

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*2009
7EEKai Huang, Iuliana Bacivarov, Jun Liu, Wolfgang Haid: A modular fast simulation framework for stream-oriented MPSoC. SIES 2009: 74-81
2008
6EEKai Huang, Iuliana Bacivarov, Fabian Hugelshofer, Lothar Thiele: Scalably distributed SystemC simulation for embedded applications. SIES 2008: 271-274
2007
5EELothar Thiele, Iuliana Bacivarov, Wolfgang Haid, Kai Huang: Mapping Applications to Tiled Multiprocessor Embedded Systems. ACSD 2007: 29-40
2006
4EEFlorin Dumitrascu, Iuliana Bacivarov, Lorenzo Pieralisi, Marius Bonaciu, Ahmed Amine Jerraya: Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application. DATE Designers' Forum 2006: 166-171
2005
3EEAimen Bouchhima, Iuliana Bacivarov, Wassim Youssef, Marius Bonaciu, Ahmed Amine Jerraya: Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration. ASP-DAC 2005: 969-972
2EEIuliana Bacivarov, Aimen Bouchhima, Sungjoo Yoo, Ahmed Amine Jerraya: ChronoSym: a new approach for fast and accurate SoC cosimulation. IJES 1(1/2): 103-111 (2005)
2003
1EESungjoo Yoo, Iuliana Bacivarov, Aimen Bouchhima, Yanick Paviot, Ahmed Amine Jerraya: Building Fast and Accurate SW Simulation Models Based on Hardware Abstraction Layer and Simulation Environment Abstraction Layer. DATE 2003: 10550-10555

Coauthor Index

1Marius Bonaciu [3] [4]
2Aimen Bouchhima [1] [2] [3]
3Florin Dumitrascu [4]
4Wolfgang Haid [5] [7]
5Kai Huang [5] [6] [7]
6Fabian Hugelshofer [6]
7Ahmed Amine Jerraya [1] [2] [3] [4]
8Jun Liu [7]
9Yanick Paviot [1]
10Lorenzo Pieralisi [4]
11Lothar Thiele [5] [6]
12Sungjoo Yoo [1] [2]
13Wassim Youssef [3]

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)